940 results about "Wafer bonding" patented technology

A method of fabricating a semiconductor device includes forming a memory cell array stack including a vertical stack of pad portions over a first substrate, forming first bonding pads each coupled to a different one of the pad portions in the vertical stack, forming control circuits including a plurality of sub-word line drivers over a second substrate, forming multi-layer level metal wiring coupled to the sub-word line drivers, forming second bonding pads coupled to the multi-layer level metal wiring, and performing a wafer bonding process for electrical coupling between the memory cell array stack and the control circuits.

The invention provides a wafer bonding device and a wafer bonding method, and relates to the technical field of semiconductor processing. The wafer bonding device comprises a carrying seat, a driving structure arranged on the carrying seat, and a target chuck and a bearing chuck which are arranged along the Z direction, at least one of the target chuck and the bearing chuck is in transmission connection with the driving structure, and the driving structure is configured to be capable of driving the target chuck and the bearing chuck to relatively move along the X-Y direction and the Z direction; a plurality of notches are formed in the edge of the target chuck; the carrying base is provided with a plurality of visual systems, the visual systems are located on the side, away from the bearing chuck, of the target chuck, the axial direction of the visual systems is consistent with the Z direction, the visual systems correspond to the notches one to one, and the visual systems are configured to shoot images, corresponding to the notches, of the wafers loaded on the target chuck and the bearing chuck. The wafer bonding device is good in wafer bonding quality, high in yield, small in size and small in occupied space.

The invention belongs to the technical field of photoelectronics, and particularly relates to a wide-spectrum narrow-linewidth semiconductor mode-locked laser, and the collaboration of a saturable absorption region SA and a resonator is reflected in time domain-frequency domain dual optimization. And the resonator optimizes the frequency domain characteristics through nonlinear broadening, phase synchronization and mode purification. The SA adjusts a mode locking threshold value in real time through dynamic bias voltage, the pulse energy stability is ensured, dispersion management of the resonator balances the SPM and group velocity dispersion, spectrum splitting is avoided, and the dissipative soliton form is maintained. Besides, due to heterogeneous integration of the InP-based SA and the SiN-based resonator, wafer bonding of the InP-based SA and the SiN-based resonator is realized, high-efficiency energy transfer is realized through the low-loss conical waveguide, a high-performance frequency comb with a wide spectrum and a narrow pulse width is output, and the high-performance frequency comb can be widely applied to the fields of ultrafast optics, coherent light communication and precision spectroscopy.

The invention relates to the technical field of wafer bonding devices, in particular to a wafer bonding pressure control mechanism and method. The mechanism comprises a main driving unit and a bonding pressing rod linked with the main driving unit, the main driving unit drives the bonding pressing rod to move in the bonding pressure direction, bonding pressure is applied to a wafer through the bonding pressing rod, the bonding pressing rod is linked with the main driving unit through a pressure maintaining air cylinder, and the bonding pressing rod is arranged at the tail end of a piston rod of the pressure maintaining air cylinder; a displacement sensor is further included, the displacement change of the bonding pressing rod is detected through the displacement sensor, and the displacement sensor is electrically connected with the main driving unit. The main driving unit and the pressure maintaining air cylinder are combined to form a composite operation control system, the bonding pressure is controlled and adjusted by controlling the air pressure of the pressure maintaining air cylinder, and the stability of the bonding pressure is ensured.

The invention relates to the technical field of piezoelectric single-crystal filters, in particular to a filter based on a heterogeneous integrated piezoelectric single-crystal thin film and a preparation method, the filter comprises a Si substrate, a dry film, the piezoelectric single-crystal thin film, a SiO2 layer and a Si wafer are sequentially arranged on the Si substrate, metal balls are arranged on the Si wafer, the metal balls are connected with electrodes, and the electrodes are connected with the piezoelectric single-crystal thin film. And the electrode passes through the Si wafer and the SiO2 layer and is connected with the piezoelectric single crystal film. When the filter is prepared, bonding packaging can be performed after a cavity area is etched on a dry film, a resonance area is directly defined through a photoetching process, the influence of etching on the strength of the piezoelectric single crystal film is avoided, a silicon wafer bonding technology can be combined, double-sided packaging can be realized, and batch production is supported; in the process, only the electrode patterning step needs to be adjusted according to the type of the filter, and then the existing MEMS process integration is utilized, so that the preparation of the FBAR and the XBAR on the same production line is realized, the process compatibility is good, and the problems that the existing preparation method is poor in compatibility and is difficult to realize large-scale production are solved.

The invention discloses a double-wafer bonding clamping device and an application method thereof, and relates to the field of wafer bonding, the double-wafer bonding clamping device comprises a chuck, an upper chuck used for adsorbing an upper wafer, a lower chuck, a chassis seat and three clamping positioning mechanisms, the lower chuck is arranged at the bottom of the upper chuck, the chassis seat is arranged at the bottom of the lower chuck, and the three clamping positioning mechanisms are arranged on the chassis seat. A fixing part used for fixing the lower chuck is arranged on the chassis base, the three clamping and positioning mechanisms are arranged in a circumferential array shape with the axis of the lower chuck as the center, and each clamping and positioning mechanism comprises an air cylinder assembly, a Spacer-Clamp fixing base assembly, a Spacer assembly and a Clamp assembly. Through the spacing piece which can be fed in the horizontal direction, spacing clamping of the two wafers after the marking point alignment process is achieved, the upper wafer is pressed through the driving pressing wheel, alignment fixing between the upper wafer and the lower wafer is guaranteed, the wafer gap vacuumizing technology before bonding in the clamp can be achieved, and bubbles of a bonding glue layer are effectively avoided.

The invention discloses a wafer back contact type positioning and clamping fixing device and a wafer bonding method.The wafer back contact type positioning and clamping fixing device comprises a bonding cavity, a lower suction cup, an upper pressing disc, a controller, a pressing driving mechanism, a positioning pressing rod, a clamping driving mechanism and a flexible clamping jaw, and the lower end of the positioning pressing rod can abut against the upper end wall of the lower suction cup; the clamping driving mechanisms are arranged on the two sides of the lower suction cup in an up-down sliding mode, the flexible clamping jaws are connected with the clamping driving mechanisms, the clamping driving mechanisms drive the flexible clamping jaws to slide in the radial direction of the lower suction cup, the flexible clamping jaws are used for clamping and fixing a wafer, and the inner circumferential wall of each flexible clamping jaw can abut against the outer circumferential wall of the wafer. The limiting block can abut against the lower end wall of the edge of the wafer, and the pressing driving mechanism and the clamping driving mechanism are electrically connected with the controller. According to the technical scheme, the wafer surface can be prevented from being polluted and damaged, the stability of the wafer bonding process can be effectively improved, the rejection rate is reduced, the cost is saved, and the high market application and popularization value is achieved.

Embodiments of the present disclosure provide a semiconductor device structure having a vertically stacked complementary field effect transistor (CFET). The CFET is formed by bonding two substrates on which a semiconductor stack is formed. Bonding structures are formed between the semiconductor stacks using wafer bonding techniques. Embodiments of the present disclosure enable flexibility in selecting different N / P channel characteristics, provide a simple way to form N / P channel isolation structures, and reduce potential leakage paths and defects in stacking CFETs. The embodiment of the invention also relates to a semiconductor device and a manufacturing method thereof.

The invention discloses a wafer bonding method, which comprises the following steps of: 1, providing a first wafer and a second wafer, the surface of the first wafer being provided with a microstructure with a high aspect ratio; step 2, cleaning the first wafer and the second wafer; step 3, performing vacuum drying treatment on the first wafer and the second wafer, wherein the vacuum pressure is controlled to be 0.1-10 Torr in the vacuum drying treatment process; step 4, carrying out pre-bonding on the first wafer and the second wafer to form a bonding body; and step 5, carrying out annealing treatment on the bonding body. Aiming at the problem of residual water in the pre-cleaning process in the bonding process of the micro-structure wafer with a high aspect ratio, the wafer is placed in a controllable vacuum environment, phase change boiling of liquid water under the condition of no heat input is realized, and the problem of high-temperature heat damage caused by an existing heating and baking method is effectively avoided.

The invention relates to a wafer chuck, a wafer bonding device and a wafer edge deformation compensation method. The wafer chuck comprises a supporting member which is provided with a circular surface for supporting a wafer and is divided into a first area and a second area, and the part, located in the second area, of the supporting member is elastic; the supporting piece is arranged at the top of the disc body, the disc body is provided with a cavity corresponding to the second area and an air entraining channel communicated with the cavity, the air entraining channel is communicated with the suction device, and the adsorption holes are communicated with the cavity; the cavity forms a positive pressure state and a negative pressure state under the action of the suction device, and in the positive pressure state, the part, located in the second area, of the supporting piece protrudes towards the side away from the cavity so as to drive the edge of the wafer to move towards the side away from the cavity; in a negative pressure state, the part, located in the second area, of the supporting piece is recessed towards the interior of the cavity so as to drive the edge of the wafer to move towards the inner side of the cavity. According to the invention, the initial deformation of the edge of the wafer can be compensated, so that the distortion of the edge area of the wafer after bonding is reduced.

According to the invention, the bonding strength between wafers in the semiconductor manufacturing process is improved through a simple structure. Provided is a vacuum chamber (14) for bonding semiconductor wafers (W1, W2) to each other, one using a silicon electrode (G1) and the other using a semiconductor wafer (W2) before bonding crystalline silicon circles (W1, W2) facing each other; after the silicon electrode G1 and the semiconductor wafer W2 are processed for the first time, the silicon electrode G1 is replaced by the bonding wafer G2, and then the bonding wafer G2 and the semiconductor wafer W2 are processed for the second time. Then, the pair of wafers W1 and W2, which are opposite to each other, are bonded together by electrostatic force in a vacuum environment.

A semiconductor device has a first substrate and a first semiconductor layer formed over the first substrate. A second substrate is disposed over a surface of the first semiconductor layer opposite the first substrate. The first semiconductor layer and second semiconductor layer can be silicon carbide or cubic silicon carbide. The first substrate and a portion of the first semiconductor layer are removed to reduce defects in the first semiconductor layer. A second semiconductor layer is formed over a remaining portion of the first semiconductor layer. A third semiconductor layer is disposed over the second semiconductor layer. The third semiconductor layer can be silicon. The third semiconductor layer can be disposed over the second semiconductor layer by direct wafer bonding. An electrical component is formed within the third semiconductor layer. The electrical component can be a power MOSFET, IGBT, CTIGBT, diode, and thyristor.

The invention provides a low-temperature bonding method for reducing surface damage and a bonding sheet thereof, and relates to the technical field of wafer bonding. In a high vacuum environment, the bonding surfaces of a first wafer and a second wafer which are to be bonded are subjected to first irradiation treatment by using a first atomic beam to obtain a first activation layer; s2, carrying out at least one second irradiation treatment on the bonding surface after the first irradiation treatment in the step S1 by adopting a second atomic beam to obtain a second activation layer; and carrying out ballasting bonding to obtain a bonding sheet. According to the low-temperature bonding method for reducing the surface damage, the bonding surface is activated in a gradient manner, so that the damage to the surface of the wafer caused by single activation can be reduced, the surface roughness is reduced, the probability of bubbles after bonding is reduced, and the bonding strength is improved.

The invention relates to the technical field of wafer processing, and discloses a wafer bonding machine for grinding and polishing, the wafer bonding machine comprises a fixing mechanism, a fixing assembly is fixedly arranged in the fixing mechanism, and a closing assembly is fixedly arranged on the inner wall of the fixing mechanism. The plurality of arc-shaped plates are in a stacked state, when the arc-shaped plates rotate, the center positions of the plurality of arc-shaped plates form a circular clamping area, the area clamps and limits the side wall of a wafer at the top of the microporous ceramic vacuum chuck, and when the wafer is clamped and limited, the side wall of the wafer at the top of the microporous ceramic vacuum chuck is clamped and limited. The wafer is guaranteed to be located at the center position of the micropore ceramic vacuum suction cup through pushing of the multiple arc-shaped plates, then the micropore ceramic vacuum suction cup generates adsorption force, and under the influence of the adsorption force and side wall clamping force, it is guaranteed that the device can conduct clamping and adsorption treatment on wafers of different specifications.

The invention relates to the technical field of temporary wafer bonding, in particular to a high-precision wafer alignment device, and mainly solves the technical problem that a wafer alignment device is low in precision. The device comprises a rack, a visual mechanism, an adsorption platen, an XYZ three-axis platform, a rotating platform and an adjusting platform, the rack comprises a base and a portal frame, the visual mechanism is installed above a cross beam of the portal frame, the adsorption platen is fixed below the cross beam of the portal frame, the XYZ three-axis platform is installed on the base and located on the inner side of the portal frame, and the rotating platform is installed on the XYZ three-axis platform. The adjusting platform comprises a bottom plate, a top plate and leveling assemblies, the bottom plate is fixed to the rotating platform, and the leveling assemblies are connected between the bottom plate and the top plate and distributed at intervals in the circumferential direction. According to the device, on one hand, position calibration of the lower wafer and the upper wafer can be achieved, on the other hand, precision reduction caused by taking down, transferring and placing can be avoided, the precision of the upper wafer and the lower wafer when the upper wafer and the lower wafer are finally fixed can be guaranteed through cooperation of the two aspects, and therefore the process requirement is met.

The invention belongs to the field of semiconductor processing and manufacturing, and provides a temporary bonding and de-bonding method, a composite substrate preparation method and a wafer manufacturing method.The temporary bonding and de-bonding method comprises the steps that silicon oxide layers are formed on two silicon substrates; the silicon oxide layer is subjected to ion implantation, hydrofluoric acid treatment and plasma activation, temporary bonding of the two silicon substrates is realized through hydrophilic bonding, and a temporary bonding interface is cracked through de-bonding annealing, so that de-bonding is realized. According to the method, a bonding medium does not need to be used, the thermal properties of the two substrates can be kept consistent, and warping and breaking are effectively avoided; temporary bonding is high in strength and good in stability, the functional substrate can be greatly thinned through the method, and therefore the composite substrate is prepared or the method is further used for manufacturing a multi-layer wafer bonding structure.

Embodiments of the present disclosure provide a semiconductor device structure having vertically stacked complementary field effect transistors (CFETs). The CFETs are formed by bonding two substrates having semiconductor stacks formed thereon. A bonding structure is formed between the semiconductor stacks using wafer bonding technology. Embodiments of the resent disclosure enable the flexibility of choosing different N / P channel properties, provide a simple way to form the N / P channel isolation structure, and reduce potential leakage path and defects in stacked CFETs.

The invention relates to a heating and cooling system for wafer bonding equipment, which comprises a basic unit, a heating unit and a cooling unit, and is characterized in that the basic unit comprises an upper disc, a heating bin and a lower disc, and the heating bin is used for accommodating a wafer to be bonded and providing a vacuum environment for the wafer; the upper disc and the lower disc can be driven to be close to each other so as to apply set pressure to the wafer; an upper heater and a lower heater of the heating unit are used for heating the wafer in the axial direction, and an edge heater is used for carrying out heat compensation in the radial direction; an upper cooler and a lower cooler of the cooling unit are used for indirectly cooling the wafer; the wafer bonding device effectively improves heating uniformity and cooling efficiency in the wafer bonding process, can provide an accurate and effective vacuum environment for wafer bonding, and is simple in structure and easier to maintain and repair.

The utility model relates to the technical field of semiconductor manufacturing, and provides a wafer bonding jig and bonding equipment, and the wafer bonding jig comprises a jig body and an isolation unit. The jig body is provided with a bearing area; the isolation unit comprises an isolation base and an isolation piece; the isolation piece is arranged on the isolation base, the isolation base is movably arranged on the isolation base in the direction parallel to the bearing area, the isolation base is provided with a matching face, and the matching face faces the bearing area in the direction parallel to the bearing area. According to the utility model, the structure of the isolation unit is improved, so that the pressing head is linked with the isolation piece in the downward pressing process, and the downward pressing process of the pressing head and the pulling-out process of the isolation piece are kept synchronous.

The invention provides a preparation method of an LED chip structure and the LED chip structure. The preparation method comprises the following steps: providing an LED epitaxial wafer; pixel isolation is carried out on the LED epitaxial layer; the top surface of the electrode leading-out structure is higher than the first semiconductor layer; the bottom surface is in contact with an electrode leading-out position of the pixel unit; bonding a first temporary substrate on the electrode lead-out structure; stripping the substrate; based on the LED chip unit area, the LED epitaxial layer and the first temporary substrate are cut into a plurality of separated LED chip units; providing a second temporary substrate, wherein the material of the second temporary substrate is the same as that of the driving substrate; the LED chip unit is bonded to the second temporary substrate; the first temporary substrate is removed. According to the technical scheme, Die to wafer is realized, wafer to wafer bonding is carried out, the two substrates are made of the same material, and offset caused by thermal expansion difference in the bonding process is avoided; and moreover, the waste of Die is reduced, and the performance is improved.

The invention discloses a wafer bonding strength testing method, which comprises the following steps of: cutting a bonded wafer into strip-shaped samples, adjusting a precise translation table to enable a laser head to be aligned with a bonding layer, scanning the bonding layer of the sample by using laser to obtain an inward initial crack, monitoring the position of the initial crack by using a microscope, and adjusting the precise translation table according to the position of the initial crack to test the bonding strength of the wafer. The method comprises the following steps: calibrating a crack to obtain a calibrated crack, adhering test pull rings to two sides of a sample with the calibrated crack, performing tension test on the pull rings to obtain a load-displacement curve of the sample, and calculating the bonding strength of the sample according to the load-displacement curve of the sample. According to the method, the submicron aligned preset cracks are processed through cutting and closed-loop calibration, and then the wafer bonding strength is quantitatively tested through a DCB method, so that the problem that the bonding strength of internal positions of wafers of a D2W bonding sample and a W2W bonding sample cannot be quantitatively tested is solved.

The invention provides a three-degree-of-freedom micro-motion bonding head for a wafer bonding machine, relates to the technical field of ultra-precision piezoelectric driving, and aims to solve the problems that a traditional bonding head structure is low in response speed and poor in multi-degree-of-freedom cooperative micro-motion stability. An external frame unit and an internal frame unit are fixedly assembled on the micropositioner main substrate; the external frame unit comprises an X-direction piezoelectric actuator, a Y-direction piezoelectric actuator, an X-direction balance weight, a Y-direction balance weight and a parallel guiding flexible hinge, wherein the X-direction balance weight and the Y-direction balance weight are symmetrically distributed, and the external frame unit is used for achieving X-direction linear motion and Y-direction linear motion. The internal frame unit comprises a Z-direction piezoelectric actuator, a wafer bonding head and a tandem decoupling flexible hinge, and is used for realizing Z-direction linear motion; the piezoelectric actuator is used as a driving element and is matched with the flexible hinge to form a guiding and transmission mechanism, three-degree-of-freedom micro-motion of the bonding head in space is achieved, and meanwhile the structural design is optimized to improve motion decoupling performance, compactness and adaptability of stroke and precision.

The invention relates to the technical field of optical fiber communication, in particular to a thin-film lithium niobate electro-optical modulator of a stepped electrode, which comprises a substrate, a buffer layer, an optical waveguide, a metal electrode and a transition layer, the optical waveguide is an X-shaped or Y-shaped cutting LN film, a traditional ridge-shaped structure is adopted, the optical waveguide is bonded to the thick SiO2 buffer layer on the substrate, the film can be prepared through various technologies such as ion implantation, wafer bonding and hot slicing, and in order to improve the electro-optical overlapping coefficient and reduce light absorption loss, a silicon dioxide transition layer is used for connecting the metal electrode and the optical waveguide. The metal electrode is of a stepped structure, the electrode can effectively reduce electrical loss and obtain high bandwidth, and the electrode is used for generating an electric field in the aspect of photoelectric efficiency; the electric field is used for changing the functional characteristics of the thin-film lithium niobate layer and further changing the optical transmission characteristics of the waveguide, so that electro-optical modulation is realized. Therefore, the problem that an existing electro-optical modulator is low in modulation efficiency is solved.

The invention relates to the technical field of atomic gas chamber preparation, and discloses atomic gas chamber preparation equipment and method and an atomic gas chamber. The equipment comprises a vacuum box, a wafer bonding machine and an alkali metal injection device, the alkali metal injection device comprises a vacuum pump, an injection valve body, a heating piece, a vacuum firing pin and a vacuum probe row, the alkali metal injection and bonding process is carried out in a vacuum environment, and the situation that oxygen in the atmospheric environment oxidizes alkali metal and influences the quality of an atomic gas chamber can be effectively avoided; and meanwhile, external particulate matters are prevented from contaminating between the gas chamber component and the gas chamber sealing plate to influence the bonding effect and sealing performance, and the leakage rate of the atomic gas chamber can be effectively reduced, that is, the atomic gas chamber prepared by the atomic gas chamber preparation equipment is relatively high in yield and preparation efficiency.

According to one aspect of the present invention, a wafer-to-wafer bonding structure is provided, comprising a wafer having a first test pad, a first bonding pad formed on the first test pad, and a first insulating layer, wherein the first bonding pad penetrates the first insulating layer. The structure may further comprise a wafer having a second test pad, a second bonding pad formed on the second test pad, and a second insulating layer, wherein the second bonding pad penetrates the second insulating layer. The structure may further comprise a polymer layer surrounding all side surfaces of the first bonding pad and all side surfaces of the second bonding pad, the polymer layer being arranged between the wafer and the wafer. In addition, the wafer and the wafer may be bonded together.

The invention relates to the technical field of wafer bonding, in particular to a visual mechanism of a visual alignment device in wafer bonding equipment, and mainly solves the technical problems that the visual mechanism of the visual alignment device in the existing wafer bonding equipment is relatively complicated in design and the overall size of the device is relatively large. The visual mechanism of the visual alignment device in the wafer bonding equipment comprises a rack, a box body, a portal frame, an upper electrostatic chuck, a lower electrostatic chuck and an optical mechanism. The portal frame is arranged in the box body of the mechanism, the upper electrostatic chuck is arranged on the portal frame, the lower electrostatic chuck is installed in the portal frame, the upper visual assembly is installed on the top beam of the portal frame, and the lower visual assembly is located below the lower electrostatic chuck through the connecting frame, so that the structure compactness is high, and the size of the device is smaller; the method is suitable for being used in a space-limited scene.

The invention relates to an LED wafer bonding method capable of reducing warpage. The method comprises the following steps: (1) coarsening a P-type layer of an epitaxial wafer; (2) preparing a film on the surface; (3) manufacturing a metal layer; (4) coating photoresist on the surface of the substrate; (5) evaporating a metal material on the substrate; (6) removing the photoresist; (7) manufacturing silicon oxide on the substrate; (8) planarizing the surface of the silicon oxide by using CMP (chemical mechanical polishing) to expose the metal material; (9) bonding the epitaxial wafer with the substrate; (10) removing the GaAs substrate of the epitaxial wafer, and corroding the cut-off layer; (11) removing a part of the N-type ohmic contact layer, and performing roughening treatment; (12) etching and penetrating the current epitaxial layer, and removing the thin film in the step (2) to form a cutting channel; and (13) manufacturing an N electrode in the N-type ohmic contact layer region, and cutting along the cutting channel to obtain an independent chip. According to the invention, the contact area is reduced, the bonding contact area is optimized on the basis of meeting the use requirement, and the stress is reduced.

A bonding tool for bonding semiconductor dies to a semiconductor wafer is provided. The bonding tool includes a wafer chuck, an edge support, a hard plate, and a buffer layer. The wafer chuck carries the semiconductor wafer and the semiconductor dies placed on the semiconductor wafer. The edge support is disposed on the wafer chuck, the semiconductor wafer and the semiconductor dies are laterally surrounded by the edge support, and a top surface of the edge support substantially levels with surfaces of the semiconductor dies. The hard plate is movably disposed over the semiconductor dies, the edge support and the wafer chuck. The buffer layer is disposed on a bottom surface of the hard plate, and the buffer layer is in contact with the top surface of the edge support and the semiconductor dies when the hard plate moves towards the edge support.

The invention discloses wafer bonding equipment and a wafer bonding method based on bifocal imaging, and belongs to the field of bonding processing equipment. The wafer bonding equipment comprises a bearing table, a bonding assembly, a first displacement mechanism and a second displacement mechanism, a calibration plate, a first visual assembly and a second visual assembly are arranged corresponding to the alignment of a to-be-pasted chip and a target chip, and by means of the arrangement of paired detection light with equal focusing optical paths in the visual assemblies and the arrangement of the optical path difference of two optical paths in the visual assemblies, the two visual assemblies can achieve focusing imaging of calibration Marks and detection Marks on the two chips respectively. In this way, the relative positions of the two detection Marks are obtained, position compensation information needed when the two chips are accurately aligned is obtained, and finally accurate alignment of the two chips before bonding is achieved. The wafer bonding equipment is compact in structure and convenient to use, the alignment precision of the to-be-bonded chip and the target chip before bonding can be ensured, the quality of chip bonding processing is improved, and the reject ratio of chip processing is reduced.

A method includes placing a first wafer on a first wafer stage, placing a second wafer on a second wafer stage, and pushing a center portion of the first wafer to contact the second wafer. A bonding wave propagates from the center portion to edge portions of the first wafer and the second wafer. When the bonding wave propagates from the center portion to the edge portions of the first wafer and the second wafer, a stage gap between the top wafer stage and the bottom wafer stage is reduced.