850results about "Forming microstructural systems" patented technology

An acoustic sensor device comprises a package, a substrate disposed in the package or forming a part of the package, and a plurality of microelectromechanical system (MEMS) transducers supported by the substrate and packaged in the package. The plurality of sound ports configured to couple the plurality of MEMS transducers to an ambient environment of the acoustic sensor device. The plurality of sound ports are arranged in the package such that respective MEMS transducers, among the plurality of MEMS transducers, exhibit different directional pick-up patterns with respect to sound waves traveling in the ambient environment of the acoustic sensor device.

A microelectromechanical sensor includes a supporting body, a sensing structure including a measuring chamber and a sensitive element, the sensitive element being partially in the supporting body and facing the measuring chamber; and a cap coupled to the supporting body. The cap includes a buried cavity, inlet holes communicating with the environment external to the sensor and with the buried cavity, and coupling holes communicating with the measuring chamber and with the buried cavity. The inlet holes is in fluidic communication with the coupling holes by the buried cavity, and the inlet holes are offset with respect to the coupling holes.

A cover for an infrared detector and a method of fabricating the cover are disclosed. The cover comprises a wafer comprising a material such as silicon that transmits infrared radiation. The wafer has a first surface and a second surface opposite the first surface. An antireflective region is formed in the wafer to enhance transmission of infrared radiation through the cover. The antireflective region comprises a first plurality of antireflective elements such as moth-eyes formed in the first surface. The first plurality of antireflective elements are sized and shaped and arranged relative to one another to form a region of graded refractive index at the first surface so as to reduce the amount of infrared radiation reflected by the cover at the antireflective region. The cover comprises a wall extending from the first surface and surrounding the antireflective region. The wall comprises a plurality of layers of material deposited on the wafer so that, when the cover is bonded to a sensor substrate via the wall, a cavity is formed that encapsulates a sensor region of the sensor substrate. The depth of the cavity may be adjusted by depositing the plurality of layers of material with a combined thickness equivalent to the desired depth of the cavity. A second plurality of antireflective elements may be formed in the second surface to enhance the antireflective properties of the antireflective region.

The invention discloses an advanced method for manufacturing optoelectronic system arrays, where microdevices are developed separately and then transferred into a system substrate. The invention discloses multiple embodiments, including distributed sacrificial reference points, real-time monitoring with various sensing technologies, laser-generated alignment marks, non-contact laser triangulation, and using polymers for marking to assess and correct alignment during each transfer stage dynamically. The invention further discloses methods, which may be AI based, for detecting and correcting errors caused by wear, environmental changes, load variability, and mechanical vibrations. In general, this system for pre-transfer calibration, monitoring, error detection, and compensatory adjustments enables precise and reliable integration of microdevices into optoelectronic systems, significantly enhancing alignment accuracy, stability, and reliability throughout the manufacturing process. The system can be further an AI-based calibration validation in a microdevice transfer system.

The invention relates to the technical field of semiconductors, in particular to a preparation method of an MEMS micromirror, and the preparation method comprises the steps: providing a wafer substrate which is provided with a front surface and a back surface which are opposite to each other, and the front surface is a functional surface used for forming the MEMS micromirror; a conductive column and a first mark are formed on the wafer substrate, the conductive column penetrates through the wafer substrate, and the first mark is located on the back face of the wafer substrate; forming a second mark and a first functional structure on the front surface of the wafer substrate; forming a bonding layer on the front side of the wafer substrate, wherein the bonding layer is located above the conductive columns, the second marks and the first functional structures; forming a mark window for exposing the second mark on the bonding layer by taking the first mark as an overlay alignment point; and forming a second functional structure on the bonding layer by taking the second mark as an overlay alignment point, and aligning the second functional structure with the first functional structure in an overlay manner. Based on the technical scheme, the alignment precision in the MEMS micromirror preparation process can be effectively improved.

This MEMS device comprises: a lower lid (10); an upper lid (30) that forms a space between the upper lid (30) and the lower lid (10); a first substrate (20A) that is disposed facing the lower lid (10) in the space formed between the upper lid (30) and the lower lid (10), and is made of monocrystalline silicon; a second substrate (20B) that is disposed facing the upper lid (30) in the space formed between the upper lid (30) and the lower lid (10), is made of monocrystalline silicon, and includes a movable part (24B), the monocrystalline silicon of the second substrate (20B) being bonded to the monocrystalline silicon of the first substrate (20A); and a capacitance part that is provided between the upper lid (30) and the second substrate (20B) and / or between the first substrate (20A) and the second substrate (20B), and is configured such that the capacitance changes in accordance with the distance between the movable part (24B) and the upper lid (30) or the first substrate (20A).

Embedded sensor structures and stretchable embedded sensor films including a plurality of embedded sensor packages are described. An embedded sensor structure may include a sensor package including an integrated circuit (IC) die and sensor die bonded to a front side of the IC die, with the sensor die including a diaphragm that is deflectable toward a cavity. A planarization layer laterally surrounds the sensor package, and metal routing is formed on a top side of the sensor die and spanning over the planarization layer. Other aspects are also described and claimed.

A process for manufacturing a detection device having at least one thermal detector covered by a mineral sacrificial layer, at least one getter portion covered by a carbon-based sacrificial layer, and a thin encapsulation layer surrounding the thermal detector and the getter portion includes a making a through-opening extending through the mineral sacrificial layer and opening on the substrate. The carbon-based sacrificial layer is deposited so as to cover the getter portion located in the through-opening and to entirely fill the through-opening.

A method for fabricating a MEMS device comprising the following steps: providing a first bonding surface (1) on a first substrate (2) with a first substrate doping; providing a second bonding surface (3) on a second substrate (4) with a second substrate doping; aligning and joining the first and second bonding surfaces (1, 3) by a Si-Si direct bonding process, wherein both bonding surfaces (1, 3) have a silicon surface, and wherein an additional near-surface first doping layer (5) is produced below at least one of the bonding surfaces (1).

A torsional micro-electro-mechanical systems (MEMS) mirror module provides for thermally-stable ancillary modes of mirror oscillation (e.g., vertical, horizontal, and rocking) by utilizing MEMS die packaging techniques that implement a cantilevered (i.e., fixed-free) die package in which one end of the die is partially fixedly-attached to a die carrier substrate while the non-attached end of the die is free from the die carrier substrate and unsupported. The cantilevered die package with fixed-free architecture effectively decouples the effects of coefficient of thermal expansion (CTE) mismatch of the MEMS die, die-bond adhesive, and die carrier substrate on temperature-dependent MEMS flexure stress. Ancillary mode oscillation frequencies changes with temperatures are thus limited to a smaller range relative to those experienced with conventional package designs.

Described are transducer assemblies and imaging devices comprising: a microelectromechanical systems (MEMS) die including a plurality of piezoelectric elements; a complementary metal-oxide-semiconductor (CMOS) die electrically coupled to the MEMS die by a first plurality of bumps and including at least one circuit for controlling the plurality of piezoelectric elements; and a package secured to the CMOS die by an adhesive layer and electrically connected to the CMOS die.

A pressure sensor structure includes a sensor body including a diaphragm plate that functions as a sense electrode, a base electrode that faces the diaphragm plate, and a sidewall layer maintaining a gap between the diaphragm plate and the base electrode, and a conductive guard substrate to support the sensor body. The sidewall layer includes a guard electrode layer and upper and lower electrically insulating layers to electrically insulate the guard electrode layer. An electrically insulating layer is between the guard substrate and the sensor body to electrically insulate the guard substrate. The guard substrate is electrically connected to the guard electrode layer to function as a guard electrode together with the guard electrode layer.

A process for manufacturing a combined microelectromechanical device envisages: forming, in a sensor wafer, at least a first and a second microelectromechanical structures, at a main surface; forming, in a cap wafer, at least a first and a second cavities, at a respective main surface; forming a getter region inside the first cavity; bonding the main surfaces of the sensor and cap wafers by means of a bonding region, to define a first and a second hermetic environments for the microelectromechanical structures at different pressure values. A raised frame is formed, before the bonding step, in such a way as to be located around the first cavity; the bonding region determines the bonding of the sensor and cap wafers at the raised frame and the definition of the first hermetic environment associated with the first cavity, in a time interval prior to hermetic closure of the second cavity.

A MEMS audio device includes a first wafer having a top with a first cavity and a bottom with a vent hole coupled to the first cavity, wherein the bottom having first contacts, a second wafer disposed upon the first wafer having a flexible material layer disposed above the first cavity, a third wafer disposed upon the second wafer having physical contacts coupled to the second wafer, wherein the third wafer includes a second cavity disposed above the flexible material layer, a wiring wafer disposed below the first wafer having a second vent hole coupled to the first cavity, wherein the wiring wafer having second contacts coupled to the first contacts, and wherein the flexible material layer forms a diaphragm for the MEMS audio device.

A MEMS audio device includes a first substrate having a first surface, a cavity, and a first vent hole formed through the first substrate, a device layer disposed upon the first substrate comprising a semiconductor material sandwiched between a first and second oxides, wherein a portion of the semiconductor material is substantially free of oxide, wherein the first oxide is disposed against the first surface, and wherein the device layer comprises first contacts, a substrate disposed upon the device layer, including a first vent hole formed through the second substrate, and second electrical contacts coupled to the first electrical contacts, wherein the portion of the semiconductor material forms a diaphragm for the MEMS audio device and wherein the diaphragm is configured to move within the first cavity.

The present disclosure provides methods to integrate piezoelectric micromachined ultrasonic transducer (pMUT) arrays with an application-specific integrated circuit (ASIC) using thermocompression or eutectic / solder bonding. In an aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT array and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using thermocompression, wherein any set of individual PMUTs of PMUT array is addressable. In another aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT array and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using eutectic or solder bonding, wherein any set of individual PMUTs of the PMUT array is addressable.

A method for forming a bore for a cavity within a semiconductor layer stack. The method includes forming a first partial bore using a first laser ablation step starting at an outer surface of the stack so that the first partial bore extends with a first mean dimension and aligned in parallel with the outer surface, starting from the outer surface, and a bottom surface of the first partial bore lying between the outer surface and the cavity, and forming a second partial bore using a second laser ablation step started from the bottom surface of the first partial bore so that the second partial bore extends with a second mean dimension, aligned in parallel with the outer surface and is smaller than the first mean dimension, through the bottom surface into the cavity or an access channel opening at the cavity or connected to the cavity.

Various embodiments of the utility model relate to a semiconductor device. The semiconductor device comprises a sensing electrode, a first dielectric layer, a second dielectric layer, an actuating diaphragm and a third dielectric layer. The sensing electrode is located above the substrate and between the plurality of isolation trenches. A plurality of portions of the first dielectric layer are on the sensing electrode. A portion of the second dielectric layer is on the sensing electrode and on the portions of the first dielectric layer. The actuating diaphragm is over the second dielectric layer, wherein the actuating diaphragm is spaced apart from the second dielectric layer by a cavity. The third dielectric layer is located on the actuating diaphragm, the third dielectric layer is located between the actuating diaphragm and the cavity, and the thickness of a part of the second dielectric layer is larger than that of the third dielectric layer.

A micro-vacuum cell comprising at least one vacuum enclosure, the vacuum enclosure comprising at least a lid of a first material, the first material having a first coefficient of thermal expansion; a base of a second material, the second material having a second coefficient of thermal expansion, where the vacuum enclosure is formed above a portion of the base; and a cold weld compression seal attaching the lid to the base along a periphery of said portion of the base; wherein one of the first and second coefficients of thermal expansion is at least five times larger than the other of the first and second coefficients of thermal expansion; and wherein the pressure in the vacuum enclosure is smaller than an atmosphere.

A biosensor system package includes: a transistor structure in a semiconductor layer having a front side and a back side, the transistor structure comprising a channel region; a buried oxide (BOX) layer on the back side of the semiconductor layer, wherein the buried oxide layer has an opening on the back side of the channel region, and an interface layer covers the back side over the channel region; a multi-layer interconnect (MLI) structure on the front side of the semiconductor layer, the transistor structure being electrically connected to the MLI structure; and a cap structure attached to the buried oxide layer, the cap structure comprising a microneedle.

The present disclosure provides methods to integrate piezoelectric micromachined ultrasonic transducer (pMUT) arrays with an application-specific integrated circuit (ASIC) using thermocompression or eutectic / solder bonding. In an aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT array and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using thermocompression, wherein any set of individual PMUTs of PMUT array is addressable. In another aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT array and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using eutectic or solder bonding, wherein any set of individual PMUTs of the PMUT array is addressable.

A MEMS device formed using back-end of line (BEOL) materials in a CMOS process, where vHF post-processing and post-backing are applied to form the MEMS device, and the MEMS device has a total dimension of 50 μm to 150 μm. The MEMS device can be implemented as an inertial sensor, among other applications.

A semiconductor device and method of forming such a device includes a MEMS component including one or more MEMS pixels and having a MEMS membrane substrate and a MEMS sidewall. The semiconductor device includes an analog circuit component bonded to the MEMS component, and which includes at least one analog CMOS component within an analog circuit insulative layer, and an analog circuit component substrate. The semiconductor device includes an HPC component bonded to the analog circuit component substrate. The HPC component includes at least one HPC metal component disposed within an HPC insulative layer, at least one bond pad, at least one bond pad via connecting the at least one bond pad and the at least one HPC metal component, and an HPC substrate. Additionally, the semiconductor device includes a DTC component bonded to the HPC substrate, and which includes a DTC die disposed in a DTC substrate.

The invention discloses a laser-induced fusion atomic layer deposition method for a flexible graphene sensing electrode, which belongs to the field of micro-nano manufacturing and specifically comprises four procedures of laser induction, three-dimensional atomic layer deposition, flexible transfer printing and electrode assembly. Firstly, three-dimensional porous graphene grows on a polyimide film through laser induction, and then a gas-phase precursor is allowed to alternately enter a porous graphene framework and be continuously deposited on hole walls by utilizing the self-limiting layer-by-layer growth characteristic of atomic layer deposition, so that a conductive metal atomic layer covering in a full-step manner is formed; and finally, through liquid silica gel pouring-curing stripping, transferring the porous graphene / metal atomic layer to a flexible substrate, and carrying out electrode packaging. The nano-scale metal atomic layers are in interface contact / disconnection, the micron-scale graphene framework is in bridge connection with the atomic layers at the interface, the functions are different and have complementary advantages, the piezoresistive synergistic effect is contributed under the micro-nano scale, and the sensitivity and the response range of the flexible graphene-based sensing electrode are remarkably enhanced.

A micro-electromechanical-system (MEMS) device may include a capacitive micromachined ultrasonic transducer (CMUT) that includes an actuation membrane and a sensing dielectric layer that are spaced apart by a cavity. The sensing dielectric layer may be formed such that the thickness of the sensing dielectric layer may extend the operational of the CMUT while enabling the CMUT to accommodate a sufficiently high direct current voltage bias for collapsed mode operation. In this way, the thickness of the sensing dielectric layer enables the CMUT to operate in the collapsed mode, which enables the CMUT to achieve greater sound pressure output relative to other operational modes and enables the frequency response of the CMUT to be adjustable, thereby enabling the frequency response to be optimized for specific use cases and applications.

One aspect of the present disclosure pertains to a device. The device includes a substrate, a logic circuit disposed on the substrate, and a nanoelectromechanical systems (NEMS) device electrically connected to the logic circuit and formed on the substrate. The NEMS device includes a first electrode electrically connected to the logic circuit, a second electrode electrically connected to a first power supply, a movable feature electrically connected to the second electrode, and a control electrode operable to move the movable feature relative to the first electrode.