291 results about "Microelectronics" patented technology

The invention relates to the technical field of microelectronics, semiconductors and communication, and discloses a radio frequency switch chip, and the circuit structure of the radio frequency switch chip comprises a transformer type differential inductor T-L1, a transformer type differential inductor T-L2, a capacitor C1, an NMOS transistor M1, an NMOS transistor M2, a gate resistor RG1, and a gate resistor RG2. The radio frequency switch chip provided by the invention adopts a differential structure, so that the parasitic inductance effect of a grounding key and a wire during packaging and testing can be eliminated, and the insertion loss and the isolation performance are improved; compared with a single-end port, the lower impedance of the differential port is more beneficial to improving the power capacity of the switch; the differential structure allows the transformer type differential inductor to use differential signal characteristics, the equivalent quality factor of the inductor is improved, and the circuit performance is improved; the differential structure can improve the linearity of the circuit, especially the second-order intermodulation effect; the differential structure can be compatible with a modern silicon-based CMOS radio frequency system, and an additional balun is not needed for signal conversion.

The invention relates to the technical field of microelectronics, in particular to a unimolecular memristor based on a viologen derivative and a preparation method of the unimolecular memristor. The unimolecular memristor based on the viologen derivative comprises an electrode pair and an organic functional molecule, and the organic functional molecule is selected from the viologen derivative and assembled between the electrode pair through an amide condensation reaction. According to the organic functional molecule provided by the invention, functional modification is performed on the basis of a viologen molecular structure, so that an energy barrier of reversible oxidation-reduction reaction of a viologen unit is effectively reduced, and the performance of the single-molecule memristor is remarkably improved; meanwhile, the on-off ratio of the device is also improved by one order of magnitude. According to the preparation method provided by the invention, the stability and repeatability of a monomolecular device can be ensured, and the conductive stability and durability of the molecular junction of the organic functional molecule are effectively improved. The method is simple and convenient to operate, reaction conditions are easy to control, and large-scale production of molecular devices is facilitated.

The invention belongs to the field of microelectronics, and particularly relates to a ferroelectric capacitor, a preparation method thereof and a three-dimensional ferroelectric memory array, and the ferroelectric capacitor comprises a substrate, a bottom electrode, a ferroelectric dielectric layer, a deoxidizing layer and a top electrode which are sequentially arranged from bottom to top; the ferroelectric medium layer is an Hf < 1-x > Zr < x > O < 2 > layer, 0 lt; xlt; the Hf-rich composition is realized by controlling the Hf: Zr super-cycle ratio of atomic layer deposition; the thickness of the ferroelectric medium layer is 1-6 nm, and the thickness of the bottom electrode is 0.1-5 nm. Compared with the prior art, the problems of polarization characteristic degradation caused by thinning of the ferroelectric layer in the hafnium-based ferroelectric capacitor and crosstalk in the FeRAM in the prior art are solved. According to the scheme, the oxygen vacancy concentration is accurately adjusted to inhibit the formation of a non-ferroelectric phase, so that the ultra-thin ferroelectric film can still maintain relatively high remanent polarization while the size is reduced, a storage window is effectively improved, and the wake-up requirement is reduced.

The invention belongs to the field of microelectronics, and particularly relates to a ferroelectric capacitor for improving initial state polarization intensity and a preparation method and application thereof.The ferroelectric capacitor comprises a substrate, a bottom electrode, an ultrathin ferroelectric medium layer and a top electrode which are sequentially stacked from bottom to top; the ultra-thin ferroelectric dielectric layer is an Hf < 1-x > Zr < x > O < 2 > thin film, 0 lt; xlt; and in the atomic layer deposition process, the Hf-rich thin film is grown and formed by controlling the Hf: Zr super-cycle ratio. Compared with the prior art, the ferroelectric capacitor solves the problems that in the prior art, in order to improve the initial-state polarization intensity of the ferroelectric capacitor, a function matched with the HZO thin film is added, the thickness is increased due to layers, and the improvement effect is limited. According to the scheme, the doping proportion of Hf in the ultra-thin ferroelectric dielectric layer is properly increased, the formation energy of a non-ferroelectric T phase is remarkably improved, stable existence of a ferroelectric O phase is further promoted, and therefore the ferroelectric O phase with ferroelectric hysteresis close to the situation that awakening is not needed, a high initial state 2Pr value and a high content is achieved.

The invention relates to the technical field of microelectronic manufacturing. The invention discloses a double-layer V-shaped nanowire structure which comprises a base layer arranged on a substrate and further comprises an upper-layer nanowire and a lower-layer nanowire which spatially grow on the base layer in a staggered mode, the upper-layer nanowire and the lower-layer nanowire are broken line type nanowires, and horizontal projections of break points of the broken line type nanowires and horizontal projections of break points of the broken line type nanowires and the lower-layer nanowire coincide and are located on the same plumb line. And the broken line type nanowire on the upper layer is broken at the break point to form a gap. According to the invention, two spatially staggered nanowires are grown by using single IPSLS, the lower layer continuous silicon nanowire is used as a conductive channel, and the upper layer gap nanowire is used as an adjustable depletion gate, so that the preparation process flow of the double-layer V-shaped nanowire structure is greatly simplified, and multiple quantum islands can be integrated to construct a compact quantum bit chain.

Techniques for joining dissimilar materials in microelectronics are provided. Example techniques direct-bond dissimilar materials at an ambient room temperature, using a thin oxide, carbide, nitride, carbonitride, or oxynitride intermediary with a thickness between 100-1000 nanometers. The intermediary may comprise silicon. The dissimilar materials may have significantly different coefficients of thermal expansion (CTEs) and / or significantly different crystal-lattice unit cell geometries or dimensions, conventionally resulting in too much strain to make direct-bonding feasible. A curing period at ambient room temperature after the direct bonding of dissimilar materials allows direct bonds to strengthen by over 200%. A relatively low temperature anneal applied slowly at a rate of 1° C. temperature increase per minute, or less, further strengthens and consolidates the direct bonds. The example techniques can direct-bond lithium tantalate LiTaO3 to various conventional substrates in a process for making various novel optical and acoustic devices.

The invention relates to the technical field of microelectronics, and discloses a three-dimensional stacked near-memory computing architecture, a chip and a data access method. The memory device comprises at least one computing chip layer and at least one memory chip layer which are stacked along a first direction, a plurality of vertical interconnection channels extending along the first direction; the memory chip layer comprises a plurality of memory banks; the computing chip layer comprises a plurality of computing cluster units; the computing cluster unit comprises at least one storage controller; and the storage controller is connected with at least one of the plurality of storage banks through the vertical interconnection channel and is used for managing data in the correspondingly connected storage banks. The problems that in a three-dimensional stacking computing architecture, storage access delay is high, and the bandwidth expansion capacity is limited are solved.

Silicon Photonics is a candidate technology for adding integrated optics functionality, either passive or active optical waveguides) to integrated circuits by leveraging the economies of scale of the CMOS microelectronics industry and using materials for the waveguide core such as silicon nitride (SiXNY) and silicon oxynitride (SiOXN1-X) for example. Microelectromechanical systems (MEMS) provide for movable platforms relative to the substrate allowing additional functionality to be added to a silicon circuit but also Silicon Photonics. Accordingly, by combining “fixed” waveguides formed upon the substrate with “movable” waveguides formed upon one or more movable platforms the inventors have established a series of Integrated Optics MEMS (IO-MEMS) based on Silicon Photonics. Such IO-MEMS include optical switches, optical attenuators, optical gates, optical switch matrices, configurable wavelength division multiplexer / demultiplexer devices, etc. exploiting both platforms and deformable beams.

A microelectronics device with anti-counterfeiting measures that includes an integrated circuit packaging and a piezoelectric element embedded on the integrated circuit packaging, such as on the surface of the integrated circuit packaging. The piezoelectric element is configured to generate a unique identification code in response to a series of controlled mechanical stresses being applied to the piezoelectric element. Due to the inherent variability in piezoelectric responses, there is a high degree of uniqueness in the identification code making them extremely difficult for counterfeiters to replicate. Furthermore, by applying different stress sequences, a multitude of unique identification codes can be generated from a single piezoelectric element providing an additional layer of security. In this manner, by embedding a piezoelectric element on the integrated circuit packaging, a highly secure, cost-effective, and difficult to replicate anti-counterfeiting technique for the microelectronics industry has been developed.

The invention discloses a polyimide intrinsic microporous membrane, a diamine monomer adopted by the polyimide intrinsic microporous membrane and a preparation method of the polyimide intrinsic microporous membrane and the diamine monomer. The polyimide intrinsic microporous membrane is prepared from a dianhydride monomer and the diamine monomer with a dibenzo spirofluorene xanthene structure, the diamine monomer with the dibenzo spirofluorene xanthene structure is prepared by the following steps: firstly, condensing substituted or unsubstituted 2-nitro-9-fluorenone with 1-naphthol, then carrying out nitration, and finally, carrying out reduction, thereby obtaining the diamine monomer with the dibenzo spirofluorene xanthene structure. The dibenzo spirofluorene xanthene structure contained in the polyimide intrinsic microporous membrane can effectively reduce the dielectric constant of a polymer, the polyimide intrinsic microporous membrane can be applied to the technical field of electronics and microelectronics, the asymmetric diamine structure enables a main chain of a macromolecular chain to be twisted, the twisted macromolecular chain can effectively enlarge interchain pores, and therefore the polyimide intrinsic microporous membrane has the advantages that the dielectric constant of the polymer can be effectively reduced; therefore, the free volume of the polymer is increased, the polymer has higher permeability, selectivity can be balanced, and the polymer can be applied to the technical field of membrane separation.

A microneedle array system with heterogeneous needles, designed for the enhanced transdermal delivery of bioactive agents for therapeutic and diagnostic purposes. This system includes a variety of microneedle 140 configurations, such as primary and secondary microneedles that differ in size, shape, and material to optimize delivery and functionality. Secondary needles are specifically designed with additional features such as sensors, specialized coatings, and microelectronics to perform tasks beyond simple delivery, such as in-situ detection and measurement of physiological responses, and stimulation for enhanced drug absorption and therapeutic effect.

The invention relates to a method for growing a graphene film on the surface of silicon oxide, which comprises the following steps of: S1, providing a silicon oxide wafer substrate which comprises a silicon wafer and a silicon oxide film positioned on the surface of the silicon wafer, and the thickness of the silicon oxide film is 90-300nm; and S2, under the assistance of plasmas with the power of 20-50 watts and at the temperature of 380-600 DEG C, carbon source gas is introduced, and the graphene film with the thickness of 10-20 nm is obtained on the oxidized silicon wafer substrate through PECVD (Plasma Enhanced Chemical Vapor Deposition) growth. According to the method for growing the graphene film on the surface of the silicon oxide, thick-layer graphene is directly grown on the surface of the silicon oxide in a large area through PECVD, various problems caused by graphene transfer are solved, the obtained graphene film is high in quality, preparation of the graphene film with the controllable thickness can be achieved, and a foundation is laid for application of the graphene film in microelectronics.

A method and system is presented for an implantable wireless power receiver for use with a medical stimulation or monitoring device. The receiver receives transmitted energy through one or more non-inductive antenna(s), utilizes microelectronics to perform rectification of the received signal for generation of a DC power supply to power an implantable device, and may also utilize microelectronics to provide parameter settings to the device, or stimulating or other waveforms to a tissue.

The invention discloses a modulation circuit applied to a temperature sensor and a modulation method thereof, and relates to the field of microelectronics and solid state electronics, in particular to the modulation method of the temperature sensor in the field. The invention provides a modulation circuit and method applied to a temperature sensor. An implementation circuit of the method comprises a temperature sensing front end with a variable proportion current source and an ADC (Analog to Digital Converter) based on a Sigma Delta modulator. According to the method, a temperature sensing front end and an ADC modulator are combined through a variable proportion current source, the amplification of delta VBE and the addition process of VBE are put in the modulation process through a mode of changing the proportion of current introduced into a BJT transistor through DEM control, an additional amplification and addition circuit and an additional BJT transistor are not needed, errors introduced in an intermediate link are reduced, and the structure is simplified. In addition, the method can effectively solve the problems of BJT mismatch, operational amplifier imbalance and the like, and can improve the accuracy of temperature measurement.

The invention provides an organic metal compound and a preparation method thereof, a patterning composition, a patterning method, a patterning film, a patterning substrate and an electronic component, the organic metal compound is obtained through special molecular design, the molecular formula of the organic metal compound comprises a structure shown as a formula 1: (RaM) b (mu2-O) c (L) d formula 1, [mu] 2-O is a two-linked oxygen atom, R is at least one of C1-30 linear alkyl or branched alkyl or naphthenic base, C2-30 alkenyl, C2-30 alkynyl and C6-30 aryl; l is an organic ligand capable of coordinating with M, M is Sn, Sd or In, 1 < = a < = 5, 1 < = b < = 10, 1 < = c < = 10, and 1 < = d < = 6b. The organometallic compound of the present invention can be used with advantages in terms of high resolution and pattern fidelity, and is particularly suitable for fine patterning in microelectronic and semiconductor manufacturing.

Described are treatment compositions for treating a water source, such as a microelectronics process wastewater, and methods of treating the water source. The composition includes one or more of an inorganic salt, a treatment polymer, and a colloidal particle. A flocculant may be added to the water source before or after the inorganic salt, treatment polymer, and colloidal particle. The methods and compositions may be used for treating wastewater, for example.

Disclosed herein are light detection and ranging (LIDAR) systems and methods for manufacturing the same. The LIDAR systems may include microelectronics packages that may include a chassis, an insert, a photonic integrated circuit (PIC), and a lid. The chassis may define an opening. The insert is sized to be received in the opening. The insert is made of a thermally conductive material. The PIC is attached to the insert. The lid is connected to the chassis and defines a cavity that encases the PIC. Both the insert and the lid form thermally conductive pathways away from the PIC.

The present disclosure relates to the technical field of microelectronics, and in particular to a capacitor-less dynamic random access memory structure and a manufacturing method therefor. The structure comprises: a low-leakage transistor and a vertical complementary field effect transistor, wherein a drain of the low-leakage transistor is connected to a common gate of the vertical complementary field effect transistor; and drains of P-type and N-type transistors of the vertical complementary field effect transistor are connected to each other, a source of the P-type transistor is connected to a power supply end, and a source of the N-type transistor is connected to a ground wire.

The invention relates to a ferroelectric field effect transistor memory and a preparation method thereof in the technical field of microelectronics, the ferroelectric field effect transistor memory comprises a substrate layer, a gate electrode, a ferroelectric layer, a semiconductor channel layer and a source and drain electrode layer which are stacked in sequence, and the work function WF of the material of the gate electrode is less than 4.5 eV. According to the ferroelectric field effect transistor memory, the partial voltage of the semiconductor channel layer can be reduced, the partial voltage and the electric field intensity of the ferroelectric layer can be increased, the erasing effect of the FeFET memory can be effectively improved, and the memory window of the FeFET memory can be improved.

The utility model relates to a through hole detection device based on a conductive medium and a conductive microprobe, and belongs to the technical field of semiconductor manufacturing equipment and microelectronics. The device comprises an object carrying disc which is used for placing a sample wafer to be detected, and an electrode column is arranged in the object carrying disc; the transparent circuit substrate is arranged above the carrying disc, a conductive microprobe directly facing the sample wafer on the carrying disc is arranged on the transparent circuit substrate, the conductive microprobe is used for being in contact with the conductive medium to detect the conductivity injection mechanism of the through hole, and the transparent circuit substrate is used for injecting the conductive medium into the carrying disc. The conducting medium enters the through hole of the sample sheet under the capillary action to form a liquid column; and the observation device is arranged above the transparent circuit substrate and is used for observing the conductive medium in the through hole and the contact condition between the conductive microprobe and the conductive medium. According to the utility model, the conductive probe is combined with the carrying disc, the through hole is detected by using the conductivity and capillary action of the liquid metal, and the test efficiency is high.

The invention belongs to the technical field of preparation of new energy materials and supercapacitors, and particularly relates to a Mo-Fe co-doped MnO2 / Ag-CNTs composite electrode and a preparation method and application thereof. The method comprises the following steps: firstly, preparing an activated carbon cloth substrate, a deposition solution A and a deposition solution B; then the deposition solution A and the deposition solution B are mixed to obtain a Mo-Fe-MnO2 deposition solution, and an Ag-CNTs deposition solution is prepared; and finally, electro-deposition is alternately carried out in the Mo-Fe-MnO2 deposition solution and the Ag-CNTs deposition solution, and the Ag-CNTs / Mo-Fe-MnO2 / Ag-CNTs composite material is obtained. The preparation process provided by the invention is simple and controllable, and the large-scale preparation of the high-performance composite electrode is easy. The electrode is unique in structure and excellent in performance, and a flexible solid-state PSCSC device assembled by the electrode has high energy storage density and efficient mechanical energy self-charging capacity and shows huge application potential in the field of self-powered wearable / implantable microelectronics.

Described are filters and filter products that contain a microporous membrane for filtration, wherein at least one layer of the membrane has an average pore size less than 0.035 microns; the filter or filter product and its membrane may be used in an ultra-filtration or nano-filtration process such as for processing microelectronics or semiconductor processing fluids.

The present invention relates to the field of semiconductor integrated circuit manufacturing technology, specifically to a wafer positioning device for a glue coating and developing machine, comprising a wafer picking and gluing table, wherein the left side of the front side of the wafer picking and gluing table is fixedly connected to a wafer gluing mechanism, the wafer picking and gluing table comprises a base, the top right side of the base is fixedly connected to a picking component, the top left side of the base is fixedly connected to a gluing component, the wafer gluing mechanism comprises a rotating control base, and the top of the rotating control base is provided with a rotating table. The present invention realizes high-precision and high-efficiency positioning and processing of wafers in a glue coating and developing machine by providing a wafer picking and gluing table and a wafer gluing mechanism. Through a series of precise mechanical structures and electrical controls, the present invention ensures the stability and accuracy of the wafer in various processing steps such as picking, placing, and gluing, thereby greatly improving the production efficiency and product quality in the fields of semiconductor manufacturing, microelectronics processing, etc.

The application provides a GaN amplitude-phase control multifunctional chip and a phased array system, and belongs to the technical field of microelectronics. The GaN amplitude-phase control multifunctional chip comprises an input port, an output port, a distributed current multiplexing amplifier, a phase shifter, a first DC blocking capacitor and a second DC blocking capacitor; the distributed current multiplexing amplifier comprises a first switch tube, a second switch tube, a first gate voltage supply circuit, a DC self-bias circuit, a negative feedback circuit, a first choke filter circuit, a second gate voltage supply circuit, a second choke filter circuit and a voltage source. The application is based on the above-mentioned components and the connection relationship between the components, so that the push stage amplifier in the GaN amplitude-phase control multifunctional chip adopts a distributed current multiplexing structure, thereby reducing the power consumption of the push stage amplifier, improving the efficiency of the GaN amplitude-phase control multifunctional chip, and enabling the GaN amplitude-phase control multifunctional chip to realize high efficiency under the condition of small size and high power.

The present application relates to a kind of polyimide film and its preparation method and application, mainly solve the optical transparency of polyimide film in prior art and the dimensional stability difficult to be compatible with the problem of difficulty.This colorless transparent polyimide film provided by the present application has excellent comprehensive performance, simple preparation method, wide raw material source, and has excellent application prospect in the field of flexible display, advanced microelectronics and the like.

The invention relates to the technical field of vacuum microelectronics, and discloses a microwave plasma CVD cavity structure and MPCVD equipment, the CVD cavity structure comprises a copper table body and a substrate bearing surface arranged at the top of the copper table body, a copper column is arranged above the copper table body, a sunken part is arranged on one side, opposite to the copper table body, of the copper column, and the substrate bearing surface is arranged on the other side of the copper column. The substrate bearing surface is semi-surrounded by the sunken part, a gap delta H is reserved between the sunken part and the substrate bearing surface, and delta H is larger than or equal to 5mm and smaller than or equal to 50mm; the included angle theta between the axial center line of the copper column and the center axis of the copper table body is larger than or equal to 0 degree and smaller than or equal to 60 degrees. The invention aims to effectively enhance the intensity of the electric field above the substrate and greatly improve the distribution uniformity of the electric field on the premise of not obviously increasing the manufacturing cost and the process complexity, thereby providing a reliable solution for realizing large-area, high-uniformity and high-stability plasmas.

The application discloses a signal processing circuit of a field effect sensor and a processing method and a sensor device thereof, and relates to the field of semiconductor microelectronics. The signal processing circuit of the field effect sensor comprises a first field effect sensor, a comparison module, a first node, a third voltage signal terminal, a fourth voltage signal terminal and a second node. The gate of a first transistor is electrically connected with the second node, the source of the first transistor is electrically connected with a fifth voltage signal terminal, the drain of the first transistor is electrically connected with a reading module, and the signal of the fifth voltage signal terminal is the same as the signal of the first voltage signal terminal. The comparison module is used for controlling the signal of the second node to make the first transistor conductive when the voltage value of the signal of the first node is within the range of the voltage value of the signal of the third voltage signal terminal and the voltage value of the signal of the fourth voltage signal terminal. The application can calculate the PH value of a to-be-measured liquid drop based on the signal of the field effect sensor.

Direct-bonded optoelectronic interconnects for high-density integrated photonics are provided. A combined electrical and optical interconnect enables direct-bonding of fully-processed optoelectronic dies or wafers to wafers with optoelectronic driver circuitry. The photonic devices may be III-V semiconductor devices. Direct-bonding to silicon or silicon-on-insulator (SOI) wafers enables the integration of photonics with high-density CMOS and other microelectronics packages. Each bonding surface has an optical window to be coupled by direct-bonding. Coplanar electrical contacts lie to the outside, or may circumscribe the respective optical windows and are also direct-bonded across the interface using metal-to-metal direct-bonding, without interfering with the optical windows. Direct hybrid bonding can accomplish both optical and electrical bonding in one overall operation, to mass-produce mLED video displays. The adhesive-free dielectric-to-dielectric direct bonding and solder-free metal-to-metal direct bonding creates high-density electrical interconnects on the same bonding interface as the bonded optical interconnect. Known-good-dies may be used, which is not possible conventionally, and photolithography over their top surfaces can scale to high density.

Provided is a micromechanical electrical signal amplifier, which can be applied to the field of microelectronics. The structure of the amplifier comprises: an electro-mechanical conversion structure for generating an electrostatic driving displacement; a mechanical resonance structure for generating an amplified electrical signal in response to the amplified electrostatic driving displacement; and a mechanical-electric conversion structure for outputting the amplified electrical signal, wherein the mechanical resonance structure comprises a first surface and a second surface arranged oppositely; the electro-mechanical conversion structure is connected to the first surface of the mechanical resonance structure; and the mechanical-electric conversion structure is connected to the second surface of the mechanical resonance structure. The elastic beam group in the mechanical resonance structure adopts a piezoresistive material, and the self-amplification effect of the mechanical resonance structure is used to amplify the electrostatic force response displacement and further amplify the electrical signal.

A microelectronics package comprises a substrate comprising at least two conductive layers that are separated by a first dielectric. At least one island comprising a magnetic material is embedded within the dielectric between the two conductive layers. An inductor structure extends within a via in the at least one island. The via extends between the two conductive layers. The inductor structure comprises a conductive wall along a sidewall of the via, and wherein the conductive wall surrounds a second dielectric and is electrically coupled to the two conductive layers.