441 results about "Microelectronics" patented technology

Direct bonded stack structures for increased reliability and improved yields in microelectronics are provided. Structural features and stack configurations are provided for memory modules and 3DICs to reduce defects in vertically stacked dies. Example processes alleviate warpage stresses between a thicker top die and direct bonded dies beneath it, for example. An etched surface on the top die may relieve warpage stresses. An example stack may include a compliant layer between dies. Another stack configuration replaces the top die with a layer of molding material to circumvent warpage stresses. An array of cavities on a bonding surface can alleviate stress forces. One or more stress balancing layers may also be created on a side of the top die or between other dies to alleviate or counter warpage. Rounding of edges can prevent stresses and pressure forces from being destructively transmitted through die and substrate layers. These measures may be applied together or in combinations in a single package.

A microelectronics package comprises a substrate comprising at least two conductive layers that are separated by a first dielectric. At least one island comprising a magnetic material is embedded within the dielectric between the two conductive layers. An inductor structure extends within a via in the at least one island. The via extends between the two conductive layers. The inductor structure comprises a conductive wall along a sidewall of the via, and wherein the conductive wall surrounds a second dielectric and is electrically coupled to the two conductive layers.

The invention belongs to the field of microelectronics, and particularly relates to a full-transparent HfO2-based ferroelectric capacitor and a preparation method and application thereof, and the full-transparent HfO2-based ferroelectric capacitor comprises a substrate, a bottom electrode, a ferroelectric medium layer and a top electrode which are sequentially stacked from bottom to top. Insertion layers are respectively arranged between the ferroelectric medium layer and the bottom electrode and between the ferroelectric medium layer and the top electrode. And the intercalation layer is a TiOx intercalation layer. Compared with the prior art, the defects that in the prior art, the ferroelectric performance of a transparent ferroelectric device is poor, a high annealing temperature is needed, and then the thermal budget requirement of a back-end process is not met are overcome; the TiOx intercalation layers are introduced to the two sides of the ferroelectric dielectric layer, so that the grain orientation is improved, the annealing temperature can be reduced to 400 DEG C, and the method can be compatible with a back-end process.

The invention belongs to the field of microelectronics, and particularly relates to a preparation method and application of a ferroelectric diode based on a scandium-doped aluminum nitride thin film, and the ferroelectric diode is prepared through the following steps: S1, growing an adhesion layer on a substrate through magnetron sputtering; s2, growing a bottom electrode on the adhesion layer through magnetron sputtering; s3, growing a ferroelectric film on the bottom electrode through magnetron co-sputtering at room temperature; s4, coating photoresist on the ferroelectric film, and exposing and developing; s5, growing a top electrode on the exposed and developed ferroelectric film through magnetron sputtering; and S6, stripping to obtain the ferroelectric diode. Compared with the prior art, the method has the advantages that the problems of high preparation temperature of the Al1-xScxN layer and large thickness of the Al1-xScxN layer in the prior art are solved, the ferroelectric diode memory of the scandium-doped aluminum nitride film is prepared at room temperature for the first time, and compatibility with a CMOS (complementary metal oxide semiconductor) process is better realized.

The invention discloses a Ga2O3 heterojunction beta irradiation battery with a multi-groove radioactive source, relates to the technical field of microelectronics, and solves the problems of low energy utilization rate and low energy conversion efficiency of a Ga2O3 nuclear battery radioactive source in the prior art. The battery comprises a filling type multi-groove radioactive source; the Ga2O3 heterojunction diode unit sequentially comprises a P-type ohmic contact electrode, a P-type NiO ion implantation region, an N-type Ga2O3 low-doped epitaxial layer, an N-type Ga2O3 high-doped substrate and an N-type ohmic contact electrode from top to bottom; a multi-T-type radioactive isotope source layer in the filling type multi-groove radioactive source is arranged above the P-type NiO ion implantation region and forms radiation energy coupling with the Ga2O3 heterojunction diode unit; the groove type structure is filled with the radioactive source, the energy deposition of the radioactive source entering the semiconductor conversion device is greatly increased, and the energy conversion efficiency of the Ga2O3 beta irradiation battery is improved.

The invention relates to the technical field of microelectronics, and discloses a small and special electric machine armature defect detection method based on improved YOLOv11n, which comprises the following steps: S1, acquiring small and special electric machine armature defect image data; s2, constructing an armature defect network model, wherein an original YOLOv11n model structure is improved by constructing a C3K2-MA module; a lightweight feature extraction module is used to replace a convolution module in a trunk feature extraction and down-sampling process, and a down-sampling module is improved; the CIoU of the original YOLOv11n model is improved by using DIOU, so that the model precision is improved, and a loss function is improved; s3, using the training set and the test set obtained in the step S1 to train through the armature defect network model constructed in the step S2; and S4, using the trained armature defect network model to carry out field detection on the armature defects of the small and special electric machine. According to the invention, a partial multi-scale feature aggregation module C3K2-MA is provided, the detection capability of different scale targets is significantly improved, and the detection precision is improved.

The invention relates to the technical field of microelectronics, semiconductors and communication, and discloses a radio frequency switch chip, and the circuit structure of the radio frequency switch chip comprises a transformer type differential inductor T-L1, a transformer type differential inductor T-L2, a capacitor C1, an NMOS transistor M1, an NMOS transistor M2, a gate resistor RG1, and a gate resistor RG2. The radio frequency switch chip provided by the invention adopts a differential structure, so that the parasitic inductance effect of a grounding key and a wire during packaging and testing can be eliminated, and the insertion loss and the isolation performance are improved; compared with a single-end port, the lower impedance of the differential port is more beneficial to improving the power capacity of the switch; the differential structure allows the transformer type differential inductor to use differential signal characteristics, the equivalent quality factor of the inductor is improved, and the circuit performance is improved; the differential structure can improve the linearity of the circuit, especially the second-order intermodulation effect; the differential structure can be compatible with a modern silicon-based CMOS radio frequency system, and an additional balun is not needed for signal conversion.

The invention discloses a pulse modulation plasma jet generation method and application thereof, and particularly relates to the field of microelectronics, and the method comprises the following steps: I, constructing a multidisciplinary association database, modulating a high-voltage pulse power supply, and optimizing pulse waveform parameters at the same time; iI, pulse voltage is applied through a high-voltage electrode to generate plasma jet, a coupling simulation model is established, and the evolution process of the plasma jet is simulated; according to the method, the requirement of manual operation can be reduced, subjective deviation and information loss are avoided, the robustness of resisting environmental interference is improved, and the method can adapt to the high-speed and high-precision process requirement; the testing of invalid parameter combinations can be avoided, the searching capability is improved, the experiment or simulation frequency is reduced, the anti-interference capability of the jet system on working condition fluctuation is improved, and the maintenance frequency is reduced.

The invention discloses a broadband power amplifier with an output reconfigurable network, and relates to the technical field of microelectronics, the broadband power amplifier with the output reconfigurable network adopts a three-stage amplification circuit with a gate width ratio of 1: 2: 8, and signal pre-amplification and gain improvement are realized through the first two stages of amplifiers; the last-stage eight-tracheid parallel structure outputs saturated power under high-voltage power supply and realizes power additional efficiency; the output reconfigurable network is controlled by a first switch and a second switch, the first switch is turned off and the second switch is turned on in a high-power mode, so that a compensation microstrip line is grounded to form a fundamental wave matching branch knot, the loss of a harmonic suppression network is avoided, and high-efficiency output is guaranteed; in a low-power mode, the first switch is switched on, the second switch is switched off, the first LC resonance unit and the second LC resonance unit jointly form a band-stop filtering network, secondary and third harmonic impedance is adjusted to be in a near-short-circuit state, so that generation of higher harmonics is restrained, phase distortion is offset through the compensation microstrip line, and the integrity of fundamental wave signals is maintained.

The invention relates to the technical field of microelectronics, in particular to a unimolecular memristor based on a viologen derivative and a preparation method of the unimolecular memristor. The unimolecular memristor based on the viologen derivative comprises an electrode pair and an organic functional molecule, and the organic functional molecule is selected from the viologen derivative and assembled between the electrode pair through an amide condensation reaction. According to the organic functional molecule provided by the invention, functional modification is performed on the basis of a viologen molecular structure, so that an energy barrier of reversible oxidation-reduction reaction of a viologen unit is effectively reduced, and the performance of the single-molecule memristor is remarkably improved; meanwhile, the on-off ratio of the device is also improved by one order of magnitude. According to the preparation method provided by the invention, the stability and repeatability of a monomolecular device can be ensured, and the conductive stability and durability of the molecular junction of the organic functional molecule are effectively improved. The method is simple and convenient to operate, reaction conditions are easy to control, and large-scale production of molecular devices is facilitated.

A load sensing assembly for a medical implant is disclosed. The medical implant may include an upper surface, a side surface, a bottom surface, and a cavity housing various sensors and microelectronics. In other embodiments, the medical implant may include a port that is accessible through at least one of the bottom surface, side surface, and the upper surface. The port may be configured to receive an electronics assembly, package, or hermetically sealed enclosure. The electronics package may have a size and shape generally corresponding to the port. In various embodiments, electronic components and sensors may be powered by a local power source. In various embodiments, sensors may be chosen from: accelerometers, gyroscope, strain gauge, pressure sensor, pH sensor, impedance sensor, optical sensor, and / or a temperature sensor. In various embodiments, the medical implant may be chosen from: an interbody spinal implant, a pedicle screw, a connector, and / or a cross-link.

Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects are provided. An example optical interconnect joins first and second optical conduits. A first direct oxide bond at room temperature joins outer claddings of the two optical conduits and a second direct bond joins the inner light-transmitting cores of the two conduits at an annealing temperature. The two low-temperature bonds allow photonics to coexist in an integrated circuit or microelectronics package without conventional high-temperatures detrimental to microelectronics. Direct-bonded square, rectangular, polygonal, and noncircular optical interfaces provide better matching with rectangular waveguides and better performance. Direct oxide-bonding processes can be applied to create running waveguides, photonic wires, and optical routing in an integrated circuit package or in chip-to-chip optical communications without need for conventional optical couplers. An example wafer-level process fabricates running waveguides, optical routing, and direct-bonded optical interconnects for silicon photonics and optoelectronics packages when two wafers are joined.

The invention belongs to the field of microelectronics, and particularly relates to a ferroelectric capacitor, a preparation method thereof and a three-dimensional ferroelectric memory array, and the ferroelectric capacitor comprises a substrate, a bottom electrode, a ferroelectric dielectric layer, a deoxidizing layer and a top electrode which are sequentially arranged from bottom to top; the ferroelectric medium layer is an Hf < 1-x > Zr < x > O < 2 > layer, 0 lt; xlt; the Hf-rich composition is realized by controlling the Hf: Zr super-cycle ratio of atomic layer deposition; the thickness of the ferroelectric medium layer is 1-6 nm, and the thickness of the bottom electrode is 0.1-5 nm. Compared with the prior art, the problems of polarization characteristic degradation caused by thinning of the ferroelectric layer in the hafnium-based ferroelectric capacitor and crosstalk in the FeRAM in the prior art are solved. According to the scheme, the oxygen vacancy concentration is accurately adjusted to inhibit the formation of a non-ferroelectric phase, so that the ultra-thin ferroelectric film can still maintain relatively high remanent polarization while the size is reduced, a storage window is effectively improved, and the wake-up requirement is reduced.

A method produces a microelectronics device by hybrid bonding of individual chips onto a handle wafer, of the Die-to-Wafer type, includes a flow protocol for thinning the rear substrate of the chips. The flow protocol includes a pre-thinning grinding of the rear substrate of the individual chips once they have been attached to the wafer. This grinding is preceded by the formation of a protective layer protecting the trenches formed by the spaces between the attached individual chips. Next, a rectification etching rectifies the height of the rear substrate of each of the attached individual chips, via chemical wet etching, to eliminate the Total Thickness Variation. This etching is selective with respect to an etch-stop element contained in the respective substrates of the attached chips and which is used to stop the etching at a level that is substantially uniform for each of the chips.

The invention belongs to the field of microelectronics, and particularly relates to a ferroelectric capacitor for improving initial state polarization intensity and a preparation method and application thereof.The ferroelectric capacitor comprises a substrate, a bottom electrode, an ultrathin ferroelectric medium layer and a top electrode which are sequentially stacked from bottom to top; the ultra-thin ferroelectric dielectric layer is an Hf < 1-x > Zr < x > O < 2 > thin film, 0 lt; xlt; and in the atomic layer deposition process, the Hf-rich thin film is grown and formed by controlling the Hf: Zr super-cycle ratio. Compared with the prior art, the ferroelectric capacitor solves the problems that in the prior art, in order to improve the initial-state polarization intensity of the ferroelectric capacitor, a function matched with the HZO thin film is added, the thickness is increased due to layers, and the improvement effect is limited. According to the scheme, the doping proportion of Hf in the ultra-thin ferroelectric dielectric layer is properly increased, the formation energy of a non-ferroelectric T phase is remarkably improved, stable existence of a ferroelectric O phase is further promoted, and therefore the ferroelectric O phase with ferroelectric hysteresis close to the situation that awakening is not needed, a high initial state 2Pr value and a high content is achieved.

The invention relates to the technical field of microelectronic manufacturing. The invention discloses a double-layer V-shaped nanowire structure which comprises a base layer arranged on a substrate and further comprises an upper-layer nanowire and a lower-layer nanowire which spatially grow on the base layer in a staggered mode, the upper-layer nanowire and the lower-layer nanowire are broken line type nanowires, and horizontal projections of break points of the broken line type nanowires and horizontal projections of break points of the broken line type nanowires and the lower-layer nanowire coincide and are located on the same plumb line. And the broken line type nanowire on the upper layer is broken at the break point to form a gap. According to the invention, two spatially staggered nanowires are grown by using single IPSLS, the lower layer continuous silicon nanowire is used as a conductive channel, and the upper layer gap nanowire is used as an adjustable depletion gate, so that the preparation process flow of the double-layer V-shaped nanowire structure is greatly simplified, and multiple quantum islands can be integrated to construct a compact quantum bit chain.

A thermally curable modified polymer having high frequency and low dielectric constant, a synthesis method therefor and a use thereof. The thermally curable modified polymer has a monomer structure as shown in the following formula I. The thermally curable modified polymer can be widely applied to the fields of high-frequency communications, microelectronics industry, aerospace and the like as a low-dielectric-constant matrix resin or packaging material.

The present invention discloses an IC chip automatic packaging inspection system and a method for using the same, which relates to the field of microelectronics technology, and includes an intelligent packaging module, which is used to monitor defects during chip packaging, reduce human influence, and improve packaging efficiency and accuracy; the intelligent packaging module includes: an identification and acquisition unit, a data detection unit, and a precise positioning unit, the identification and acquisition unit is connected to the data detection unit via a network interface, and the data detection unit is connected to the precise positioning unit via a wire. The present invention realizes the function of intelligent chip packaging by designing an intelligent packaging module, solves the problem of slow manual operation and easy error, and improves packaging efficiency and accuracy.

Techniques for joining dissimilar materials in microelectronics are provided. Example techniques direct-bond dissimilar materials at an ambient room temperature, using a thin oxide, carbide, nitride, carbonitride, or oxynitride intermediary with a thickness between 100-1000 nanometers. The intermediary may comprise silicon. The dissimilar materials may have significantly different coefficients of thermal expansion (CTEs) and / or significantly different crystal-lattice unit cell geometries or dimensions, conventionally resulting in too much strain to make direct-bonding feasible. A curing period at ambient room temperature after the direct bonding of dissimilar materials allows direct bonds to strengthen by over 200%. A relatively low temperature anneal applied slowly at a rate of 1° C. temperature increase per minute, or less, further strengthens and consolidates the direct bonds. The example techniques can direct-bond lithium tantalate LiTaO3 to various conventional substrates in a process for making various novel optical and acoustic devices.

The invention provides a gallium oxide ultraviolet synaptic device and a preparation method thereof, and relates to the technical field of microelectronics, and the gallium oxide ultraviolet synaptic device comprises a substrate layer, a gallium oxide light absorption layer and a patterned electrode which are sequentially arranged from bottom to top; the gallium oxide light absorption layer is used for generating photon-generated carriers under excitation of an ultraviolet light signal, and the gallium oxide light absorption layer has a ferroelectric characteristic, so that integration of an ultraviolet photosensitive characteristic and the ferroelectric characteristic is realized. The invention aims to provide a novel gallium oxide ultraviolet synapse device, the device not only has excellent sensitivity to ultraviolet light and can effectively simulate key functions of biological synapses, but also the gallium oxide light absorption layer has ferroelectric characteristics and can realize integration of ultraviolet photosensitive characteristics and ferroelectric characteristics, so that the device has good application prospects. And the method has important significance for further expanding the performance of the nerve synapse.

The invention relates to the technical field of microelectronics, and provides an MEMS microphone and a preparation method thereof, and an electronic device, the microphone comprises a substrate, the substrate comprises a first wafer and a first sacrificial layer, the first wafer is provided with a sealed cavity diaphragm, the first sacrificial layer is used for separating the sealed cavity diaphragm from the first wafer, and the substrate comprises a sound transmission hole penetrating through the first wafer and the first sacrificial layer; a second wafer on which a back plate is prepared; wherein the first wafer and the second wafer are bonded in a low-pressure environment, so that the sealed cavity vibrating diaphragm and the back plate form a capacitor. According to the method, the signal-to-noise ratio of the microphone is improved, and the reliability of the MEMS microphone is enhanced.

The invention relates to the technical field of microelectronics, and discloses a three-dimensional stacked near-memory computing architecture, a chip and a data access method. The memory device comprises at least one computing chip layer and at least one memory chip layer which are stacked along a first direction, a plurality of vertical interconnection channels extending along the first direction; the memory chip layer comprises a plurality of memory banks; the computing chip layer comprises a plurality of computing cluster units; the computing cluster unit comprises at least one storage controller; and the storage controller is connected with at least one of the plurality of storage banks through the vertical interconnection channel and is used for managing data in the correspondingly connected storage banks. The problems that in a three-dimensional stacking computing architecture, storage access delay is high, and the bandwidth expansion capacity is limited are solved.

The present invention relates to a Tesla valve-type ultra-thin planar thermal diode based on phase change heat transfer technology. The diode comprises a tube body, within which are disposed an evaporation end, a liquid working fluid cavity, a Tesla valve flow channel, a liquid wick filled with liquid working fluid, and a condensation end. The wick is disposed within the liquid working fluid cavity. The condensation end, the wick, and the evaporation end are sequentially connected to form a liquid working fluid path, while the evaporation end, the Tesla valve flow channel, and the condensation end are sequentially connected to form a gaseous working fluid path. The Tesla valve utilizes the fluid acceleration characteristics and unidirectional conductivity of the fluid to improve the unidirectional thermal conductivity of the ultra-thin planar thermal diode. During forward heating, the gaseous working fluid flows from the evaporation end to the condensation end, flowing downstream within the Tesla valve with low air resistance and high thermal conductivity. During reverse heating, the gaseous working fluid flows from the condensation end to the evaporation end, flowing countercurrently within the Tesla valve with high air resistance and low thermal conductivity, thereby achieving the effect of a thermal diode. The diode can be widely used in the microelectronics industry.

Silicon Photonics is a candidate technology for adding integrated optics functionality, either passive or active optical waveguides) to integrated circuits by leveraging the economies of scale of the CMOS microelectronics industry and using materials for the waveguide core such as silicon nitride (SiXNY) and silicon oxynitride (SiOXN1-X) for example. Microelectromechanical systems (MEMS) provide for movable platforms relative to the substrate allowing additional functionality to be added to a silicon circuit but also Silicon Photonics. Accordingly, by combining “fixed” waveguides formed upon the substrate with “movable” waveguides formed upon one or more movable platforms the inventors have established a series of Integrated Optics MEMS (IO-MEMS) based on Silicon Photonics. Such IO-MEMS include optical switches, optical attenuators, optical gates, optical switch matrices, configurable wavelength division multiplexer / demultiplexer devices, etc. exploiting both platforms and deformable beams.

The invention discloses an X-band asymmetric single-pole double-throw switch, and belongs to the field of radio frequency microelectronics. Comprising a first radio frequency input and output end, a second radio frequency input and output end, a third radio frequency input and output end, a transmitting channel circuit, a matching circuit, a receiving channel circuit, a first control voltage source and a second control voltage source, the transmitting channel circuit is used for receiving a high-power radio frequency signal input by the first radio frequency input and output end and outputting the high-power radio frequency signal by the second radio frequency input and output end; the matching circuit is used for realizing impedance matching between the second radio frequency input and output end and the transmitting channel circuit as well as the receiving channel circuit; and the receiving channel circuit is used for receiving a radio frequency signal input by the second radio frequency input and output end and outputting the radio frequency signal by the third radio frequency input and output end. The single-pole double-throw switch has the advantages of high power capacity, high isolation, low insertion loss and the like.

A microelectronics device with anti-counterfeiting measures that includes an integrated circuit packaging and a piezoelectric element embedded on the integrated circuit packaging, such as on the surface of the integrated circuit packaging. The piezoelectric element is configured to generate a unique identification code in response to a series of controlled mechanical stresses being applied to the piezoelectric element. Due to the inherent variability in piezoelectric responses, there is a high degree of uniqueness in the identification code making them extremely difficult for counterfeiters to replicate. Furthermore, by applying different stress sequences, a multitude of unique identification codes can be generated from a single piezoelectric element providing an additional layer of security. In this manner, by embedding a piezoelectric element on the integrated circuit packaging, a highly secure, cost-effective, and difficult to replicate anti-counterfeiting technique for the microelectronics industry has been developed.

The invention discloses a polyimide intrinsic microporous membrane, a diamine monomer adopted by the polyimide intrinsic microporous membrane and a preparation method of the polyimide intrinsic microporous membrane and the diamine monomer. The polyimide intrinsic microporous membrane is prepared from a dianhydride monomer and the diamine monomer with a dibenzo spirofluorene xanthene structure, the diamine monomer with the dibenzo spirofluorene xanthene structure is prepared by the following steps: firstly, condensing substituted or unsubstituted 2-nitro-9-fluorenone with 1-naphthol, then carrying out nitration, and finally, carrying out reduction, thereby obtaining the diamine monomer with the dibenzo spirofluorene xanthene structure. The dibenzo spirofluorene xanthene structure contained in the polyimide intrinsic microporous membrane can effectively reduce the dielectric constant of a polymer, the polyimide intrinsic microporous membrane can be applied to the technical field of electronics and microelectronics, the asymmetric diamine structure enables a main chain of a macromolecular chain to be twisted, the twisted macromolecular chain can effectively enlarge interchain pores, and therefore the polyimide intrinsic microporous membrane has the advantages that the dielectric constant of the polymer can be effectively reduced; therefore, the free volume of the polymer is increased, the polymer has higher permeability, selectivity can be balanced, and the polymer can be applied to the technical field of membrane separation.

The invention discloses a super-large-scale in-memory computing core circuit for solving an IR-Drop problem, belongs to the field of microelectronic technology and artificial intelligence, and determines that precision reduction caused by line resistance is an approximately linear error by analyzing an intrinsic physical equation of a line resistance network. Through the analysis of an approximate analysis formula, the linear error is only related to the parameters of the line resistance network. This means that different input voltage vectors produce an approximately linear error of the same column output current. Therefore, through collaborative design of devices, layout and circuits, line resistance of rows and columns is adjusted so as to maximize linearization of errors, and the errors are eliminated through adjacent differential pair read-out design and sampling resistance trimming; meanwhile, a fully differential ADC is designed by combining an adjacent differential readout circuit, and isolation sampling of current and error compensation of line resistance are achieved.

A microneedle array system with heterogeneous needles, designed for the enhanced transdermal delivery of bioactive agents for therapeutic and diagnostic purposes. This system includes a variety of microneedle 140 configurations, such as primary and secondary microneedles that differ in size, shape, and material to optimize delivery and functionality. Secondary needles are specifically designed with additional features such as sensors, specialized coatings, and microelectronics to perform tasks beyond simple delivery, such as in-situ detection and measurement of physiological responses, and stimulation for enhanced drug absorption and therapeutic effect.

The invention discloses an electron beam spot intensity distribution characterization method based on a suspended nano film, and belongs to the technical field of micro-nano machining. In order to solve the problems of radiation damage, poor repeatability, introduction of additional scattering interference and the like in the application of an electron beam lithography machine in the prior art, a suspended nano film structure is mainly manufactured by adopting a standard microelectronic process based on a silicon wafer, and the intensity distribution of electron beam spots is represented through exposure and development. According to the method, on the basis of being compatible with the original electron beam lithography machine process environment, accurate characterization of the electron beam spots is achieved, back exposure is not needed, the process steps are simplified, and interference of electron scattering and edge sputtering is effectively avoided.