A method of making a circuitized substrate which includes at least one and possibly several capacitors as part thereof. In one embodiment, the substrate is produced by forming a layer of capacitive
dielectric material on a
dielectric layer and thereafter forming channels with the capacitive material, e.g., using a
laser. The channels are then filled with conductive material, e.g.,
copper, using selected deposition techniques, e.g.,
sputtering, electro-less plating and
electroplating. A second
dielectric layer is then formed atop the
capacitor and a
capacitor “core” results. This “core” may then be combined with other dielectric and conductive
layers to form a larger, multilayered PCB or
chip carrier. In an alternative approach, the capacitive dielectric material may be photo-imageable, with the channels being formed using conventional
exposure and development
processing known in the art. In still another embodiment, at least two spaced-apart conductors may be formed within a
metal layer deposited on a
dielectric layer, these conductors defining a channel there-between. The capacitive dielectric material may then be deposited (e.g., using lamination) within the channels.