238 results about "Direct bonding" patented technology

Methods for fabricating branched substrates having conductive contact pads and hybrid dielectric bonding surfaces for directly bonding dies and electrically connecting them to the contact pads. A branched substrate can include a main portion and one or more branch portions hybrid bonded to the main portion. Some sections of the branched substrate can be flexible to allow deformable electrical connection between components that are hybrid bonded to different regions of the branched substrate. A flexible branch portion may provide electrical connection between vertically separated layers of two components. The method includes directly bonding a branch portion of the branched substrate to the main portion of the branched substrate via a hybrid bonding interface comprising a conductive interface between contact pads of the main and branch portions and a hybrid bonded dielectric interface between dielectric surfaces of the of the main and branch portions.

Methods for fabrication dielectric layers having conductive contact pads, and directly bonding the dielectric and conductive bonding surfaces of the dielectric layers. In some aspects, the method includes disposing a polish stop layer on dielectric bonding surfaces on top of a dielectric layer. A conductive layer is disposed on top of the polish stop layer and then polished to form conductive contact pads having polished conducting bonding surfaces. During the polishing process, the polish stop layer reduces rounding of dielectric edges and erosion of the dielectric bonding surfaces between closely spaced conductive bonding surfaces. The resulting polished dielectric and conductive bonding surfaces are directly bonded to dielectric and conductive bonding surfaces of another dielectric layer to form conductive interconnects.

A method for fabricating a MEMS device comprising the following steps: providing a first bonding surface (1) on a first substrate (2) with a first substrate doping; providing a second bonding surface (3) on a second substrate (4) with a second substrate doping; aligning and joining the first and second bonding surfaces (1, 3) by a Si-Si direct bonding process, wherein both bonding surfaces (1, 3) have a silicon surface, and wherein an additional near-surface first doping layer (5) is produced below at least one of the bonding surfaces (1).

Techniques for joining dissimilar materials in microelectronics are provided. Example techniques direct-bond dissimilar materials at an ambient room temperature, using a thin oxide, carbide, nitride, carbonitride, or oxynitride intermediary with a thickness between 100-1000 nanometers. The intermediary may comprise silicon. The dissimilar materials may have significantly different coefficients of thermal expansion (CTEs) and / or significantly different crystal-lattice unit cell geometries or dimensions, conventionally resulting in too much strain to make direct-bonding feasible. A curing period at ambient room temperature after the direct bonding of dissimilar materials allows direct bonds to strengthen by over 200%. A relatively low temperature anneal applied slowly at a rate of 1° C. temperature increase per minute, or less, further strengthens and consolidates the direct bonds. The example techniques can direct-bond lithium tantalate LiTaO3 to various conventional substrates in a process for making various novel optical and acoustic devices.

The invention provides a large-size semiconductor wafer and a preparation method and application thereof. The preparation method comprises the following steps: selecting a plurality of first semiconductor wafers, and modifying the first semiconductor wafers to obtain second semiconductor wafers; wherein the crystal orientation error of the first semiconductor wafer is smaller than a set error value, and the surface roughness of the second semiconductor wafer is smaller than set roughness; performing wafer alignment on the second semiconductor wafer along the crystal orientation, and performing direct bonding along the splicing surface at a set temperature to obtain a bonded wafer; performing post-processing on the bonded wafer to obtain a large-size semiconductor wafer; wherein the size of the large-size semiconductor wafer is at least larger than the sizes of the two first semiconductor wafers; the set temperature is less than 300 DEG C. According to the invention, direct bonding without an intermediate layer can be realized, and a semiconductor wafer which is continuous in structure, matched in crystal orientation and excellent in thermal performance is obtained; the process does not need an epitaxial process, and the process complexity and cost are reduced.

Embodiments herein provide for probe cards and methods related thereto. A probe card comprises a probe and a substrate. The probe comprises a probe stand, a probe beam, and a probe tip. The probe tip and probe stand extend in a first direction, and the probe beam extends in a second direction different than the first direction. The substrate comprises a conductive feature disposed in a material layer. The probe stand of the probe is directly bonded to the conductive feature of the substrate via direct metal bonds.

Disclosed herein are methods for direct bonding. In some embodiments, a direct bonding method comprises preparing a first bonding surface of a first element for direct bonding to a second bonding surface of a second element; and after the preparing, providing a protective layer over the prepared first bonding surface of the first element, the protective layer having a thickness less than 3 microns.

The present description concerns a process including the following steps: providing a plurality of assemblies, each including a donor substrate covered by a functional block successively including a first interconnection layer, a functional layer, and a second interconnection layer, the functional layer including one or more electronic components, the interconnection layers including a dielectric material in which are formed conductive elements, a first surface of the first interconnection layer in contact with the donor substrate and the free surface of the second interconnection layer being planarized so as to be compatible with a subsequent direct bonding, successively transferring, onto a receiver substrate the functional blocks, by direct bonding, to form a 3D assembly comprising a receiver substrate covered by a stack of two functional blocks.

A method of integrating a first substrate having a first surface with a first insulating material and a first contact structure with a second substrate having a second surface with a second insulating material and a second contact structure. The first insulating material is directly bonded to the second insulating material. A portion of the first substrate is removed to leave a remaining portion. A third substrate having a coefficient of thermal expansion (CTE) substantially the same as a CTE of the first substrate is bonded to the remaining portion. The bonded substrates are heated to facilitate electrical contact between the first and second contact structures. The third substrate is removed after heating to provide a bonded structure with reliable electrical contacts.

A device package includes a first die comprising a semiconductor substrate; an isolation layer on the semiconductor substrate, wherein the isolation layer is a first dielectric material; a first dummy via penetrating through the isolation layer and into the semiconductor substrate; a bonding layer on the isolation layer, wherein the bonding layer is a second dielectric material that has a smaller thermal conductivity than the first dielectric material; a first dummy pad within the bonding layer and on the first dummy via; a dummy die directly bonded to the bonding layer; a second die directly bonded to the bonding layer and to the first dummy pad; and a metal gap-fill material between the dummy die and the second die.

Integrated circuit ("IC") structures and electronic packages that utilized an inorganic-convertible polymer to improve bond strength and thermal conductivity are described. In one embodiment, the inorganic-convertible polymer acts as a side fill material to seal a die periphery and improve direct bonding strength. In another embodiment, the inorganic-convertible polymer acts as a thermal bonding layer to increase the thermal conductivity between a die and a thermal solution.

This application discloses a method and device for fabricating a periodically polarized ultrathin lithium niobate / lithium tantalate device, belonging to the field of nonlinear optical device manufacturing. The method includes: fabricating and polarizing periodic electrodes on a provided ferroelectric crystal wafer to form a periodically polarized master wafer; bonding the master wafer to a carrier substrate using optical resin-assisted bonding or direct bonding to form a composite structure; thinning and polishing the side of the master wafer away from the carrier substrate to obtain an ultrathin periodically polarized crystal functional layer; and fabricating the structure of the ultrathin periodically polarized crystal functional layer to obtain a periodically polarized ultrathin lithium niobate / lithium tantalate device. This method avoids the inherent problems of high-voltage breakdown and poor domain quality in existing technologies when directly polarizing ultrathin crystals by placing the high-risk polarization step on a thick, stable wafer.

The disclosure is related to structures and method of making thermoelectric devices. The structures include an electrically nonconductive and thermally conductive substrate with direct bonded or electroplated copper. Thermoelement pairs are formed on a barrier layer deposited on the outer layers of the substrate in gaps formed from insulator material deposited on the barrier layer. Openings in the barrier layer may be filled with an insulator to isolate thermoelements, which may then be bridged by a metal layer. Thermoelement pairs may be combined to form larger devices.

A bonded structure is disclosed. The bonded structure can include an interconnect structure. The bonded structure can also include a first die directly bonded to the interconnect structure. The bonded structure can also include a second die mounted to the interconnect structure. The second die is spaced apart from the first die laterally along an upper surface of the interconnect structure. The second die is electrically connected with the first die at least partially through the interconnect structure. The bonded structure can further include a dielectric layer that is disposed over the upper surface of the interconnect structure between the first die and the second die.

This invention provides a directly coupled stacked structure for improved image quality in optical devices. [Solution] Optical surfaces are planarized and plasma activated to laminate them together, and then a direct bond is formed between the two surfaces without adhesive or an adhesive layer. This process provides an improved optical element with higher image brightness, lower light scattering, better resolution, and higher image fidelity. Direct bonding also provides a heat-resistant interface that can withstand much higher temperatures than conventional optical adhesives. Exemplary processes can be used to manufacture many types of improved optical components such as improved laminated lenses, mirrors, beam splitters, collimators, prism systems, optical conduits, and specular waveguides for smart glasses and head-up displays (HUDs), which provide better image quality and elimination of dark lines of sight that are apparent to the human observer when conventional adhesives are used in conventional lamination.

A bonding method can include polishing a first bonding layer of a first element for direct bonding, the first bonding layer comprises a first conductive pad and a first non-conductive bonding region. After the polishing, a last chemical treatment can be performed on the polished first bonding layer. After performing the last chemical treatment, the first bonding layer of the first element can be directly bonded to a second bonding layer of a second element without an intervening adhesive, including directly bonding the first conductive pad to a second conductive pad of the second bonding layer and directly bonding the first non-conductive bonding region to a second nonconductive bonding region of the second bonding layer. No treatment or rinse is performed on the first bonding layer between performing the last chemical treatment and directly bonding.

The utility model discloses a test device for verifying the influence of epoxy glue high-temperature gas release on a gold-aluminum bonding point, which comprises a shell, the inner wall of the shell is provided with a gold-plated layer, and the thickness of the gold-plated layer is 1-5 microns; the edge of the chip is bonded on the inner wall of the shell through a plurality of gold bonding wires; an epoxy glue layer is coated on the part, which is not bonded with the chip, of the inner wall of the shell; the cover plate is installed at the opening of the shell in a sealed mode. The inner wall of the shell is provided with the gold-plated layer, and the chip can be directly bonded on the gold-plated layer in the shell, so that the test process is free from interference of external factors. The shell is made of ceramic, the main component of the ceramic is Al2O3, the high-temperature resistance is excellent, excessive gas and stress release are avoided in the test process, and the interference to the test result is avoided. The airtight grade in the shell is 10-9, and the sealing requirement is met. In the test process, gas released by the epoxy glue layer cannot leak and can continuously act on the bonding points, and the test effect can be improved.

A method for bonding chips including the following steps: a) providing a donor substrate wherein chips are formed, the donor substrate including a front face and a back face, b) mounting the front face of the donor substrate to a temporary substrate, by direct bonding, c) preferably thinning the donor substrate, d) bonding the assembly consisting of donor substrate and temporary substrate on a handling device including a solid frame and an adhesive film, with the back face of the donor substrate bonded to the adhesive film, e) separating the temporary substrate from the donor substrate, f) cutting the donor substrate so as to singularize the chips, g) bonding the chips to the receiver substrate by direct bonding.

Semiconductor component manufacturing process, including: a step which provides a wafer source (1) having a first principal surface (2) on one side and a second principal surface (3) on the other side, and a first support element (11) and a second support element (21); a support step with a first support step in which the wafer source (1) is supported on the side of the first main surface (2) by the first support element (11), and with a second support step in which the wafer source (1) is supported on the side of the second main surface (3) by the second support element (21), wherein the second support step includes bonding a first plate surface (22) of the second support element (21) to the second main surface (3) of the wafer source (1) by a direct bonding process, and wherein a second amorphous bond layer (32) is formed between the second main surface (3) and the first plate surface (22) after bonding, the procedure further features: a step of forming a modified layer (33) in which a modified layer (33) is formed along a horizontal direction parallel to the first principal surface (2) in a thickness-direction intermediate section of the wafer source (1); and a wafer separation step in which a wafer structure (35) containing the second support element (21) and a wafer (34) is separated from the wafer source (1) by means of the modified layer (33), wherein the wafer structure (35) with the second support element (21) and the wafer (34) includes the second amorphous bond layer (32) which bonds the second support element (21) and the wafer (34), and wherein the second amorphous bond layer (32) is formed as a starting point for separating the second support element (21) and the wafer (34) in a subsequent step.

The invention relates to a method of directly bonding (200) a first microelectronic device (100) on a second microelectronic device, comprising: providing a first device having a first flat surface (110) and a second device having a second flat surface (210), at least the first and second surfaces are treated with a plasma gas comprising at least a first fluorine-containing gas (having an atomic percentage F of fluorine), the first and second devices are transferred to a bonding apparatus, the first and second surfaces are immersed in a bonding atmosphere (1), and the first and second surfaces are bonded under the bonding atmosphere. By cooperatively controlling the atomic percentage F of fluorine and the relative humidity RH, the bonding speed Vc is less than or equal to 15 mm / s, more particularly less than 10 mm / s. The reduced bonding speed significantly reduces the deformation in the bonding process, and can obtain sufficiently high bonding energy, thereby ensuring good bonding between the two surfaces.

Direct-bonded optoelectronic interconnects for high-density integrated photonics are provided. A combined electrical and optical interconnect enables direct-bonding of fully-processed optoelectronic dies or wafers to wafers with optoelectronic driver circuitry. The photonic devices may be III-V semiconductor devices. Direct-bonding to silicon or silicon-on-insulator (SOI) wafers enables the integration of photonics with high-density CMOS and other microelectronics packages. Each bonding surface has an optical window to be coupled by direct-bonding. Coplanar electrical contacts lie to the outside, or may circumscribe the respective optical windows and are also direct-bonded across the interface using metal-to-metal direct-bonding, without interfering with the optical windows. Direct hybrid bonding can accomplish both optical and electrical bonding in one overall operation, to mass-produce mLED video displays. The adhesive-free dielectric-to-dielectric direct bonding and solder-free metal-to-metal direct bonding creates high-density electrical interconnects on the same bonding interface as the bonded optical interconnect. Known-good-dies may be used, which is not possible conventionally, and photolithography over their top surfaces can scale to high density.

A method of manufacturing a device package. The method comprises patterning a first substrate to form patterned regions comprising a thermal oxide layer. The method further comprises directly bonding the patterned regions of the first substrate to a second substrate to form a bonding interface. The bonded first and second substrates form an integrated cooling assembly comprising a coolant chamber volume. Portions of the first substrate exposed to the coolant chamber volume comprise a native oxide layer.

A method of processing a semiconductor element is disclosed. The method can include providing the semiconductor element that has a first nonconductive material. The first nonconductive material is disposed on a device portion of the semiconductor element. The method can include providing a transparent carrier. The method can include providing an intervening structure that has a second nonconductive material, a photolysis layer, and an opaque layer stacked together. The method can include forming a bonded structure such that the second nonconductive material is directly bonded to the first nonconductive material or to the transparent carrier. The intervening structure is disposed between the semiconductor element and the transparent carrier. The method can include decoupling the transparent carrier from the semiconductor element by exposing the photolysis layer to light through the transparent carrier such that the light decomposes the photolysis layer.

A bonded structure with a package substrate comprising an inorganic, insulating first bonding layer and first conductive features at a surface thereof and an electronic component comprising an inorganic, insulating second bonding layer and second conductive features at a surface thereof wherein the first bonding layer and the second bonding layer are directly bonded to one another, and the first and second conductive features are directly bonded to one another.

Optoelectronic light emitting devices are provided with directly bonded circuitry, such as control or driver circuitry. The optoelectronic light emitting devices incorporate distributed Bragg reflector (DBR) layers that can be tuned to reflect the light of a particular wavelength, and that facilitate direct bonding and electrical contact between optoelectronic light emitting device substrates (wafers or dies) and control circuitry. In some embodiments the DBR layers provide direct bonding interfaces, such as hybrid bonding surfaces.

The invention discloses a rigid-flex board and a manufacturing method thereof. A soft board area of the rigid-flex board is composed of an inner-layer soft board (101) and outer-layer base materials (104a and 104b) which are directly pressed on the two sides of the inner-layer soft board (101), and a rigid board area is of an integrated structure formed by the inner-layer soft board, TPI covering films (102a and 102b), windowing prepregs (103a and 103b) and the outer-layer base materials in a one-time pressing mode. The outer layer base material is a non-adhesive PI base material, and the light copper layer is etched and removed in the soft board area. The manufacturing method comprises the following steps: manufacturing the inner-layer soft board; pre-pressing the TPI cover film; windowing the prepreg; laminating and combining; performing vacuum pressing; and manufacturing an outer layer pattern (including removing a light copper layer in a soft board area). Through direct bonding of the TPI covering film and the non-adhesive PI outer layer base material, the layering problem of the soft and hard combination position is solved, and the bending performance of the soft board area and the product reliability are remarkably improved.

[Problem] To provide a workpiece processing sheet that makes it possible to suppress cracks or the like of a workpiece even when the workpiece is thinned, and to reduce the number of particles on a bonding surface of a processed workpiece, which is obtained by singulating the workpiece, when the processed workpiece is directly bonded to a wafer. [Solution] The workpiece processing sheet is used for processing a workpiece for manufacturing a processed article that is to be directly bonded, and has a configuration in which a base material and an adhesive layer are laminated. The tensile elastic modulus of the base material at 23°C is 1400 MPa or more. The surface free energy of the surface of the base material that is in contact with the adhesive layer is less than 40 mN / m.

An advanced integrated optical transceiver enables super high-speed communication between chips such as GPUs and HBM. Designs for such a transceiver may be based on an array of GaN micro-LEDs and an array of Si photodetectors (PDs) which are hybrid bonded (i.e. via “direct bond interconnect”) to a CMOS chip. Hybrid bonding makes the integrated optical transceiver very small and highly reliable.

The utility model relates to the technical field of cell sorting and detection, in particular to a micro-fluidic chip. The micro-fluidic chip comprises a substrate, a micro-fluidic chip, a micro-fluidic chip and a micro-fluidic chip, wherein a metal film layer is arranged on the substrate; the cover plate is at least provided with a micro-channel; the intermediate bonding layer is located between the substrate and the cover plate and covers the metal film layer; wherein the cover plate is a PDMS (Polydimethylsiloxane) prepolymer cover plate; the intermediate bonding layer is a silicon dioxide layer. According to the utility model, the problem that the PDMS prepolymer cover plate and the metal film layer substrate are difficult to directly bond can be solved.

The invention provides a direct bonding-based differential capacitive pressure sensor and a pressure detection method. The direct bonding-based differential capacitive pressure sensor comprises a metal base, a sapphire diaphragm and a sapphire fixed electrode plate, the sapphire diaphragm is fixedly connected to the metal base through a direct bonding process; the sapphire fixed electrode plate is fixedly connected to the sapphire diaphragm through a direct bonding process, and a capacitance gap with a preset distance is formed between the sapphire fixed electrode plate and the sapphire diaphragm; the sapphire diaphragm and the sapphire fixed electrode plate are respectively provided with a plurality of corresponding electrodes to form a differential capacitor structure; the difference value of the material thermal expansion coefficients of the metal base and the sapphire is smaller than a preset threshold value. The differential capacitive pressure sensor has relatively low sealing stress and relatively small temperature excursion, and the distance control precision between the diaphragm and the fixed electrode plate is ensured, so that the inherent precision of the pressure sensor is improved.