165 results about "Metallic bonding" patented technology

The invention discloses a solar cell with alloy as a flexible substrate and a preparation method thereof, a kovar alloy sheet is used as the flexible substrate to be bonded with an epitaxial layer, the coefficient of thermal expansion of the kovar alloy sheet is similar to that of an epitaxial material, and dark cracks of the epitaxial layer caused by cold and hot temperature difference are avoided; moreover, the metal bonding layer adopts a thick-silver thin-gold structure taking silver as a substrate, so that the production cost is greatly reduced, and the weldability of the back electrode is enhanced; and the back electrode also adopts a thick silver and thin gold structure taking silver as a substrate, so that the front warping of the Kovar alloy sheet can be balanced, the weldability of the back electrode is enhanced, the drawing force of the back electrode is improved, the thin gold plated on the thick silver can also prevent silver oxidation and resist the impact of atomic oxygen, and the service life of the solar cell is prolonged.

A bulk acoustic wave (BAW) resonator includes: a substrate; a piezoelectric layer disposed above the substrate; a first electrode disposed below the piezoelectric layer and including a first portion and a second portion spaced apart from each other; a second electrode disposed above the piezoelectric layer; a first dielectric layer, a second dielectric layer, and a third dielectric layer sequentially disposed between the substrate and the piezoelectric layer in an order from the piezoelectric layer to the substrate; a cavity disposed below the first portion of the first electrode; a metal bonding layer disposed between the third dielectric layer and the substrate; and a ground pad metal layer disposed on the piezoelectric layer and electrically connected to the metal bonding layer.

The invention relates to the technical field of semiconductor photoelectrons, and discloses a vertical-cavity surface-emitting laser with an inverted structure and a preparation method of the vertical-cavity surface-emitting laser. The vertical cavity surface emitting laser with the inverted structure comprises a heterogeneous substrate, wherein a heat dissipation functional layer, a metal adhesion layer and a metal bonding layer are arranged on the surface of the heterogeneous substrate from bottom to top; the epitaxial structure comprises a p-type electrode, an ITO current expansion layer, a SiO2 current limiting layer, a first dielectric DBR layer, a p-type GaN layer, an electron blocking layer, a quantum well active region, an n-type GaN layer, a second dielectric DBR layer and an n-type electrode from bottom to top; and the p-type electrode is positioned at the bottom of the epitaxial structure and is bonded with the metal bonding layer to form an inverted structure. According to the vertical cavity surface emitting laser with the inverted structure provided by the invention, the heat dissipation function layer and the inverted structure design effectively improve the heat dissipation capability and the current uniformity of the device, and the service life, the performance stability and the reliability of the device are remarkably improved.

A package includes an interposer having a first redistribution structure; a first die directly bonded to a first surface of the first redistribution structure with a dielectric-to-dielectric bond and a metal-to-metal bond; a second die directly bonded to the first surface of the first redistribution structure with a dielectric-to-dielectric bond and a metal-to-metal bond; an encapsulant around the first die and the second die; and a plurality of conductive connectors on a second side of the first redistribution structure opposite to the first die and the second die.

A semiconductor device assembly including a first semiconductor die having a first dielectric region and a first bond pad that are disposed on a first side of the first semiconductor die; a second semiconductor die having a second dielectric region and a second bond pad that are disposed on a second side of the second semiconductor die; and a hybrid bonding interface between the first side of the first semiconductor die and the second side of the second semiconductor die, the hybrid bonding interface including a gap free metal-metal bonding region between the first and the second bond pads and a gap free dielectric-dielectric bonding region between the first and the second dielectric regions, wherein the dielectric-dielectric bonding region includes a nitrogen gradient with a concentration that increases with proximity to the metal-metal bonding region.

The invention provides low-temperature sintered silver-copper slurry, a perovskite laminated cell and a preparation method, and belongs to the technical field of crystalline silicon cells. The low-temperature sintered silver-copper paste comprises the following components in parts by mass: 15-30 parts of silver powder; 63-77 parts by mass of silver coated copper powder; the surface of the silver-coated copper powder is coated with acrylic acid and an oleylamine coating agent; 3-15 parts by mass of a resin; 0.2 to 2.8 parts by mass of a curing agent; 0.05 to 0.5 part by mass of a leveling agent; and 0.05 to 0.5 part by mass of a dispersant. The present disclosure achieves low temperature (llt; in addition, the silver-coated copper powder and the silver powder are mixed, the silver powder is replaced with low cost, the material cost is reduced, meanwhile, the silver-coated copper powder forms a three-dimensional conductive network at the low temperature of less than 120 DEG C through metal bonding of a silver shell and contact between particles, and the high conductivity of the electrode is ensured.

A substrate structure includes a first substrate and a second substrate. The first substrate includes a first glass plate and at least one first conductive via penetrating the first glass plate. The second substrate includes a second glass plate and at least one second conductive via penetrating the second glass plate. The second substrate is connected to the first substrate. The second glass plate is bonded to the first glass plate through chemical bonding force and defines a chemical bonding contact surface with the first glass substrate. The at least one second conductive via is bonded to the at least one first conductive via through metal diffusion and defines at least one metal bonding contact surface with the at least one first conductive via.

Methods and apparatus for substrate processing include: depositing a bulk layer of a dielectric material comprising a metal onto a device attached to a device substrate; depositing a graded layer of the dielectric material with a compositional gradient, onto the bulk layer; and depositing a bonding cap layer of the metal, having a purity of at least 99% by weight, onto the graded layer, wherein the graded layer has a dielectric gradient from substantially dielectric adjacent to the bulk layer to substantially conductive adjacent the bonding cap layer.

The present invention relates to a package or pre-package (100a, 100b) comprising: a semiconductor die (140) and two contact bonding pads (200, 300) encapsulating the semiconductor die (140). The two contact bonding sheets (200, 300) are bonded to each other. Each contact bonding pad includes a core layer (210, 310) and a bonding layer (220, 320). The core layer includes a core insulating layer (110a, 130a) and one or more metal through connections (110b, 110c, 130b) through the core insulating layer (110a, 130a). The bonding layer includes an insulating bonding layer (120a, 120b) formed on the core insulating layer (110a, 130a) and a metal bonding layer (120g, 120c, 120d) formed on the one or more metal through connections (110b, 110c, 130b). The metal bonding layer is designed to electrically and thermally connect the semiconductor die. The insulating bonding layers are bonded to each other to form a homogeneous insulating layer encapsulating the semiconductor die.

The invention relates to a high-heat-dissipation vertical-structure Ga2O3 Schottky diode and a preparation method thereof, and the preparation method comprises the steps: S1, obtaining a single-crystal gallium oxide substrate, preparing a highly-doped gallium oxide layer on the single-crystal gallium oxide substrate, and depositing a Schottky contact metal layer on one surface, far away from the highly-doped gallium oxide layer, of the single-crystal gallium oxide substrate; s2, obtaining a heat-conducting and electric-conducting substrate, and depositing an ohmic contact metal layer on the heat-conducting and electric-conducting substrate; s3, bonding the deposited Schottky contact metal layer in the step S1 and the ohmic contact metal layer in the step S2 to obtain a heterostructure; and S4, depositing a cathode metal layer on the highly-doped gallium oxide layer with the heterostructure to obtain the high-heat-dissipation vertical-structure Ga2O3 Schottky diode. In the technical scheme of the invention, an efficient longitudinal heat conduction path is constructed, so that heat generated during working can be quickly conducted to the heat-conducting and electric-conducting substrate from the active region through the Schottky junction and the metal bonding layer, and the thermal resistance of the device during working is reduced.

The application provides a Mini LED COG line structure and a manufacturing method thereof, and comprises a bearing substrate, a primer layer, a first transition film layer, a first metal layer, a second transition film layer, an insulating layer, a first photosensitive protective layer, a third transition film layer, a second metal layer, an insulating protective layer and a second photosensitive protective layer are sequentially arranged on the bearing substrate. Compared with the prior art, the transition film layer and the metal layer are combined, the transition film layer has the advantages of metal bond combination and diffusion, the high adhesion between the film layer and the metal layer is improved, good structural stability is achieved, and the thickness and efficiency problems of the thick metal layer are further improved by the combination of the metal layer and the transition film layer. Moreover, the structure of the application is simple, the preparation method is simple, and mass production is possible.

Various embodiments include die structures and methods of forming die structures. In an embodiment, a device includes: a lower substrate; upper integrated circuit dies bonded to the lower substrate with dielectric-to-dielectric bonds and with metal-to-metal bonds, the upper integrated circuit dies including a semiconductor material; a buffer layer around the upper integrated circuit dies, the buffer layer including a stress reduction compound, a coefficient of thermal expansion of the stress reduction compound being greater than a coefficient of thermal expansion of the semiconductor material; and an encapsulant around the buffer layer and the upper integrated circuit dies, the encapsulant including a molding compound, a coefficient of thermal expansion of the molding compound being greater than the coefficient of thermal expansion of the stress reduction compound.

A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

The invention discloses an electric field sensor field enhancement cover plate and a preparation method thereof, and belongs to the technical field of micro electro mechanical system manufacturing. The method comprises the following steps: etching a groove on the silicon surface of a silicon wafer or an insulator to form a reinforcing structure; preparing a flat to-be-bonded surface through a bonding and thinning process; performing laser cutting on the glass sheet to form a reserved hole; and bonding the glass sheet and the bonding surface to form the cover plate. Optional steps include sputtering a getter and a metal bonding layer. The bonding process is used for replacing traditional glass backflow, two photoetching steps are omitted, the problems that glass filling is uneven and the surface is uneven are solved, the technological process is remarkably simplified, and the yield is improved. The method is suitable for wafer-level electric field sensor packaging, and the sensitivity and reliability are improved.

The invention provides a vertical-structure Micro-LED chip and a preparation method thereof, and belongs to the technical field of semiconductor light-emitting devices. The vertical-structure Micro-LED chip comprises a conductive substrate, a metal bonding layer, an epitaxial structure, a quantum dot structure and a passivation layer, the conductive substrate, the metal bonding layer and the epitaxial structure are sequentially stacked, and the epitaxial structure comprises a first semiconductor layer, a multi-quantum well layer and a second semiconductor layer which are sequentially stacked in the direction away from the metal bonding layer. The through hole penetrates through the first semiconductor layer, the multi-quantum well layer and the second semiconductor layer; the quantum dot structure is filled in the through hole and is in contact with the metal bonding layer; the passivation layer is arranged on the side wall of the through hole and located between the quantum dot structure and the epitaxial structure. The light transmission loss can be reduced, the light conversion efficiency is improved, and the heat dissipation performance and reliability of the chip are improved.

The invention discloses a wafer room temperature bonding method and application thereof, and belongs to the technical field of semiconductor advanced packaging and three-dimensional integration. The method comprises the following steps: providing a first wafer, and sequentially preparing a metal plane layer and an oxide layer on the surface of one side of the first wafer to form a metal / oxide composite layer; selectively etching the metal / oxide composite layer to remove the oxide layer and form a metal nanowire array layer on the metal plane layer; providing a second wafer, and preparing a metal material layer on the surface of one side of the second wafer; and aligning the surface, with the metal nanowire array layer, of the first wafer with the surface, with the metal material layer, of the second wafer, and then bonding. According to the invention, the metal nanowire array is introduced into the bonding interface, so that the nanowires are subjected to plastic deformation and local surface diffusion under the action of external pressure, that is, compact and reliable metal-metal bonding can be realized in a room temperature environment, and the requirements of a low-temperature process window and high strength are both considered.

The invention provides an MEMS device preparation method and an MEMS device, and the method comprises the steps: providing an MEMS assembly which comprises a first wafer and a first metal bonding layer located on the first wafer; forming an anti-bonding layer on the surface, close to the first metal bonding layer, of the first wafer; removing the anti-bonding layer on the surface of the first metal bonding layer in an illumination mode; providing a second wafer with a second metal bonding layer, and bonding the first metal bonding layer and the second metal bonding layer so as to bond the first wafer and the second wafer to obtain the MEMS device; the invention solves the technical problem that when a functional structure of an MEMS device is covered with a hydrophobic layer, a bonding surface is also covered with the hydrophobic layer, and in the prior art, the hydrophobic layer on the functional layer is difficult to well retain while the hydrophobic layer on the bonding surface is removed, so that the performance of the MEMS device is influenced.

In an embodiment, a device includes: an interposer; a first integrated circuit device bonded to the interposer with dielectric-to-dielectric bonds and with metal-to-metal bonds; a second integrated circuit device bonded to the interposer with dielectric-to-dielectric bonds and with metal-to-metal bonds; a buffer layer around the first integrated circuit device and the second integrated circuit device, the buffer layer including a stress reduction material having a first Young's modulus; and an encapsulant around the buffer layer, the first integrated circuit device, and the second integrated circuit device, the encapsulant including a molding material having a second Young's modulus, the first Young's modulus less than the second Young's modulus.

This invention discloses a method for metal hot-press bonding and its application. The method specifically includes: providing a first substrate and a second substrate, the first substrate having a first metal bonding surface and the second substrate having a second metal bonding surface; aligning the first and second substrates to bring the first and second metal bonding surfaces into contact; and performing hot-press bonding by controlling temperature and applying pressure. The hot-press bonding includes a heating and high-pressure stage, a heat-holding and low-pressure stage, and a cooling and pressure-releasing stage; the temperature of the heat-holding and low-pressure stage is the bonding temperature. This invention achieves hot-press bonding of metals in an air environment through coordinated temperature and pressure control, resulting in a well-bonded interface that is free of oxidation, dense, and pore-free.

The application belongs to the technical field of device packaging, and particularly relates to a sintering bonding method for reducing the void rate of nano metal paste and application. The sintering bonding method for reducing the void rate of nano metal paste comprises the following steps: S1, printing a nano paste body onto a bonded substrate; S2, placing an electronic device on the nano silver paste; S3, performing freeze drying on the substrate with the electronic device; and S4, performing sintering on the dried product. The freeze drying comprises the following operations: a first stage: pre-freezing, the pre-freezing temperature is below 10 DEG C; a second stage: primary drying; a third stage: secondary drying; and a fourth stage: final drying; or a first stage: pre-freezing, the pre-freezing temperature is below 10 DEG C; a second stage: primary drying; and a third stage: final drying. The sintering bonding method can effectively reduce the void rate of metal bonding, improve the thermal conductivity and bonding strength, and finally improve the reliability of the device.

The application relates to a metal bonding method and application thereof, and belongs to the technical field of microelectronic interconnection. The metal bonding method comprises the following steps: step 1, cleaning a bonding surface; step 2, depositing a metal nanometer film on the cleaned bonding surface; and step 3, aligning and adhering two bonding surfaces completed in the step 2, and then bonding, wherein the bonding temperature is 300-600 DEG C, and the bonding pressure is 3-10 MPa. The metal bonding method can be used for bonding at a lower temperature.

The utility model relates to a communication type heat transfer device, which belongs to the technical field of heat transfer devices, and comprises a uniform temperature plate, a plurality of first capillary structures and a plurality of second capillary structures, the uniform temperature plate comprises a heat conduction cavity and at least one first capillary structure, the side edge of the heat conduction cavity is provided with a bridging concave part, and the at least one first capillary structure is stacked in the heat conduction cavity and extends to the bridging concave part; the heat pipe comprises a heat pipe body and at least one second capillary structure, the heat pipe body is stacked on the at least one first capillary structure on the bridging concave part of the heat conduction cavity, the at least one second capillary structure is stacked in the heat pipe body, and the at least one second capillary structure is connected to the at least one first capillary structure; and one side of the bonding layer is connected to the first capillary structure in a metal key bonding manner. The utility model has the beneficial effects that the capillary structure of the heat pipe is communicated with the capillary structure of the vapor chamber, so that the purpose of integral heat transfer is achieved, and the heat dissipation effect of the vapor chamber and the heat pipe is fully exerted.

This invention discloses a method and application for preparing metal-doped composite catalysts based on ZIF-67, relating to the field of wastewater treatment technology. This invention constructs a multi-component synergistic system through the coordination of functional groups on the surface of biochar with ZIF-67 and the electronic coupling effect between rare earth metals and Co. Compared with traditional pure chemical support synthesis methods, this reduces costs and improves environmental compatibility. The metal-doped composite catalyst prepared by this invention is a novel heterogeneous catalyst. Through the electrostatic interaction between the biochar support and Co ions, and the metal-metal bonds formed between La / Ce and Co, it significantly enhances the stability of Co ions, effectively avoiding secondary pollution. The metal-doped composite catalyst prepared by this invention can efficiently activate persulfate to generate reactive oxygen species and synergistically remove multiple pollutants from complex water bodies containing sulfamethoxazole, tetracycline, levofloxacin, and other antibiotics such as methylene blue.

The application provides a wafer bonding structure and a forming method thereof. The structure comprises: a bottom wafer, a second dielectric layer is formed on the surface of the bottom wafer, a second metal layer and a second metal bonding mark are formed in the second dielectric layer; a third dielectric layer is located on the surface of the second dielectric layer, a first redistribution layer is formed in the third dielectric layer, the first redistribution layer extends to the second dielectric layer and is electrically connected to the second metal layer; a functional wafer, a first dielectric layer is formed on the second surface of the functional wafer, a second redistribution layer and a first metal bonding mark are formed in the first dielectric layer; the first dielectric layer of the functional wafer and the third dielectric layer of the bottom wafer are aligned and bonded through the first metal bonding mark and the second metal bonding mark. The application provides a wafer bonding structure and a forming method thereof, which can improve the wafer alignment accuracy without affecting the process complexity.

The application provides a hybrid bonding structure, a three-dimensional packaging structure and a preparation method thereof. The preparation method of the hybrid bonding structure comprises the following steps: providing an initial hybrid bonding structure, wherein the hybrid bonding structure comprises a medium layer, a bonding medium layer, a diffusion barrier layer, a bonding metal layer and a regulation layer; performing a first grinding process to remove the diffusion barrier layer and the regulation layer, and forming a convex part protruding from the top surface of the bonding medium layer; and performing a second grinding process to remove the convex part of the bonding metal layer, and forming a first recessed part on the top surface of the bonding metal layer, which is lower than the top surface of the bonding medium layer. The hybrid bonding structure is a product prepared by the above method. The three-dimensional packaging structure comprises the hybrid bonding structure prepared by the above method. By adding the regulation layer, the convex part is formed when the diffusion barrier layer and the regulation layer are removed in the first grinding process, and the second grinding process is performed on the convex part to effectively control the depth of the first recessed part on the bonding metal layer. Therefore, the metal bonding interface cavity during hybrid bonding is reduced, and the bonding strength is improved.

Method comprising: Forming a first device die (4) comprising: Depositing a first dielectric layer (42), and Forming a first metal pad (54A) in the first dielectric layer by electrochemical plating of metallic material and planarizing with a chemical mechanical polishing (CMP) process to remove excess metallic material, wherein the CMP process is adapted such that the first metal pad (54A) has a first recess (56) adjacent to an edge portion of the first metal pad, Forming a second device die (112) comprising: a second dielectric layer (142), and a second metal pad (154) in the second dielectric layer, and Bonding the first device die (4) to the second device die (112), wherein the first dielectric layer (42) is bonded to the second dielectric layer (142) and the first metal pad (54A) is bonded to the second metal pad (154); wherein the second metal pad (154) includes a second recess (156) adjacent to an edge of the second metal pad, and the first recess (156) is separated from the second recess (156) at a time when bonding has begun, and after bonding, the first recess remains and the second recess disappears.

A MEMS device and a manufacturing method thereof, the manufacturing method comprising: providing a first substrate, the first substrate being formed with a cavity and a lead layer, the lead layer comprising a strip-shaped lead and a ring-shaped lead arranged around the cavity, the ring-shaped lead having a broken area, the strip-shaped lead passing through the broken area, and the strip-shaped lead and the ring-shaped lead having a gap at the broken area; forming a first dielectric layer covering the lead layer, wherein the first dielectric layer is formed with a recessed area corresponding to the gap; forming a metal filling layer in the recessed area; forming a metal bonding layer arranged around the cavity on the first dielectric layer; and providing a second substrate, the bonding surface of the second substrate being bonded with the metal bonding layer, the metal filling layer being capable of deforming and filling the recessed area during the bonding process. The application can effectively eliminate the recessed defects of the metal bonding layer, reduce the process difficulty of the bonding, ensure the close fit of the bonding interface, prevent the generation of void defects, and improve the sealing reliability.

Package, containing: a first interposer (111A) wherein the first interposer (111A) has a first redistribution structure (160); a first die (50A) which is bonded to a first surface of the first redistribution structure (160) by a dielectric-dielectric bond and a metal-metal bond; a second interposer (111B) adjacent to the first interposer (111A), wherein the second interposer (111B) has a second redistribution structure (160); a second die (50B) which is bonded to a first surface of the second redistribution structure (160) by a first lot bond (128); an encapsulation material (133) around the first die (50A) and the second die (50B); and several conductive connectors (128) on a second side of the first redistribution structure (160) opposite the first die (50A) and the second die (50B).

A miniature LED comprises a bonding layer, an N-type semiconductor layer formed on the bonding layer, a light-emitting layer formed on the N-type semiconductor layer and a P-type semiconductor layer formed on the light-emitting layer. The bonding layer comprises a first metal bonding layer and a second metal bonding layer bonded with the N-type semiconductor layer; and the transparent bonding layer is formed between the first metal bonding layer and the second metal bonding layer. The thickness of the transparent bonding layer is one fourth of the wavelength of light emitted by the light-emitting layer.

To provide a base for piezoelectric devices having a novel structure.SOLUTION: A base for piezoelectric devices comprises: a substrate 11 consisting of glass or crystal; loading patterns 21a and 21b for piezoelectric elements which are provided on a first face of the substrate 11; a frame-shaped wall part 12 which is provided in a portion along an edge of the substrate 11 of the first face, consists of the same material as the substrate 11 and is bonded to the substrate 11 by a first metal film 13 for inter-metal bonding; external mounting terminals 22a-22d provided on a second face which is an opposite face of the first face of the substrate 11; contact parts 23a and 23b which are insulated from the first metal film 13 in a region just below the wall part 12, penetrate the substrate 11 and electrically connect the loading patterns 21a and 21b with the external mounting terminals 22a-22d; and second metal films 24a and 24b which are provided in portions opposed to the contact parts 23a and 23b on a face of the wall part 12 on the side of the substrate, form inter-metal bonding with the contact parts 23a and 23b and form air-tightness of the contact parts 23a and 23b.SELECTED DRAWING: Figure 1