21results about "Conductive pattern reinforcement" patented technology

A method of manufacturing a packaging substrate according to the present disclosure includes a preparing step of preparing a panel-level packaging substrate comprising a core substrate, a first redistribution layer disposed on the core substrate, and a second redistribution layer disposed under the core substrate, and an electroless surface treatment step of forming terminals by simultaneously performing electroless surface treatment on an upper surface and a lower surface of the panel-level packaging substrate. The packaging substrate comprises a core layer, the first redistribution layer disposed on the core layer, the second redistribution layer disposed under the core layer, and the terminals disposed on an upper surface of the first redistribution layer and a lower surface of the second redistribution layer. A difference between a maximum thickness value and a minimum thickness value of the terminals formed on the packaging substrate is 5 µm or less. In such a case, terminals having improved thickness uniformity may be formed, and process efficiency during terminal formation may be promoted.

Method for creating an electrode on a substrate (10) using a laser assisted deposition process. A metal paste (14) is printed and dried (15) on the substrate to form a conductive layer (16), and by 2D or 3D inspection, the dimensions of the conductive layer are measured. The substrate is subject to a pretreatment process (12) so as to increase adhesion and / or conduction of the conductive layer to the substrate. An electrode that is produced according to the present method may be used in flexible devices.

The present application relates to the technical field of 3D printing, and particularly relates to a printing device and forming method of a circuit protection layer of a display device. The printing device of the present application comprises: a main support; the main support has a front end and a rear end along a horizontal direction; at least two barrier wall printing units, which are adapted to print and form barrier walls on the surface of the connection area and / or non-connection area of a flexible circuit board respectively; the printing unit comprises a printing needle; the printing units are arranged at intervals in the direction from the front end to the rear end; a filling glue printing unit is arranged at intervals with the barrier wall printing units in the direction from the front end to the rear end, is located between the rear end and the barrier wall printing units, and is adapted to print filling glue in the space between the multiple barrier walls formed by the multiple printing units to form a circuit protection layer; the circuit protection layer covers at least the connection area. The present application can effectively solve the problems of poor uniformity of the film layer thickness of the circuit protection layer, influence on packaging, and even possible influence on the display effect.

This invention discloses a method for electroplating soft gold onto a circuit board, and also discloses the circuit board. The method includes the following steps: S1: Obtaining a circuit board with a copper layer on its surface; S2: Electroplating a nickel layer on the surface of the copper layer, wherein the surface of the nickel layer has gold bonding lines and non-gold bonding lines; S3: Forming multiple arrayed and spaced bump structures in the gold bonding lines, each bump structure including a nickel substrate and a gold surface layer disposed on the surface of the nickel substrate; S4: Electroplating the circuit board with gold to form a first gold layer on the gold bonding lines and a second gold layer on the non-gold bonding lines, wherein the thickness of the first gold layer is greater than the thickness of the second gold layer. In this way, selective thickening of the gold bonding lines is achieved during the gold plating process, ensuring that the gold bonding lines have a sufficiently thick gold layer to guarantee the reliability of the gold bonding lines, while the non-gold bonding lines maintain a relatively thin gold layer, which can reduce the amount of gold used and lower the production cost of the circuit board.

A transparent article has a transparent laminating film; and an electrically-conductive, metal-containing pattern disposed over a surface of the transparent laminating film (or transparent polymeric film). The electrically-conductive, metal-containing pattern has a metallic pattern comprising a first surface facing the transparent laminating film and an opposing second surface. Such articles can be prepared using steps A) and B'), in order: A) providing a metallic pattern on a surface of a first substrate; and B') transferring the metallic pattern to a surface of a second substrate (transparent laminating film), thereby providing an electrically-conductive metal-containing pattern on the surface of the second substrate, wherein the second substrate is a transparent laminating film. Catalytic inks can also be used to prepare the electrically-conductive, metal-containing pattern. Such articles can also be incorporated between two panes of rigid materials such as glass to form a composite article such as a windshield with an invisible antenna.

The purpose of this invention is to provide a copper film-forming ink according to which high printability and high printing stability can be achieved. Specifically, disclosed is a copper film-forming ink, which contains a copper complex composed of copper formate and a five-membered or six-membered nitrogen-containing heterocyclic compound having one alkyl substituent composed of 2-5 carbon atoms or two or more alkyl substituents composed of 1-5 carbon atoms and having 1-3 nitrogen atoms, and a monovalent alcohol having 2-6 carbon atoms and optionally having an ether bond.

A method for generating stencil openings, including: extracting pieces of pad pattern data from a solder-paste printing layer of a PCB and encoding graphical features of the pad pattern data; searching for candidate component packages in a stencil opening library based on pad pattern codes; matching pad pattern data of the candidate component packages with the pad pattern data of the PCB; generating a stencil opening layer of the PCB based on stencil opening data of the successfully matched candidate component packages, to process a stencil template according to the stencil opening layer. The present disclosure allows for the automatic identification of component packages based solely on pad pattern data without manual recognition. Subsequently, corresponding stencil opening patterns are found in the stencil opening library based on the component packages, achieving automated design of stencil openings and solving the problem of inefficiency in the stencil template manufacturing process.

An autocatalytic gold bath capable of depositing gold from solution onto a substrate, wherein the substrate has one or more metal layers thereon. The autocatalytic gold bath includes (a) a chelator; (b) a gold salt; and (c) a reducing agent, wherein the reducing agent comprises an organic molecule having more than one carbon atom on the organic molecule. A process of plating gold onto the surface of the one or more metal layers on the substrate is also included. The gold plating bath can be used to deposit a final finish to the surface of the one or more metal layers which can be formed in an ENIG, ENEPIG, EPAG, direct gold over copper or gold over silver process.

An assembly with an electric feedthrough is provided, including a main body having an opening, through which an electric conductor is passed and held with a fixing material. The electric conductor surface not covered by the fixing material has a first coating while the surface covered by the fixing material lacks the first coating. The main body surface uncovered by the fixing material omits the first coating and optionally has a second coating, different from the first coating, or is provided completely with the first coating. The main body surface covered by the fixing material lacks the first coating, and the electric conductor surface uncovered by the fixing material lacks the first coating and is optionally provided with a second coating, different from the first coating. The first coating has one or more layers, and the outermost layer is an electrolessly deposited layer of a first coating material.

The application relates to a gold plating method for a high-speed communication module segmented finger chain belt, which comprises the following steps: providing a carrier plate and an expansion plate; punching a first clamping part on the plate edge of the carrier plate and punching a second clamping part on the expansion plate; carrying out brown oxidation treatment on the punched plate edge of the carrier plate; clamping the expansion plate on the carrier plate to form a composite plate; laminating a copper foil and a prepreg with the composite plate to form a laminated body; placing the laminated body between heated steel plates of a press to carry out hot pressing and curing to form a semi-finished plate; feeding the semi-finished plate into a gold plating tank through a conveying chain belt to carry out full-face gold plating on the gold plating surface of the semi-finished plate; and carrying out subsequent processing on the gold-plated semi-finished plate to obtain a finished high-speed communication module circuit board. The gold plating method combines the expansion plate with the carrier plate, and directly clamps the expansion plate during gold plating, so that the gold plating efficiency is improved, and the product quality is obviously improved.

A packaging substrate can include a first surface having a first mounting region of a first electronic module region and a second mounting region of a second electronic module region, the second electronic module region being adjacent to the first electronic module region. The packaging substrate can include a second opposing surface having a first electrical contacts region of the first electronic module region and a second electrical contacts region of the second electronic module region. A saw street region can extend between the first and second electronic module regions, and a saw street feature can be formed on the second opposing surface within at least a portion of the saw street region, the saw street feature comprising a solder mask layer over a metal layer and being spaced from the first and second electronic module regions.

The present disclosure relates to the technical field of lamps, and discloses a power plug structure and a power-taking system. The power plug structure includes: a plug housing; a circuit board assembly, disposed in the plug housing and used for providing a wire interface; a plurality of plug assembly rows, each of the plug assembly rows including at least one plug assembly, with the plug assemblies in different rows arranged in a staggered manner in the width direction; one end of each plug assembly is electrically connected to the circuit board assembly, and the other end of each plug assembly is electrically connected to the conductive structure of the electrical track. In the present disclosure, the plug assemblies in different rows are arranged in a staggered manner in the width direction, which can reduce interference between adjacent plug assemblies. Even if the width of the wire slot of the electrical track is small, it can still ensure that each plug assembly maintains good contact with the conductive structure of the electrical track. The plug assemblies arranged in a staggered manner can reduce the risk of short circuits between adjacent plug assemblies, ensuring the safe operation of the electrical system.

An article is provided to have a transparent substrate; and an electrically-conductive, metal-containing pattern disposed on a surface the transparent substrate. The electrically-conductive, metal-containing pattern has, in order outwardly from a surface of the transparent substrate: a first darkening agent; a metallic pattern; and a second darkening agent. The first darkening agent substantially conforms to a first surface of the metallic pattern, forming a first darkened surface on the metallic pattern. In addition, the second darkening agent is disposed over at least a portion of a second surface of the metallic pattern, forming a second darkened surface on the metallic pattern.

Provided is a method for producing a circuit pattern, the method capable of satisfactorily plating a circuit pattern bonded to a release sheet and satisfactorily peeling the plated circuit pattern from the release sheet. The method for producing a circuit pattern includes: a step of plating a predetermined portion on a surface of a metal plate (11); a step of bonding a release sheet (14) to a back surface of the plated metal plate (11); a step of providing a resist pattern (17) covering the plating on the surface of the metal plate (11); and a step of forming a circuit pattern (2) bonded to the release sheet (14) by etching the metal plate (11) provided with the resist pattern (17).

The present application provides a multilayer substrate, a manufacturing method of the multilayer substrate and an electronic device including the multilayer substrate, which form a sub-via hole partially overlapping with a main via hole to reduce the undercut degree of the inside of the via hole when forming the via hole on the multilayer substrate. The multilayer substrate includes: a base substrate; a first circuit wiring layer and a first via hole pad formed on the base substrate; an interlayer insulating layer covering the first circuit wiring layer and the first via hole pad; a via hole portion formed through the interlayer insulating layer and in contact with the first via hole pad; an electroplated portion filling the via hole portion; a second circuit wiring layer formed on the interlayer insulating layer; and a second via hole pad formed on the electroplated portion, wherein the via hole portion includes a main via hole and a sub-via hole partially overlapping with the main via hole.

The double-sided multi-layer PCB electroplating equipment comprises two side strip frames which are parallel to each other, and further comprises a plurality of electrolytic bath structures and a plurality of non-electrified liquid tanks, the angle of the PCB can be changed through the air cylinder, when the PCB is lifted to leave liquid, the PCB is inclined, so that the liquid starts to flow down from one corner, then the PCB is changed into a vertical state, the amount of the liquid stained on the surface of the PCB is reduced, the liquid can be emptied more orderly through the path, on the basis, the two sides of the PCB can be shielded by the fixed flow guide baffle and the movable flow guide baffle, and under the action of gravity, the PCB can be separated from the liquid. Liquid flows downwards, the downward flowing path of the liquid is optimized by changing the inclined mode into the vertical mode, and due to the fact that the liquid can be preferentially attached to the continuous solid surface which is firstly in contact with the liquid and reaches the surfaces of the adjacent fixed flow guide baffle and the movable flow guide baffle under the capillary action, the flowing displacement of the liquid on the PCB is improved, and the flowing speed of the PCB is increased. Therefore, the influence of the downward flowing liquid on the surface of the PCB is relieved, and the electroplating uniformity is improved.

A component carrier (100) which comprises a stack (102) comprising at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106), and electrically conductive wiring structures (108) being part of the at least one electrically conductive layer structure (104), wherein a value of the passive intermodulation (PIM) for signals propagating along the electrically conductive wiring structures (108) is less than -153 dBc.

The present disclosure relates to a high-precision multilayer PCB and a 3D printing preparation method thereof. The method includes: S1, forming a 3D circuit layer on an upper surface of a substrate; S2, forming a metal pillar at a preset position of the current 3D circuit layer by stacking; S3, forming an insulating layer on an upper surface of the current 3D circuit layer, and leading the corresponding metal pillar out of the formed insulating layer in advance by drilling a hole in the insulating layer and filling the drilled hole with the nanoscale metal slurry; S4, forming a pad layer on an upper surface of the current insulating layer and executing step S5 if the current insulating layer is a top layer; repeatedly executing steps S1 and S2 by using the current insulating layer as a new substrate and executing step S6 if not; S5, connecting the corresponding metal pillar or leading it out in advance and connecting to the pad layer, to complete the preparation of the multilayer PCB; and S6, connecting the corresponding metal pillar or leading it out in advance and connecting to the current 3D circuit layer, and returning to step S3. According to the present disclosure, the high-precision multilayer PCB with high interconnect precision can be prepared.

The present invention provides a printed circuit board in which the height and size of conductive bumps have been increased. [Solution] The printed circuit board of the present invention comprises an insulating layer, a conductive pad embedded above the insulating layer with at least a portion of its upper surface exposed above the insulating layer, a first conductive bump disposed on the upper surface of the conductive pad, a passivation layer disposed on the upper surface of the insulating layer and covering a portion of the upper surface of the conductive pad and a portion of the side surface of the first conductive bump, and a second conductive bump disposed on the upper surface of the passivation layer and covering the other portion of the side surface of the first conductive bump and the upper surface of the first conductive bump.

The present invention provides a method for manufacturing a metal wiring on a substrate, the method comprising a step for forming a first layer including a first material on at least part of the substrate, a step for forming a crack in the first layer so as to form a first layer having a crack, and a step for forming a second layer including a second material on the first layer having the crack.