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959results about "Insulating substrate metal adhesion improvement" patented technology

Method of electroless plating copper on nitride barrier

A method with three embodiments of manufacturing metal lines and solder bumps using electroless deposition techniques. The first embodiment uses a PdSix seed layer 50 for electroless deposition. The PdSix layer 50 does not require activation. A metal line is formed on a barrier layer 20 and an adhesion layer 30. A Palladium silicide seed layer 50 is then formed and patterned. Ni, Pd or Cu is electroless deposited over the Palladium silicide layer 50 to form a metal line. The second embodiment selectively electrolessly deposits metal 140 over an Adhesion layer 130 composed of Poly Si, Al, or Ti. A photoresist pattern 132 is formed over the adhesion layer. A metal layer 140 of Cu or Ni is electrolessly deposited over the adhesion layer. The photoresist layer 132 is removed and the exposed portion of the adhesion layer 130 and the underlying barrier metal layer 120 are etched thereby forming a metal line. The third embodiment electroless deposits metal over a metal barrier layer that is roughen by chemical mechanical polishing. A solder bump is formed using an electroless deposition of Cu or Ni by: depositing an Al layer 220 and a barrier metal layer 230 over a substrate 10. The barrier layer 230 is polished and activated. Next, the aluminum layer 220 and the barrier metal layer 230 are patterned. A metal layer 240 is electroless deposited. Next a solder bump 250 is formed over the electroless metal layer 240.

Printed wiring board having highly reliably via hole and process for forming via hole

Disclosed are a printed wiring board having micro-via holes highly reliable for conduction and a method of making the micro-via hole by providing a coating or sheet of an organic substance containing 3 to 97% by volume of at least one selected from a metal compound powder, a carbon powder or a metal powder having a melting point of at least 900° C. and a bond energy of at least 300 kJ/mol on a copper foil as an outermost layer of a copper-clad laminate having at least two copper layers, or providing a coating or sheet of the same after oxidizing a copper foil as an outermost layer, irradiating the coating or sheet with a carbon dioxide gas laser at an output of 20 to 60 mJ/pulse, thereby removing a micro-via-hole-forming portion of at least the copper foil as the outermost layer, then irradiating micro-via-hole-forming portions of the remaining layers with a carbon dioxide gas laser at an output of 5 to 35 mJ/pulse to make a micro-via hole which does not penetrate through the copper foil in a bottom of the micro-via hole, and electrically connecting the copper foil as the outermost layer and the copper foil in the bottom of the micro-via hole with a metal plating or an electrically conductive coating composition.

Copper circuit junction substrate and method of producing the same

A highly reliable copper circuit-joined board that, in mounting a semiconductor element, a lead frame or the like on a ceramic substrate, enables the semiconductor element, the lead frame or the like to be strongly joined to the substrate without breaking or deformation of the substrate found in conventional joining methods, such as brazing and joining using a copper/copper oxide eutectic crystal. Any one of an interposing layer comprising a brazing material layer comprising silver and/or copper as a main component and an active metal or an interposing layer having a two-layer structure comprising a first interposing layer comprising the brazing material layer or a high-melting metallizing layer and a second interposing layer, having a melting point of C. or below, comprising Ni, Fe, Cu as a main component in that order from the substrate side, is formed on a ceramic substrate, and a conductor layer, comprising copper as a main component, which, in both the lengthwise and widthwise directions, is at least 0.05 mm shorter than the interposing layer, is formed on the interposing layer to prepare a copper circuit-joined board. The copper circuit-joined board may comprise the base board having thereon an outer layer comprising Ni as a main component. A semiconductor element is mounted on the copper circuit-joined board to prepare a semiconductor device.
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