526 results about "Electroless deposition" patented technology

Embodiments of the invention described herein generally provide methods for forming cobalt silicide layers and metallic cobalt layers by using various deposition processes and annealing processes. In one embodiment, a method for forming a cobalt silicide material on a substrate is provided which includes treating the substrate with at least one preclean process to expose a silicon-containing surface, depositing a cobalt silicide material over the silicon-containing surface, and depositing a copper material over the cobalt silicide material. In another embodiment, a metallic cobalt material may be deposited over the cobalt silicide material prior to depositing the copper material. In one example, the copper material may be formed by depositing a copper seed layer and a copper bulk layer on the substrate. The copper seed layer may be deposited by a PVD process and the copper bulk layer may be deposited by an ECP process or an electroless deposition process.

Embodiments of the invention provide a cluster tool configured to deposit a material onto a substrate surface by using one or more electroless, electrochemical plating, CVD and/or ALD processing chambers. In one aspect, a ruthenium-containing catalytic layer is formed. Embodiments of the invention provide a hybrid deposition system configured to deposit a seed layer on a substrate with an electroless process and to subsequently fill interconnect features on the substrate with an ECP cell. Other aspects provide an electroless deposition system configured to deposit a seed layer on a substrate, fill interconnect features on a substrate, or sequentially deposit both a seed layer and fill interconnect features on the substrate. One embodiment provides an electroless deposition system configured to form a capping layer over substrate interconnects. The system includes a vapor dryer for pre- and post-deposition cleaning of substrates as well as a brush box chamber for post-deposition cleaning.

A method with three embodiments of manufacturing metal lines and solder bumps using electroless deposition techniques. The first embodiment uses a PdSix seed layer 50 for electroless deposition. The PdSix layer 50 does not require activation. A metal line is formed on a barrier layer 20 and an adhesion layer 30. A Palladium silicide seed layer 50 is then formed and patterned. Ni, Pd or Cu is electroless deposited over the Palladium silicide layer 50 to form a metal line. The second embodiment selectively electrolessly deposits metal 140 over an Adhesion layer 130 composed of Poly Si, Al, or Ti. A photoresist pattern 132 is formed over the adhesion layer. A metal layer 140 of Cu or Ni is electrolessly deposited over the adhesion layer. The photoresist layer 132 is removed and the exposed portion of the adhesion layer 130 and the underlying barrier metal layer 120 are etched thereby forming a metal line. The third embodiment electroless deposits metal over a metal barrier layer that is roughen by chemical mechanical polishing. A solder bump is formed using an electroless deposition of Cu or Ni by: depositing an Al layer 220 and a barrier metal layer 230 over a substrate 10. The barrier layer 230 is polished and activated. Next, the aluminum layer 220 and the barrier metal layer 230 are patterned. A metal layer 240 is electroless deposited. Next a solder bump 250 is formed over the electroless metal layer 240.

Embodiments of the invention generally provide methods of filling contact level features formed in a semiconductor device by depositing a barrier layer over the contact feature and then filing the layer using an PVD, CVD, ALD, electrochemical plating process (ECP) and/or electroless deposition processes. In one embodiment, the barrier layer has a catalytically active surface that will allow the electroless deposition of a metal on the barrier layer. In one aspect, the electrolessly deposited metal is copper or a copper alloy. In one aspect, the contact level feature is filled with a copper alloy by use of an electroless deposition process. In another aspect, a copper alloy is used to from a thin conductive copper layer that is used to subsequently fill features with a copper containing material by use of an ECP, PVD, CVD, and/or ALD deposition process. In one embodiment, a portion of the barrier layer is purposely allowed to react with traces of residual oxide at the silicon junction of the contact level feature to form a low resistance connection.

In one embodiment, a method for depositing a material on a substrate is provided which includes positioning a substrate containing a contact within a process chamber, exposing the substrate to at least one pretreatment step and depositing a fill the contact vias by an electroless deposition process. The pretreatment step contains multiple processes for exposing the substrate to a wet-clean solution, a hydrogen fluoride solution, a tungstate solution, a palladium activation solution, an acidic rinse solution, a complexing agent solution or combinations thereof. Generally, the HARC via contains a tungsten oxide surface and the shallow contact via may contain a tungsten silicide surface. In some example, the substrate is pretreated such that both vias are filled at substantially the same time by a nickel-containing material through an electroless deposition process.

Embodiments as described herein provide methods for depositing a material on a substrate during electroless deposition processes, as well as compositions of the electroless deposition solutions. In one embodiment, the substrate contains a contact aperture having an exposed silicon contact surface. In another embodiment, the substrate contains a contact aperture having an exposed silicide contact surface. The apertures are filled with a metal contact material by exposing the substrate to an electroless deposition process. The metal contact material may contain a cobalt material, a nickel material, or alloys thereof. Prior to filling the apertures, the substrate may be exposed to a variety of pretreatment processes, such as preclean processes and activations processes. A preclean process may remove organic residues, native oxides, and other contaminants during a wet clean process or a plasma etch process. Embodiments of the process also provide the deposition of additional layers, such as a capping layer.

The invention includes processes for combined polymer surface treatment and metal deposition. Processes of the invention include forming an aqueous solution containing a metal activator, such as an oxidized species of silver, cobalt, ruthenium, cerium, iron, manganese, nickel, rhodium, or vanadium. The activator can be suitably oxidized to a higher oxidation state electrochemically. Exposing a part to be plated (such as an organic resin, e.g. a printed circuit board substrate) to the solution enables reactive hydroxyl species (e.g. hydroxyl radicals) to be generated and to texture the polymer surface. Such texturing facilitates good plated metal adhesion. As part of this contacting process sufficient time is allowed for both surface texturing to take place and for the oxidized metal activator to adsorb onto said part. The part is then contacted with a reducing agent capable of reducing the metal activator to a lower ionic form, or a lower oxidation state. That reduction can result in the formation of metallic catalytic material over the surface of the part. The reduced metal activator can then function to catalyze the electroless deposition of metal such as copper from solution by contacting the part with the plating solution.

High quality dielectric layers, e.g., high-k dielectric layers comprised of at least one refractory or lanthanum series transition metal oxide or silicate, for use as gate insulator layers in in-laid metal gate MOS transistors and CMOS devices, are fabricated by forming an ultra-thin catalytic metal layer, e.g., a monolayer thick layer of Pd or Pd, on a Si-based semiconductor substrate, electrolessly plating on the catalytic layer comprising at least one refractory or lanthanum series transition metal or metal-based dielectric precursor layer, such as of Zr and/or Hf, and then reacting the precursor layer with oxygen or with oxygen and the semiconductor substrate to form the at least one high-k metal oxide or silicate. The inventive methodology prevents, or at least substantially reduces, oxygen access to the substrate surface during at least the initial stage(s) of formation of the gate insulator layer, thereby minimizing deleterious formation of oxygen-induced surface states at the semiconductor substrate/gate insulator interface.

Embodiments of the invention provide a method for depositing a copper material on a substrate by an electroless deposition process and also provide a composition of an electroless deposition solution. In one embodiment, the copper material is deposited from an electroless copper solution that contains an additive, such as an inhibitor, to promote a bottom-up fill process. In one aspect, the field of the substrate may be maintained free of copper material or substantially free of copper material during the electroless deposition process. Prior to the electroless deposition process for forming the copper material, a barrier layer may be deposited on the substrate, and thereafter, a ruthenium layer may be deposited thereon. In one example, the copper material is formed during a bottom-up, electroless deposition process directly on the ruthenium layer. Alternatively, a seed layer may be formed on the ruthenium layer prior to depositing the copper material.

A method and apparatus for fabricating a solar cell and forming metal contact is disclosed. Solar cell contact and wiring is formed by depositing a thin film stack of a first metal material and a second metal material as an initiation layer or seed layer for depositing a bulk metal layer in conjunction with additional sheet processing, photolithography, etching, cleaning, and annealing processes. In one embodiment, the thin film stack for forming metal silicide with reduced contact resistance over the sheet is deposited by sputtering or physical vapor deposition. In another embodiment, the bulk metal layer for forming metal lines and wiring is deposited by sputtering or physical vapor deposition. In an alternative embodiment, electroplating or electroless deposition is used to deposit the bulk metal layer.

Disclosed herein are methods to create medical devices and medical devices including bioactive composite structures. The methods include using template-assisted electro- or electroless deposition or codeposition methods for providing implantable medical devices coated with bioactive composite structures and also include layering deposited or codeposited metal layers with layers of bioactive materials. In one use, the implantable medical devices of the present invention include stents with bioactive composite structure coatings.

An apparatus of the invention has a closable chamber that can be sealed and is capable of withstanding an increased pressure and high temperature. The chamber contains a substrate holder that can be rotated around a vertical axis, and an edge-grip mechanism inside the substrate holder. The deposition chamber has several inlet ports for the supply of various process liquids, such as deposition solutions, DI water for rinsing, etc., and a port for the supply of a gas under pressure. The apparatus is also provided with reservoirs and tanks for processing liquids and gases, as well as with a solution heater and a control system for controlling temperature and pressure in the chamber. The heater can be located outside the working chamber or built into the substrate holder, or both heaters can be used simultaneously. Uniform deposition is achieved by carrying out the deposition process under pressure and under temperature slightly below the boiling point of the solution. The solution can be supplied from above via a shower head formed in the cover, or through the bottom of the chamber. Rinsing or other auxiliary solutions are supplied via a radially moveable chemical dispensing arm that can be arranged above the substrate parallel thereto.

An electroless deposition system is provided. The system includes a processing mainframe, at least one substrate cleaning station positioned on the mainframe, and an electroless deposition station positioned on the mainframe. The electroless deposition station includes an environmentally controlled processing enclosure, a first processing station configured to clean and activate a surface of a substrate, a second processing station configured to electrolessly deposit a layer onto the surface of the substrate, and a substrate transfer shuttle positioned to transfer substrates between the first and second processing stations. The system also includes a substrate transfer robot positioned on the mainframe and configured to access an interior of the processing enclosure. The system also includes a substrate a fluid delivery system that is configured to deliver a processing fluid by use of a spraying process to a substrate mounted in the processing enclosure.

A copper damascene structure formed by direct patterning of a low-dielectric constant material is disclosed. The copper damascene structure includes a tungsten nitride barrier layer formed by atomic layer deposition using sequential deposition reactions. Copper is selectively deposited by a CVD process and/or by an electroless deposition technique.

The present invention relates to compositions and a method for electroless formation of alkaline-metal-free coatings on the basis of cobalt and composition of cobalt with tungsten and phosphorus, which have high resistance to oxidation and stability of electrical characteristics, when the Co—Cu system layer is used in IC chips. The composition of the electroless solution contains more than one reducing agents, one of which can catalyze the initial electroless deposition layer of cobalt on copper (called initiator), while the other maintains deposition of cobalt on the aforementioned initial layer as the process is continued. Small amount (100-5000 ppm) of elements from the initiator also builds into the electroless film, which is expected to further improve the barrier properties of the resultant film compared to the deposition bath without initiator. Such coating may find application in semiconductor manufacturing where properties of deposited films and controllability of the composition and physical and chemical characteristics of the deposited films may be critically important.

A method and apparatus for electrolessly depositing a multilayer film using a fluid processing solution(s) that can clean and then electrolessly deposit a metal films having discrete or varying composition onto a conductive surface using a single processing cell. The process advantageously includes in-situ cleaning step in order to minimize the formation of oxides on the conductive surfaces, by minimizing or preventing the exposure of the conductive surfaces to oxygen (e.g., air) between the cleaning step and an electroless deposition process step(s). In one aspect, the chemical components used in the fluid processing solution(s) are selected so that the interaction of various chemical components will not drastically change the desirable properties of each of the interacting fluids, generate particles in the fluid lines or on the surface of the substrate, and/or generate a significant amount of heat which can damage the hardware or significantly change the electroless process results. In another aspect, no rinsing steps are required between the various deposition steps used to form the various layers, since the processing fluids are selected so that they are compatible with each other. In another aspect, throughout the process the conductive surfaces are continually in contact with various chemical components that will inhibit oxidation of the conductive surfaces and/or reduce the oxidized metal surfaces. In one aspect, a multilayer structure can formed on the surface of the conductive surface using the continuous electroless deposition process where the first layer of the multilayer structure has at least two of the following elements cobalt (Co), tungsten (W), phosphorus (P) or boron (B); and a second layer contains at least two of the following elements cobalt (Co), boron (B) or phosphorus (P). Formation of a multilayer structure on the conductive surface may have advantage since each deposited layer can have differing properties which when placed together will form a layer that has improved properties over a single deposited layer.