3438 results about "Physical vapor deposition" patented technology

Prior electrochromic devices frequently suffer from high levels of defectivity. The defects may be manifest as pin holes or spots where the electrochromic transition is impaired. This is unacceptable for many applications such as electrochromic architectural glass. Improved electrochromic devices with low defectivity can be fabricated by depositing certain layered components of the electrochromic device in a single integrated deposition system. While these layers are being deposited and/or treated on a substrate, for example a glass window, the substrate never leaves a controlled ambient environment, for example a low pressure controlled atmosphere having very low levels of particles. These layers may be deposited using physical vapor deposition.

A system and method for detecting the potential of non-cathode arcing in a plasma generation apparatus, such as a physical vapor deposition chamber. The system and method involve computing a statistical parameter of cathode-arcing event data in the chamber and performing a pattern recognition technique to a moving average of the statistical parameter.

An exemplary apparatus and method of forming a ruthenium tetroxide containing gas to form a ruthenium containing layer on a surface of a substrate is described herein. The method and apparatus described herein may be especially useful for fabricating electronic devices that are formed on a surface of the substrate or wafer. Generally, the method includes exposing a surface of a substrate to a ruthenium tetroxide vapor to form a catalytic layer on the surface of a substrate and then filling the device structures by an electroless, electroplating, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD) or plasma enhanced ALD (PE-ALD) processes. In one embodiment, the ruthenium containing layer is formed on a surface of a substrate by creating ruthenium tetroxide in an external vessel and then delivering the generated ruthenium tetroxide gas to a surface of a temperature controlled substrate positioned in a processing chamber. In one embodiment, a ruthenium tetroxide containing solvent formation process is used to form ruthenium tetroxide using a ruthenium tetroxide containing source material. In one embodiment, of a ruthenium containing layer is formed on a surface of a substrate, using the ruthenium tetroxide containing solvent. In another embodiment, the solvent is separated from the ruthenium tetroxide containing solvent mixture and the remaining ruthenium tetroxide is used to form a ruthenium containing layer on the surface of a substrate.

The present invention generally provides a method for processing a surface of a substrate in a physical vapor deposition (PVD) chamber that has a sputtering target that has separately biasable sections, regions or zones to improve the deposition uniformity. In general, aspects of the present invention can be used for flat panel display processing, semiconductor processing, solar cell processing, or any other substrate processing. In one aspect, each of the target sections of the multizone target assembly are biased at a different cathodic biases by use of one or more DC or RF power sources. In one aspect, each of the target sections of the multizone target assembly are biased at a different cathodic biases by use of one power source and one or more resistive, capacitive and/or inductive elements. In one aspect, the processing chamber contains a multizone target assembly that has one or more ports that are adapted deliver a processing gas to the processing region of the PVD chamber. In one aspect, the processing chamber contains a multizone target assembly that has one or more magnetron assemblies positioned adjacent to one or more of the target sections.

The present invention generally provides an apparatus for processing a surface of a substrate in a physical vapor deposition (PVD) chamber that has a sputtering target that has separately biasable sections, regions or zones to improve the deposition uniformity. In general, aspects of the present invention can be used for flat panel display processing, semiconductor processing, solar cell processing, or any other substrate processing. In one aspect, each of the target sections of the multizone target assembly are biased at a different cathodic biases by use of one or more DC or RF power sources. In one aspect, each of the target sections of the multizone target assembly are biased at a different cathodic biases by use of one power source and one or more resistive, capacitive and/or inductive elements. In one aspect, the processing chamber contains a multizone target assembly that has one or more ports that are adapted deliver a processing gas to the processing region of the PVD chamber. In one aspect, the processing chamber contains a multizone target assembly that has one or more magnetron assemblies positioned adjacent to one or more of the target sections.

The invention includes chemical vapor deposition and physical vapor deposition methods of forming high k ABO₃ comprising dielectric layers on a substrate, where “A” is selected from the group consisting of Group IIA and Group IVB elements and mixtures thereof, and where “B” is selected from the group consisting of Group IVA metal elements and mixtures thereof. In one implementation, a plurality of precursors comprising A, B and O are fed to a chemical vapor deposition chamber having a substrate positioned therein under conditions effective to deposit a high k ABO₃ comprising dielectric layer over the substrate. During the feeding, pressure within the chamber is varied effective to produce different concentrations of A at different elevations in the deposited layer and where higher comparative pressure produces greater concentration of B in the deposited layer. In one implementation, a subatmospheric physical vapor deposition method of forming a high k ABO₃ comprising dielectric layer on a substrate includes providing a sputtering target comprising ABO₃ and a substrate to be deposited upon within a physical vapor deposition chamber. A sputtering gas is fed to the chamber under conditions effective to sputter the target and deposit a high k ABO₃ comprising dielectric layer over the substrate. During the feeding, pressure is varied within the chamber effective to produce different concentrations of B at different elevations in the deposited layer and where higher comparative pressure produces greater concentration of B in the deposited layer.

The present invention provides a method and apparatus for preferential PVD conductor fill in an integrated circuit structure. The present invention utilizes a high density plasma for sputter deposition of a conductive layer on a patterned substrate, and a pulsed DC power source capacitively coupled to the substrate to generate an ion current at the surface of the substrate. The ion current prevents sticking of the deposited material to the field areas of the patterned substrate, or etches deposited material from the field areas to eliminate crowning or cusping problems associated with deposition of a conductive material in a trench, hole or via formed on the substrate.

The invention generally provides a ground shield for use in a physical vapor deposition (PVD) chamber. In one embodiment, a ground shield includes a generally cylindrical body comprising an outer wall, an inner upper wall, an inner lower wall having a diameter less than a diameter of the inner upper wall and a reentrant feature coupling the upper and inner lower walls. The reentrant feature advantageously prevents arching between the shield and target, which promotes greater process uniformity and repeatability along with longer chamber component service life.

A method of providing sub-half-micron copper interconnections with improved electromigration and corrosion resistance. The method includes double damascene using electroplated copper, where the seed layer is deposited by chemical vapor deposition, or by physical vapor deposition in a layer less than about 800 angstroms.

An exemplary apparatus and method of forming a ruthenium tetroxide containing gas to form a ruthenium containing layer on a surface of a substrate is described herein. The method and apparatus described herein may be especially useful for fabricating electronic devices that are formed on a surface of the substrate or wafer. Generally, the method includes exposing a surface of a substrate to a ruthenium tetroxide vapor to form a catalytic layer on the surface of a substrate and then filling the device structures by an electroless, electroplating, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD) or plasma enhanced ALD (PE-ALD) processes. In one embodiment, the ruthenium containing layer is formed on a surface of a substrate by creating ruthenium tetroxide in an external vessel and then delivering the generated ruthenium tetroxide gas to a surface of a temperature controlled substrate positioned in a processing chamber. In one embodiment, a ruthenium tetroxide containing solvent formation process is used to form ruthenium tetroxide using a ruthenium tetroxide containing source material. In one embodiment, of a ruthenium containing layer is formed on a surface of a substrate, using the ruthenium tetroxide containing solvent. In another embodiment, the solvent is separated from the ruthenium tetroxide containing solvent mixture and the remaining ruthenium tetroxide is used to form a ruthenium containing layer on the surface of a substrate.

A method and apparatus for depositing a tantalum nitride barrier layer is provided for use in an integrated processing tool. The tantalum nitride is deposited by atomic layer deposition. The tantalum nitride is removed from the bottom of features in dielectric layers to reveal the conductive material under the deposited tantalum nitride. Optionally, a tantalum layer may be deposited by physical vapor deposition after the tantalum nitride deposition. Optionally, the tantalum nitride deposition and the tantalum deposition may occur in the same processing chamber.

Methods and apparatus are provided for uniformly depositing a coating material from a vaporization source onto a powdered substrate material to form a thin coalescence film of the coating material that smoothly replicates the surface microstructure of the substrate material. The coating material is uniformly deposited on the substrate material to form optical interference pigment particles. The thin film enhances the hiding power and color gamut of the substrate material. Physical vapor deposition processes are used for depositing the film on the substrate material. The apparatus and systems employed in forming the coated particles utilize vibrating bed coaters, vibrating conveyor coaters, or coating towers. These allow the powdered substrate material to be uniformly exposed to the coating material vapor during the coating process.

A thermal physical vapor deposition source for vaporizing compacted pellets of organic materials onto a surface of a substrate in forming a display, including a housing defining a plurality of spaced passages each for receiving compacted pellets, a cover plate over the housing, with a first plurality of openings corresponding to the spaced passages of the housing and an electrical heater structure disposed over the cover plate. The thermal physical vapor deposition source further including an aperture plate, disposed over the electrical heater structure, an electrically insulating spacer member located between the electrical heater structure and an aperture plate, and circuitry for applying current to the electrical heater structure to produce heat sufficient to vaporize the pellets and permit vapor efflux of materials to pass through the cover plate, the heater structure, the electrically insulating spacer member and the aperture plate, onto the substrate.

Use of physical vapor deposition methodologies to deposit nanoscale gold on activating support media makes the use of catalytically active gold dramatically easier and opens the door to significant improvements associated with developing, making, and using gold-based, catalytic systems. The present invention, therefore, relates to novel features, ingredients, and formulations of gold-based, heterogeneous catalyst systems generally comprising nanoscale gold deposited onto a nanoporous support.

A method and apparatus for fabricating a solar cell and forming metal contact is disclosed. Solar cell contact and wiring is formed by depositing a thin film stack of a first metal material and a second metal material as an initiation layer or seed layer for depositing a bulk metal layer in conjunction with additional sheet processing, photolithography, etching, cleaning, and annealing processes. In one embodiment, the thin film stack for forming metal silicide with reduced contact resistance over the sheet is deposited by sputtering or physical vapor deposition. In another embodiment, the bulk metal layer for forming metal lines and wiring is deposited by sputtering or physical vapor deposition. In an alternative embodiment, electroplating or electroless deposition is used to deposit the bulk metal layer.

A through hole (114) is formed in a wafer (104) comprising a semiconductor substrate (110). A seed layer (610) is sputtered on the bottom surface of the wafer. The seed is not deposited over the through hole's sidewalls adjacent the top surface of the wafer. A conductor (810) is electroplated into the through hole. In another embodiment, a seed is deposited into an opening in a wafer through a dry film resist mask (1110). The dry film resist overhangs the edges of the opening, so the seed is not deposited over the opening's sidewalls adjacent the top surface of the wafer. In another embodiment, a dielectric (120) is formed in an opening in a semiconductor substrate (110) by a non-conformal physical vapor deposition (PVD) process that deposits the dielectric on the sidewalls but not the bottom of the opening. A seed (610) is formed on the bottom by electroless plating. A conductor (810) is electroplated on the seed. In another embodiment, a dielectric (2910) is formed in the opening to cover the entire surface of the opening. A non-conformal layer (120) is deposited by PVD over the sidewalls but not the bottom of the opening. The dielectric (2910) is etched off the bottom with the non-conformal layer (120) as a mask. A seed (610) is formed on the bottom by electroless plating. The non-conformal layer can be formed by electroplating. It can be tantalum deposited by electroplating, then anodized. Other embodiments are also provided.

Blocker plates for chemical vapor deposition chambers and methods of treating blocker plates are provided. The blocker plates define a plurality of holes therethrough and have an upper surface and a lower surface that are at least about 99.5% pure, which minimizes the nucleation of contaminating particles on the blocker plates. A physically vapor deposited coating, such as an aluminum physically vapor deposited coating, may be formed on the upper and lower surfaces of the blocker plates. Chemical vapor deposition chambers including blocker plates having a physically vapor deposited coating thereon are also provided.

A method for forming a battery from via thin-film deposition processes is disclosed. A mesoporous carbon material is deposited onto a surface of a conductive substrate that has high surface area, conductive micro-structures formed thereon. A porous, dielectric separator layer is then deposited on the layer of mesoporous carbon material to form a half cell of an energy storage device. The mesoporous carbon material is made up of CVD-deposited carbon fullerene “onions” and carbon nano-tubes, and has a high porosity capable of retaining lithium ions in concentrations useful for storing significant quantities of electrical energy. Embodiments of the invention further provide for the formation of an electrode having a high surface area conductive region that is useful in a battery structure. In one configuration the electrode has a high surface area conductive region comprising a porous dendritic structure that can be formed by electroplating, physical vapor deposition, chemical vapor deposition, thermal spraying, and/or electroless plating techniques.