1434 results about "Physical vapor deposition" patented technology

Prior electrochromic devices frequently suffer from high levels of defectivity. The defects may be manifest as pin holes or spots where the electrochromic transition is impaired. This is unacceptable for many applications such as electrochromic architectural glass. Improved electrochromic devices with low defectivity can be fabricated by depositing certain layered components of the electrochromic device in a single integrated deposition system. While these layers are being deposited and/or treated on a substrate, for example a glass window, the substrate never leaves a controlled ambient environment, for example a low pressure controlled atmosphere having very low levels of particles. These layers may be deposited using physical vapor deposition.

A system and method for detecting the potential of non-cathode arcing in a plasma generation apparatus, such as a physical vapor deposition chamber. The system and method involve computing a statistical parameter of cathode-arcing event data in the chamber and performing a pattern recognition technique to a moving average of the statistical parameter.

An exemplary apparatus and method of forming a ruthenium tetroxide containing gas to form a ruthenium containing layer on a surface of a substrate is described herein. The method and apparatus described herein may be especially useful for fabricating electronic devices that are formed on a surface of the substrate or wafer. Generally, the method includes exposing a surface of a substrate to a ruthenium tetroxide vapor to form a catalytic layer on the surface of a substrate and then filling the device structures by an electroless, electroplating, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD) or plasma enhanced ALD (PE-ALD) processes. In one embodiment, the ruthenium containing layer is formed on a surface of a substrate by creating ruthenium tetroxide in an external vessel and then delivering the generated ruthenium tetroxide gas to a surface of a temperature controlled substrate positioned in a processing chamber. In one embodiment, a ruthenium tetroxide containing solvent formation process is used to form ruthenium tetroxide using a ruthenium tetroxide containing source material. In one embodiment, of a ruthenium containing layer is formed on a surface of a substrate, using the ruthenium tetroxide containing solvent. In another embodiment, the solvent is separated from the ruthenium tetroxide containing solvent mixture and the remaining ruthenium tetroxide is used to form a ruthenium containing layer on the surface of a substrate.

The present invention generally provides a method for processing a surface of a substrate in a physical vapor deposition (PVD) chamber that has a sputtering target that has separately biasable sections, regions or zones to improve the deposition uniformity. In general, aspects of the present invention can be used for flat panel display processing, semiconductor processing, solar cell processing, or any other substrate processing. In one aspect, each of the target sections of the multizone target assembly are biased at a different cathodic biases by use of one or more DC or RF power sources. In one aspect, each of the target sections of the multizone target assembly are biased at a different cathodic biases by use of one power source and one or more resistive, capacitive and/or inductive elements. In one aspect, the processing chamber contains a multizone target assembly that has one or more ports that are adapted deliver a processing gas to the processing region of the PVD chamber. In one aspect, the processing chamber contains a multizone target assembly that has one or more magnetron assemblies positioned adjacent to one or more of the target sections.

The present invention generally provides an apparatus for processing a surface of a substrate in a physical vapor deposition (PVD) chamber that has a sputtering target that has separately biasable sections, regions or zones to improve the deposition uniformity. In general, aspects of the present invention can be used for flat panel display processing, semiconductor processing, solar cell processing, or any other substrate processing. In one aspect, each of the target sections of the multizone target assembly are biased at a different cathodic biases by use of one or more DC or RF power sources. In one aspect, each of the target sections of the multizone target assembly are biased at a different cathodic biases by use of one power source and one or more resistive, capacitive and/or inductive elements. In one aspect, the processing chamber contains a multizone target assembly that has one or more ports that are adapted deliver a processing gas to the processing region of the PVD chamber. In one aspect, the processing chamber contains a multizone target assembly that has one or more magnetron assemblies positioned adjacent to one or more of the target sections.

The invention includes chemical vapor deposition and physical vapor deposition methods of forming high k ABO₃ comprising dielectric layers on a substrate, where “A” is selected from the group consisting of Group IIA and Group IVB elements and mixtures thereof, and where “B” is selected from the group consisting of Group IVA metal elements and mixtures thereof. In one implementation, a plurality of precursors comprising A, B and O are fed to a chemical vapor deposition chamber having a substrate positioned therein under conditions effective to deposit a high k ABO₃ comprising dielectric layer over the substrate. During the feeding, pressure within the chamber is varied effective to produce different concentrations of A at different elevations in the deposited layer and where higher comparative pressure produces greater concentration of B in the deposited layer. In one implementation, a subatmospheric physical vapor deposition method of forming a high k ABO₃ comprising dielectric layer on a substrate includes providing a sputtering target comprising ABO₃ and a substrate to be deposited upon within a physical vapor deposition chamber. A sputtering gas is fed to the chamber under conditions effective to sputter the target and deposit a high k ABO₃ comprising dielectric layer over the substrate. During the feeding, pressure is varied within the chamber effective to produce different concentrations of B at different elevations in the deposited layer and where higher comparative pressure produces greater concentration of B in the deposited layer.

The present invention provides a method and apparatus for preferential PVD conductor fill in an integrated circuit structure. The present invention utilizes a high density plasma for sputter deposition of a conductive layer on a patterned substrate, and a pulsed DC power source capacitively coupled to the substrate to generate an ion current at the surface of the substrate. The ion current prevents sticking of the deposited material to the field areas of the patterned substrate, or etches deposited material from the field areas to eliminate crowning or cusping problems associated with deposition of a conductive material in a trench, hole or via formed on the substrate.

The invention generally provides a ground shield for use in a physical vapor deposition (PVD) chamber. In one embodiment, a ground shield includes a generally cylindrical body comprising an outer wall, an inner upper wall, an inner lower wall having a diameter less than a diameter of the inner upper wall and a reentrant feature coupling the upper and inner lower walls. The reentrant feature advantageously prevents arching between the shield and target, which promotes greater process uniformity and repeatability along with longer chamber component service life.

A method of providing sub-half-micron copper interconnections with improved electromigration and corrosion resistance. The method includes double damascene using electroplated copper, where the seed layer is deposited by chemical vapor deposition, or by physical vapor deposition in a layer less than about 800 angstroms.

An exemplary apparatus and method of forming a ruthenium tetroxide containing gas to form a ruthenium containing layer on a surface of a substrate is described herein. The method and apparatus described herein may be especially useful for fabricating electronic devices that are formed on a surface of the substrate or wafer. Generally, the method includes exposing a surface of a substrate to a ruthenium tetroxide vapor to form a catalytic layer on the surface of a substrate and then filling the device structures by an electroless, electroplating, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD) or plasma enhanced ALD (PE-ALD) processes. In one embodiment, the ruthenium containing layer is formed on a surface of a substrate by creating ruthenium tetroxide in an external vessel and then delivering the generated ruthenium tetroxide gas to a surface of a temperature controlled substrate positioned in a processing chamber. In one embodiment, a ruthenium tetroxide containing solvent formation process is used to form ruthenium tetroxide using a ruthenium tetroxide containing source material. In one embodiment, of a ruthenium containing layer is formed on a surface of a substrate, using the ruthenium tetroxide containing solvent. In another embodiment, the solvent is separated from the ruthenium tetroxide containing solvent mixture and the remaining ruthenium tetroxide is used to form a ruthenium containing layer on the surface of a substrate.

Methods and apparatus are provided for uniformly depositing a coating material from a vaporization source onto a powdered substrate material to form a thin coalescence film of the coating material that smoothly replicates the surface microstructure of the substrate material. The coating material is uniformly deposited on the substrate material to form optical interference pigment particles. The thin film enhances the hiding power and color gamut of the substrate material. Physical vapor deposition processes are used for depositing the film on the substrate material. The apparatus and systems employed in forming the coated particles utilize vibrating bed coaters, vibrating conveyor coaters, or coating towers. These allow the powdered substrate material to be uniformly exposed to the coating material vapor during the coating process.

A thermal physical vapor deposition source for vaporizing compacted pellets of organic materials onto a surface of a substrate in forming a display, including a housing defining a plurality of spaced passages each for receiving compacted pellets, a cover plate over the housing, with a first plurality of openings corresponding to the spaced passages of the housing and an electrical heater structure disposed over the cover plate. The thermal physical vapor deposition source further including an aperture plate, disposed over the electrical heater structure, an electrically insulating spacer member located between the electrical heater structure and an aperture plate, and circuitry for applying current to the electrical heater structure to produce heat sufficient to vaporize the pellets and permit vapor efflux of materials to pass through the cover plate, the heater structure, the electrically insulating spacer member and the aperture plate, onto the substrate.

Use of physical vapor deposition methodologies to deposit nanoscale gold on activating support media makes the use of catalytically active gold dramatically easier and opens the door to significant improvements associated with developing, making, and using gold-based, catalytic systems. The present invention, therefore, relates to novel features, ingredients, and formulations of gold-based, heterogeneous catalyst systems generally comprising nanoscale gold deposited onto a nanoporous support.

A method and apparatus for fabricating a solar cell and forming metal contact is disclosed. Solar cell contact and wiring is formed by depositing a thin film stack of a first metal material and a second metal material as an initiation layer or seed layer for depositing a bulk metal layer in conjunction with additional sheet processing, photolithography, etching, cleaning, and annealing processes. In one embodiment, the thin film stack for forming metal silicide with reduced contact resistance over the sheet is deposited by sputtering or physical vapor deposition. In another embodiment, the bulk metal layer for forming metal lines and wiring is deposited by sputtering or physical vapor deposition. In an alternative embodiment, electroplating or electroless deposition is used to deposit the bulk metal layer.

A through hole (114) is formed in a wafer (104) comprising a semiconductor substrate (110). A seed layer (610) is sputtered on the bottom surface of the wafer. The seed is not deposited over the through hole's sidewalls adjacent the top surface of the wafer. A conductor (810) is electroplated into the through hole. In another embodiment, a seed is deposited into an opening in a wafer through a dry film resist mask (1110). The dry film resist overhangs the edges of the opening, so the seed is not deposited over the opening's sidewalls adjacent the top surface of the wafer. In another embodiment, a dielectric (120) is formed in an opening in a semiconductor substrate (110) by a non-conformal physical vapor deposition (PVD) process that deposits the dielectric on the sidewalls but not the bottom of the opening. A seed (610) is formed on the bottom by electroless plating. A conductor (810) is electroplated on the seed. In another embodiment, a dielectric (2910) is formed in the opening to cover the entire surface of the opening. A non-conformal layer (120) is deposited by PVD over the sidewalls but not the bottom of the opening. The dielectric (2910) is etched off the bottom with the non-conformal layer (120) as a mask. A seed (610) is formed on the bottom by electroless plating. The non-conformal layer can be formed by electroplating. It can be tantalum deposited by electroplating, then anodized. Other embodiments are also provided.

Blocker plates for chemical vapor deposition chambers and methods of treating blocker plates are provided. The blocker plates define a plurality of holes therethrough and have an upper surface and a lower surface that are at least about 99.5% pure, which minimizes the nucleation of contaminating particles on the blocker plates. A physically vapor deposited coating, such as an aluminum physically vapor deposited coating, may be formed on the upper and lower surfaces of the blocker plates. Chemical vapor deposition chambers including blocker plates having a physically vapor deposited coating thereon are also provided.

A method for forming a battery from via thin-film deposition processes is disclosed. A mesoporous carbon material is deposited onto a surface of a conductive substrate that has high surface area, conductive micro-structures formed thereon. A porous, dielectric separator layer is then deposited on the layer of mesoporous carbon material to form a half cell of an energy storage device. The mesoporous carbon material is made up of CVD-deposited carbon fullerene “onions” and carbon nano-tubes, and has a high porosity capable of retaining lithium ions in concentrations useful for storing significant quantities of electrical energy. Embodiments of the invention further provide for the formation of an electrode having a high surface area conductive region that is useful in a battery structure. In one configuration the electrode has a high surface area conductive region comprising a porous dendritic structure that can be formed by electroplating, physical vapor deposition, chemical vapor deposition, thermal spraying, and/or electroless plating techniques.

One aspect of the invention provides a consistent metal electroplating technique to form void-less metal interconnects in sub-micron high aspect ratio features on semiconductor substrates. One embodiment of the invention provides a method for filling sub-micron features on a substrate, comprising reactive precleaning the substrate, depositing a barrier layer on the substrate using high density plasma physical vapor deposition; depositing a seed layer over the barrier layer using high density plasma physical vapor deposition; and electro-chemically depositing a metal using a highly resistive electrolyte and applying a first current density during a first deposition period followed by a second current density during a second period.

Embodiments of the invention contemplate a method, apparatus and system that are used to support, position, and rotate a substrate during processing. Embodiments of the invention may also include a method of controlling the transfer of heat between a substrate and substrate support positioned in a processing chamber. The apparatus and methods described herein remove the need for complex, costly and often unreliable components that would be required to accurately position and rotate a substrate during one or more processing steps, such as an rapid thermal processing (RTP) process, a chemical vapor deposition (CVD) process, a physical vapor deposition (PVD) process, atomic layer deposition (ALD) process, dry etching process, wet clean, and/or laser annealing process.

An apparatus and method for depositing plural layers of materials on a substrate within a single vacuum chamber allows high-throughput deposition of structures such as these for GMR and MRAM application. An indexing mechanism aligns a substrate with each of plural targets according to the sequence of the layers in the structure. Each target deposits material using a static physical-vapor deposition technique. A shutter can be interposed between a target and a substrate to block the deposition process for improved deposition control. The shutter can also preclean a target or the substrate and can also be used for mechanical chopping of the deposition process. In alternative embodiments, plural substrates may be aligned sequentially with plural targets to allow simultaneous deposition of plural structures within the single vacuum chamber. A monitoring and control device can be wed to optimize equipment state, process state, and wafer state parameters by sensing each respective state during or after the deposition process.

A physical vapor deposition reactor includes a metal sputter target, a D.C. sputter power source coupled to the metal sputter target and a wafer support pedestal facing the metal sputter target. A movable magnet array is adjacent a side of the metal sputter target opposite the wafer support pedestal. A solid metal RF feed rod engages the metal sputter target and extends from a surface of the target on a side opposite the wafer support pedestal. A VHF impedance match circuit is coupled to an end of the RF feed rod opposite the metal sputter target and a VHF RF power generator coupled to said VHF impedance match circuit. Preferably, the reactor of further includes a center axle about which the movable magnet array is rotatable, the center axle having an axially extending hollow passageway, the RF feed rod extending through the passageway.

In one embodiment of the invention, a method for forming a tungsten-containing layer on a substrate is provided which includes positioning a substrate containing a barrier layer disposed thereon in a process chamber, exposing the substrate to a first soak process for a first time period and depositing a nucleation layer on the barrier layer by flowing a tungsten-containing precursor and a reductant into the process chamber. The method further includes exposing the nucleation layer to a second soak process for a second time period and depositing a bulk layer on the nucleation layer. In one example, the barrier layer contains titanium nitride, the first and second soak processes independently comprise at least one reducing gas selected from the group consisting of hydrogen, silane, disilane, dichlorosilane, borane, diborane, derivatives thereof and combinations thereof and the nucleation layer may be deposited by an atomic layer deposition process or a pulsed chemical vapor deposition process while the bulk layer may be deposited by a chemical vapor deposition process or a physical vapor deposition process.

One embodiment of the present invention in a method for making copper interconnects, which method includes: (a) forming a patterned insulating layer on a substrate, the patterned insulating layer including at least one opening and a field surrounding the at least one opening; (b) depositing a barrier layer over the field and inside surfaces of the at least one opening; (c) depositing a non-conformal first copper seed layer over the barrier layer using physical vapor deposition, wherein the first seed layer is thicker than about 500 Å over the field; (d) depositing a conformal second copper seed layer over the first seed layer using chemical vapor deposition; and (e) electroplating a copper layer over the second seed layer.

Embodiments of the invention generally provide a processing chamber used to perform a physical vapor deposition (PVD) process and methods of depositing multi-compositional films. The processing chamber may include: an improved RF feed configuration to reduce any standing wave effects; an improved magnetron design to enhance RF plasma uniformity, deposited film composition and thickness uniformity; an improved substrate biasing configuration to improve process control; and an improved process kit design to improve RF field uniformity near the critical surfaces of the substrate. The method includes forming a plasma in a processing region of a chamber using an RF supply coupled to a multi-compositional target, translating a magnetron relative to the multi-compositional target, wherein the magnetron is positioned in a first position relative to a center point of the multi-compositional target while the magnetron is translating and the plasma is formed, and depositing a multi-compositional film on a substrate in the chamber.

The invention discloses a method for preparing sintered NdFeB with low dysprosium (Dy) content and high performance; the method comprises the following steps of: sputtering and plating the Dy element on the surface of jet mill powder by using the powder plate technology based on magnetron sputtering on the basis of preparing NdFeB powder, and then sufficiently dispersing the Dy element to micron-sized NdFeB crystal particles by dispersing the Dy element at high temperature in the sintering and tempering process, thereby achieving the effect of improving magnetic performance of the sintered NdFeB. Compared with the introduction of the Dy element in the proportioning process of the prior art, the method disclosed by the invention has the advantages: the low dysprosium content and high performance is limited in the nano-size by adopting the physical gas-phase deposition, the consumption quantity of the Dy element during the production process is controlled effectively and the preparationof sintered NdFeB with low dysprosium content and high performance is realized. Compared with the sintered NdFeB of the same components prepared by the traditional casting and powder metallurgy process, both the intrinsic coercivity and the maximum magnetic energy product of the sintered NdFeB rare-earth permanent magnetic material obtained according to the invention are improved obviously; compared with the sintered NdFeB with the same performance prepared by the traditional casting and powder metallurgy process, the dosage of the dysprosium element is reduced remarkably. The method can be widely applicable to producing and manufacturing sintered NdFeB with high performance.

The invention discloses a method for preparing single-layer or multi-layer graphene through chemical vapor deposition, and relates to a method for preparing a graphene material. The method comprises the following steps of: placing a metal substrate in a vacuum tubular furnace or a vacuum atmosphere furnace; injecting hydrogen into a vacuum cavity under the situation of removing the oxygen in the vacuum cavity; heating to 800-1,100 DEG C; and injecting a carbon source gas into the vacuum cavity to obtain the metal substrate for depositing graphene. According to the method disclosed by the invention, a graphene film is deposited by cracking methane or other carbon source gases on the metal substrate (such as a copper foil or a nickel foil and the like) at a high temperature by using the chemical vapor deposition method; and therefore, the invention provides a method for preparing the single-layer or multi-layer graphene with an ultra-large area.

The invention provides a kind of electromagnetic wave shielding films including: a film substrate with transparency on optical degree more than or equal to 87% and layers of metal net at least on one surface of the film substrate. The invention also provides a method including the following steps: first, a conductive layer is formed on the surface of film substrate by a method of physical vapor deposition, next, a metal layer is shaped on the conductive one by the technique of plating; then, metal reticular figure comes into being on such film substrate by laser-cutting technique. This invention can not only reduce the consumption of mental for electromagnetic shielding and avoid the use of solidifying glue between the layers of metal and film substrate, but also decreases the process steps to lower the cost of industrial production and increase productivity effectively.

A process kit for use in a physical vapor deposition (PVD) chamber, along with a PVD chamber having a non-contact process kit are provided. In one embodiment, a process kit includes a generally cylindrical shield that has a substantially flat cylindrical body, at least one elongated cylindrical ring extending downward from the body, and a mounting portion extending upwards from an upper surface of the body. In another embodiment, a process kit includes a generally cylindrical deposition ring. The deposition ring includes a substantially flat cylindrical body, at least one downwardly extending u-channel coupled to an outer portion of the body, an inner wall extending upward from an upper surface of an inner region of the body, and a substrate support ledge extending radially inward from the inner wall.

Disclosed is a method for forming a bit-line of a semiconductor device. In a line patterning process for forming a bit-line in a DRAM (Dynamic Random Access Memory) of a semiconductor device, a barrier metal layer and a tungsten layer are sequentially formed on an interlayer insulating film comprising a contact hole to fill the contact hole by a CVD (Chemical Vapor Deposition) method. Then, the barrier metal layer and the tungsten layer are removed until the interlayer insulating film is exposed, and a tungsten layer having small thickness is re-formed on the exposed interlayer insulating film by a PVD (physical Vapor Deposition) method. As a result, the bit-line area is reduced as much as the barrier metal layer removed from the upper portion of interlayer insulating film, thereby having low bit-line capacitance.

Methods and apparatus are provided for uniformly depositing a coating material from a vaporization source onto a powdered substrate material to form a thin coalescence film of the coating material that smoothly replicates the surface microstructure of the substrate material. The coating material is uniformly deposited on the substrate material to form optical interference pigment particles. The thin film enhances the hiding power and color gamut of the substrate material. Physical vapor deposition processes are used for depositing the film on the substrate material. The apparatus and systems employed in forming the coated particles utilize vibrating bed coaters, vibrating conveyor coaters, or coating towers. These allow the powdered substrate material to be uniformly exposed to the coating material vapor during the coating process.