12 results about "Buffered oxide etch" patented technology

The invention belongs to the technical field of wet electronic chemicals, and particularly relates to a buffer oxide etching solution (BOE) with high selection ratio of silicon dioxide (SiO2) to silicon oxynitride (SiOxNy) in semiconductor manufacturing, and the etching solution comprises the following components in percentage by mass: 0-20% of HF, 20-40% of NH4F, 0.01-0.05% of an impregnating compound, 0.005-0.01% of an additive and the balance of ultrapure water. The wetting agent is introduced, so that the wettability of the silicon dioxide film layer can be improved, and the etching roughness is improved; meanwhile, after 2-(2-(2-hydroxyethoxy)-ethoxy)-ethyl phosphonic acid is added, a phosphonic acid group can form coordination with a Si-N bond in silicon oxynitride, and the silicon oxynitride film etching selection ratio of silicon dioxide can be remarkably increased under the condition that the silicon dioxide etching rate is not reduced. The etching liquid is stable, the solution is clear and transparent, and the addition of the additive can reduce the surface tension and improve the infiltration and undercutting capabilities of the etching liquid.

The application discloses a kind of buffer oxide etching solution with high etching uniformity.The main components of the etching solution are hydrofluoric acid, ammonium fluoride, corrosion inhibitor and ultrapure water.The etching solution of the application is used for etching of silicon oxide film, and has little corrosion effect on tungsten nitride layer, and the surface uniformity of tungsten nitride layer is good after etching.The corrosion inhibitor has strong coordination ability and adsorption performance, and the corrosion inhibitor and tungsten nitride surface occur chemical adsorption, forming a protective film, which can prevent the further reaction of etching solution and tungsten nitride.The etching solution of the application has high selectivity to silicon oxide layer and tungsten nitride, and the etching selectivity ratio can be >4000.The etching solution of the application can effectively inhibit the corrosion of tungsten nitride, while ensuring the surface uniformity of tungsten nitride after etching of silicon oxide.

The invention provides a high-electron-mobility silicon MOS (Metal Oxide Semiconductor) quantum device and a preparation method thereof. The method comprises the following steps: growing a dielectric layer on a silicon substrate; etching the dielectric layer and the silicon substrate to form a mesa structure; removing the dielectric layer by wet etching; cleaning the sample from which the dielectric layer is removed; growing a dielectric layer on the cleaned sample; repeatedly executing the step of removing the dielectric layer by wet etching until growing the dielectric layer on the cleaned sample for preset times; and preparing a metal electrode on the sample which is repeated for preset times. According to the preparation method, after RIE etching, silicon dioxide circulation oxidation is adopted for multiple times, an oxide layer is removed in combination with a buffer oxide etching solution, surface roughness scattering of the MOS structure can be greatly reduced, ionized intrinsic deep energy level defects introduced in the dielectric layer due to RIE table top etching can be removed by corroding original silicon dioxide, and the carrier mobility is effectively improved.

The invention relates to the technical field of etching solutions, and particularly discloses a buffer oxide etching solution with long etching life and application, the etching solution contains hydrofluoric acid, ammonium fluoride, an additive and an inhibitor; wherein the additive is fluorinated fatty alcohol; the inhibitor is polyol. The etching solution disclosed by the invention is used for cleaning and etching a silicon oxide film layer in semiconductor manufacturing. Due to heat release in the etching process and long-time contact with the atmospheric environment, water is volatilized, meanwhile, gaseous hydrofluoric acid causes large change of the concentration of the liquid medicine, a multi-molecular, compact and non-volatile film is formed on the surface of the liquid medicine through the added additive, water molecules are physically prevented from escaping into air, meanwhile, the inhibitor binds the water molecules through polar groups, and the corrosion resistance of the liquid medicine is improved. And the diffusion activity is inhibited, so that the etching solution is small in moisture loss after long-time etching, and the concentration of hydrofluoric acid is more stable, thereby obtaining a longer etching life.

The invention discloses a buffer oxide etching solution. The etching solution mainly comprises hydrofluoric acid, ammonium fluoride, sterically hindered alcohol, organic amine and ultrapure water. The etching solution is used for etching the silicon oxide film, and surface defects of the etched silicon oxide film can be reduced. The steric hindrance alcohol used in the invention has good dispersibility in a solution system, and can ensure good uniformity of the etched silicon oxide film, and the organic amine can change the surface potential of the etched silicon oxide film and reduce the surface particle adhesion of the silicon oxide film, so that the defects of the etched silicon oxide film are reduced, and the stability of the subsequent manufacturing process can be ensured.

This invention relates to a method and system for suppressing etching residue on superconducting thin film wafers using a combined wet and dry etching process. The specific steps include: S1, acquiring wafer lithography rework information: reading the wafer's lithography rework record to obtain identification information indicating whether the wafer has undergone lithography rework and the number of rework cycles; S2, rotating wet source blocking treatment; S3, optical inspection and drying treatment before dry etching; S4, dry adaptive etching and cyclic cleaning; S5, wet purification treatment: after etching, the wafer is immersed in a buffer oxide etching tank unit for cleaning, and finally enters a drying tank unit for drying. This invention has the following advantages: while ensuring etching effect, it minimizes sputtering damage to the superconducting thin film by ions, avoids the generation of oxygen vacancy defects and lattice distortion, and effectively preserves the intrinsic superconducting properties of the superconducting thin film wafer.

The application discloses a kind of buffer oxide etching liquid for inhibiting aluminum and application, and the main component of the etching liquid is hydrofluoric acid, ammonium fluoride, organic acid, surfactant and ultrapure water.The etching liquid of the application is used for the etching of silicon oxide film, and can inhibit aluminum layer etching;Organic acid can accelerate the etching rate of silicon oxide, and form organic acid-aluminum film to protect the aluminum surface from being further etched;Surfactant can react with the aluminum surface aluminum oxide to produce chemical adsorption, thereby inhibiting the corrosion of aluminum surface;The etching liquid described in the application has high selectivity to silicon oxide layer and aluminum layer, and the etching rate selection ratio is greater than or equal to 37.The etching liquid described in the application can adjust the content of each component to meet the etching selection ratio requirement of silicon oxide layer to aluminum layer in different processes.

A method includes providing a wafer having multiple U-shaped grooves in which are grown Group-III nitride-based structures, the multiple U-shaped grooves including a patterned oxide layer and a buffer layer disposed on the patterned oxide layer. The method includes performing a wet etch of the wafer to partially remove the buffer layer. Performing the wet etch can include applying a buffered oxide etch (BOE) to a surface of the wafer for between 45-85 seconds, rinsing the wafer under flowing water for a rinsing period, performing sonication on the wafer for between 100-140 minutes, and rinsing the wafer under flowing water for the rinsing period.

The present application relates to a kind of methods for improving the light extraction efficiency of LED chip side face.The steps are as follows:(1) providing LED epitaxial wafer, growing SiO2 film on epitaxial wafer GaN layer;(2) evenly coating photoresist on SiO2 film, making photoresist mask pattern;(3) the epitaxial wafer is placed in buffer oxide etching solution and etched for 50-150s;(4) the epitaxial wafer is subjected to ICP dry etching to form MESA structure;(5) the epitaxial wafer is subjected to conventional degumming operation, and transparent conductive layer, P / N electrode and passivation layer are prepared.The LED chip prepared by the present application has a MESA structure with two slopes, which first increases the light extraction area of LED chip;Secondly, it increases the angle combination in the side light path, increases the escape opportunity of waveguide or multiple reflection light in GaN;Finally, it is more conducive to the lateral propagation of light from MQW, and the light emitting efficiency of LED chip with conventional MESA structure is improved by more than 1.2%.

A method of manufacturing a display device, the method including: forming a conductive layer on a substrate; forming a preliminary insulation pattern on the conductive layer; forming a first insulating pattern by developing with a first solution; and treating the first insulating pattern with a second solution, in which the first solution includes a nitrogen compound and the second solution includes a buffer oxide etchant (BOE).

The application discloses a method for improving TUN area rework aggravating side etching in a SONOS Flash product, wherein a semiconductor structure containing a selection tube area and a control tube area is provided; a hexamethyldisilazane is used to treat a surface of the semiconductor structure first, and then a bottom anti-reflective coating is regrown; a photoresist PR is spin-coated on the bottom anti-reflective coating BARC, and the photoresist is opened to form a TUN area. The hexamethyldisilazane HMDS treatment is performed before the bottom anti-reflective coating is grown on the semiconductor device, the newly-added HMDS treatment can increase the adhesion between the bottom anti-reflective coating and the photoresist and between the bottom anti-reflective coating and the oxide layer, the side etching defect caused by the wet etching after the photoetching rework is improved, the side etching caused by the buffer oxide etching liquid for the wet etching to the oxide layer at the STI is obviously weakened, the TUN area BOE window is improved, and the process stability is increased.

The invention relates to the technical field of semiconductors, in particular to a graph reduction method based on proximity lithography, which comprises the following steps: S1, growing a hard mask layer on a substrate epitaxial wafer; and S2, spin-coating photoresist on the hard mask layer, and transferring the pattern on the mask plate to the photoresist in a preset reduced size through exposure and development by adopting a proximity lithography technology. And S3, transferring the photoetching pattern to the hard mask layer by adopting dry etching, and etching until the indium phosphide substrate is exposed. And S4, transferring the photoetching pattern on the hard mask layer to the substrate epitaxial wafer through dry etching. And S5, a buffer oxide etching solution is adopted to remove the residual hard mask layer, and preparation is completed. The method has the advantage that the characteristic size smaller than that of a photoetching pattern on the photoetching mask can be realized. Compared with the traditional electron beam lithography and other technologies, the method has the advantages that the cost of the used equipment and process is obviously reduced, the large-area batch production capacity is realized, and the production efficiency is greatly improved.