Patents
Literature
Patsnap Copilot is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Patsnap Copilot

11445 results about "Noble metal" patented technology

In chemistry, the noble metals are metals that are resistant to corrosion and oxidation in moist air (unlike most base metals). The short list of chemically noble metals (those elements upon which almost all chemists agree) comprises ruthenium (Ru), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), iridium (Ir), platinum (Pt), and gold (Au).

Electroless deposition apparatus

An apparatus and a method of depositing a catalytic layer comprising at least one metal selected from the group consisting of noble metals, semi-noble metals, alloys thereof, and combinations thereof in sub-micron features formed on a substrate. Examples of noble metals include palladium and platinum. Examples of semi-noble metals include cobalt, nickel, and tungsten. The catalytic layer may be deposited by electroless deposition, electroplating, or chemical vapor deposition. In one embodiment, the catalytic layer may be deposited in the feature to act as a barrier layer to a subsequently deposited conductive material. In another embodiment, the catalytic layer may be deposited over a barrier layer. In yet another embodiment, the catalytic layer may be deposited over a seed layer deposited over the barrier layer to act as a “patch” of any discontinuities in the seed layer. Once the catalytic layer has been deposited, a conductive material, such as copper, may be deposited over the catalytic layer. In one embodiment, the conductive material is deposited over the catalytic layer by electroless deposition. In another embodiment, the conductive material is deposited over the catalytic layer by electroless deposition followed by electroplating or followed by chemical vapor deposition. In still another embodiment, the conductive material is deposited over the catalytic layer by electroplating or by chemical vapor deposition.
Owner:APPLIED MATERIALS INC

Catalyst for complete oxidation of formaldehyde at room temperature

The invention provides a high selectivity catalyst used for catalyzing and completely oxidizing formaldehyde with low concentration at room temperature. The catalyst can catalyze formaldehyde completely so as to lead the formaldehyde to be converted into carbon dioxide and water at room temperature. In addition, the conversion rate of formaldehyde remains 100% within a long period of time, without complex auxiliary facilities such as light source, a heating oven and the like, and external conditions. The catalyst comprises three parts which are inorganic oxide carrier, noble metal component and auxiliary ingredient. Porous inorganic oxide carrier is one of cerium dioxide, zirconium dioxide, titanium dioxide, aluminium sesquioxide, tin dioxide, silicon dioxide, lanthanum sesquioxide, magnesium oxide and zinc oxide or the mixture thereof or composite oxide thereof, zeolite, sepiolite and porous carbon materials. The noble metal component of the catalyst is at least one of platinum, rhodium, palladium, gold and silver. The auxiliary ingredient is at least one of the alkali metals of lithium, sodium, kalium, rubidium and cesium. The loading of the noble metal component used in the catalyst of the invention is 0.1 to 10% according to weight converter of metal elements and the selective preference is 0.3 to 2%. The loading of the auxiliary ingredient is 0.2 to 30% according to weight converter of metal elements and the selective preference is 1 to 10%. When the loading of the auxiliary ingredient is lower than 0.2% or higher than 30%, the activity of the catalyst for catalyzing and oxidizing formaldehyde at room temperature is decreased remarkably.
Owner:广东顺德中科鸿图环境材料有限公司

Hermetic wafer scale integrated circuit structure

A wafer scale semiconductor integrated circuit packaging technique provides a hermetic seal for the individual integrated circuit die formed as part of the wafer scale structure. A semiconductor wafer is manufactured to include a number of individual semiconductor die. Each individual die formed on the wafer includes a number of bond pads that are exposed on the die surface in various locations to provide electrical connections to the circuitry created on the die. The wafer further includes a planar glass sheet that is substantially the same size as the wafer, the glass sheet being adhered to the wafer using a suitable adhesive. The glass sheet has a number of pre-formed holes in it, the arrangement of the pre-formed holes corresponding to the location of the bond pads at each of the individual semiconductor die formed as part of the wafer structure. Following adherence of the glass sheet to the semiconductor wafer utilizing the intermediate adhesive material, metal connections are made between pads formed on the glass sheet and the bond pads formed on the integrated circuit die. Solder balls are then attached to the pads on the glass sheet to provide a conductive flow between the solder balls and the bond pads. After the solder balls are attached, trenches are cut around each of the individual die on the wafer. The trenches are cut at an angle and extend through the glass sheet and the intermediate adhesive material and into the semiconductor substrate in which the integrated circuits are formed. After the trenches are cut around each individual semiconductor die, a noble metal is deposited on the sidewalls of the trench to extend over the interface between the glass sheet, the adhesive material and the semiconductor die. The wafer is then cut along the noble metal lined trenches to provide individual, hermetically sealed packaged integrated circuit die.
Owner:MICRO CHIP SCALE PACKAGING
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products