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13066results about "Welding apparatus" patented technology

Method and apparatus for shaping spring elements

Interconnection elements for electronic components, exhibiting desirable mechanical characteristic (such as resiliency, for making pressure contacts) are formed by using a shaping tool (512) to shape an elongate core element (502) of a soft material (such as gold or soft copper wire) to have a springable shape (including cantilever beam, S-shape, U-shape), and overcoating the shaped core element with a hard material (such as nickel and its alloys), to impart to desired spring (resilient) characteristic to the resulting composite interconnection element. A final overcoat of a material having superior electrical qualities (e.g., electrical conductivity and/or solderability) may be applied to the composite interconnection element. The resulting interconnection elements may be mounted to a variety of electronic components, including directly to semiconductor dies and wafers (in which case the overcoat material anchors the composite interconnection element to a terminal (or the like) on the electronic component), may be mounted to support substrates for use as interposers and may be mounted to substrates for use as probe cards or probe card inserts. The shaping tool may be an anvil (622) and a die (624), and may nick or sever successive shaped portions of the elongate elements, and the elongate element may be of an inherently hard (springy) material. Methods of fabricating interconnection elements on sacrificial substrates are described. Methods of fabricating tip structures (258) and contact tips at the end of interconnection elements are also described.
Owner:FORMFACTOR INC

Copper circuit junction substrate and method of producing the same

A highly reliable copper circuit-joined board that, in mounting a semiconductor element, a lead frame or the like on a ceramic substrate, enables the semiconductor element, the lead frame or the like to be strongly joined to the substrate without breaking or deformation of the substrate found in conventional joining methods, such as brazing and joining using a copper/copper oxide eutectic crystal. Any one of an interposing layer comprising a brazing material layer comprising silver and/or copper as a main component and an active metal or an interposing layer having a two-layer structure comprising a first interposing layer comprising the brazing material layer or a high-melting metallizing layer and a second interposing layer, having a melting point of 1000.degree. C. or below, comprising Ni, Fe, Cu as a main component in that order from the substrate side, is formed on a ceramic substrate, and a conductor layer, comprising copper as a main component, which, in both the lengthwise and widthwise directions, is at least 0.05 mm shorter than the interposing layer, is formed on the interposing layer to prepare a copper circuit-joined board. The copper circuit-joined board may comprise the base board having thereon an outer layer comprising Ni as a main component. A semiconductor element is mounted on the copper circuit-joined board to prepare a semiconductor device.
Owner:SUMITOMO ELECTRIC IND LTD

Methods for fabricating three-dimensional all organic interconnect structures

The present invention comprises methods for making three-dimensional (3-D) liquid crystalline polymer (LCP) interconnect structures using a high temperature singe sided liquid crystalline polymer, and low temperature single sided liquid crystalline polymer, whereas both the high temperature LCP and the low temperature LCP are drilled using a laser or mechanical drill or mechanically punch to form a z-axis connection. The single sided Conductive layer is used as a bus layer to form z axis conductive stud conductive stud within the high temperature and low temperature LCP, followed by deposition of a metallic capping layer of the stud that serves as the bonding metal between the conductive interconnects to form the z-axis electrical connection. High temperature and low temperature LCP circuit layers are etched or built up to form circuit patterns and subsequently bonded together to form final 3-D multilayer circuit pattern whereas the low temperature LCP melts to form both dielectric to dielectric bond to high temperature LCP circuit layer, and dielectric to conductive bond, whereas, metal to metal bonding occurs with high temperature metal capping layer bonding to conductive metal layer. The resultant structure is then packaged using two metallized organic cores that are laminated onto either side of the device using a low temperature adhesive with similar electrical properties and subsequently metallized to form the input output terminals and EM shielding.
Owner:GEORGIA TECH RES CORP
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