1944 results about "Solder paste" patented technology

An optical reader in one embodiment can include a substrate defining an opening and solder pads coupled to the substrate proximate the opening. A laser diode including first, second, and third electrical leads can also be coupled to the substrate. First, second and third solder pads can be provided on the substrate and the first, second, and third electrical leads of the laser diode can be coupled to the first, second, and third solder pads. An optical reader in another embodiment can include a substrate having a first surface and a second surface. A laser diode assembly configured to emit a laser beam can be coupled to the first surface and an illumination assembly that can include light emitting diodes can be coupled to the second surface.

A stacked die package includes a substrate or interposer board that includes a contact area on a top surface and landing pads surrounding the contact area. Solder pads are disposed on an opposite side of the substrate. The solder pads are electrically connected with the landing pads by inner board wiring. A reconstituted die, which includes a die surrounded by a frame, is mounted over the substrate. A top die is mounted over the reconstituted die. Both the reconstituted die and the top die are electrically connected to the substrate, e.g., by wire bonds.

The invention relates to the manufacturing technology of printed wiring board, in particular to a flexible printed circuit (FPC) surface mount technology (SMT) as well as a magnetic tool and a steel mesh which are used for the FPCSMT. The magnetic tool comprises a buckle cover board and a magnetic carrying tray, wherein the magnetic carrying tray is a magnetic baseplate, the buckle cover board is a metal sheet which can be attracted by the magnetic baseplate, and the buckle cover board is provided with a slotted hole used for the solder paste printing and the surface mounting of a FPC. The invention is characterized in that the buckle cover board is a steel sheet which can be attracted by the magnetic baseplate, the step layer which is the same as the buckle cover board in shape is etched on the magnetic carrying tray, the depth of the step layer is the same as the thickness of the steel sheet; before the circuit board printing, the magnetic carrying tray is fixed on a positioning base, and then the FPC and the buckle cover board are arranged on the magnetic carrying tray; after the accurate positioning, the FPC and the magnetic tool are taken down the positioning base to conduct the solder paste printing process, the surface mounting process and the reflow soldering process.

A method of analyzing an image of a substance deposited onto a substrate, the image comprising a plurality of pixels, includes defining a region of interest in the image, associating the region of interest with first and second perpendicular axis, wherein a set of pixels in the image lie along the first axis, converting the pixels in the region of interest to a single dimensional array aligned with the first axis and projecting along the second axis, and applying at least one threshold to the single dimensional array, the threshold based at least in part on a predetermined limit.

The invention discloses an LED lamp filament illuminating strip and a preparation method therefor. The illuminating strip comprises LED chips in upper and lower rows, wherein all LED chips in the lower row are distributed at intervals, and all LED chips in the upper row are respectively connected between two adjacent LED chips in the lower row in a lap joint manner. The illuminating surfaces of the LED chips in the upper and lower rows are opposite to each other. The positive and negative electrodes of all LED chips in the upper row are respectively welded with the negative and positive electrodes of two adjacent LED chips, in lap joint connection with the LED chips in the upper row, in the lower row. The preparation method comprises the steps: coating solder paste on the positive and negative electrodes of all LED chips in the lower row; heating the solder paste and enabling the solder paste to be melted, welding the corresponding electrodes, coating the front and back surfaces of chip strips in series connection with fluorescent glue, and solidifying the fluorescent glue. The illuminating strip employs the chips which are not overlapped with each other, and the illuminating surfaces of the chips are arranged oppositely, thereby improving the light-emitting uniformity and facilitating heat dissipation. The wire crossing and tandem among chips is avoided, the packaging cost is reduced, and the yield of finished products is improved.

A method of manufacturing a semiconductor device includes a first step of forming solder film on metal posts of a mother chip, a second step of forming solder balls after the first step by printing a solder paste on the mother chip and heating the mother chip so that the solder paste is ref lowed, a third step of bonding the metal posts of the mother chip and metal posts of a daughter chip to each other in a thermocompression bonding manner by means of the solder film after the second step, and a fourth step of flip-chip-connecting the mother chip on a circuit substrate by using the solder balls. In the second step, the mother chip is heated in a nitrogen atmosphere in which the oxygen concentration is 500 ppm or less.

The invention is concerned with low rosin type halogen-free and cleaning-free flux using for lead-free solder paste, belonging to flux field. About the existing rosin type flux, the leftover after welding is high and the leavings with halogen has cauterization. The matter of this invention is 5 to 20 wt percent of organic acid activator, 10 to 29 wt percent of modified rosin, 1 to 10 wt percent of binder, 0.5 to 6 wt percent of stabilizer, 1 to 6 wt percent of surfactant, 1 to 8 wt percent of corrosion inhibitor, 1 to 10 wt percent of thickener, and the rest is solvent with high boiling point. The copper mirror after welding is not penetration, and this invention without halogen has high insulation resistance and good assistant jointing capability. The viscosity of matched solder paste is advisable to solve the high content of rosin in the flux and great smoke. The leftover after welding is colorless and transparent film and it dose not absorb water with the normal temperature without clearing to fit for the welding demand of common production.

A method for making an integrated circuit substrate having embedded passive components provides a reduced cost and compact package for a die and one or more passive components. An insulating layer of the substrate is embossed or laser-ablated to generate apertures for insertion of a paste forming the body of the passive component. A resistive paste is used to form resistors and a dielectric paste is used for forming capacitors. A capacitor plate may be deposited at a bottom of the aperture by using a doped substrate material and activating only the bottom wall of the aperture, enabling plating of the bottom wall without depositing conductive material on the side walls of the aperture. Vias may be formed to the bottom plate by using a disjoint structure and conductive paste technology. Connection to the passive components may be made by conductive paste-filled channels forming conductive patterns on the substrate.

An inspection station (6) has a ring of 370 nm LEDs (24) for low-angle diffuse illumination of flux. This stimulates inherent fluorescent emission of the flux without the need for flux additives or pre-treatment. A CCD sensor (20) detects the emission. An image processor generates output data indicating flux volume according to a relationship between emission intensity and volume over the surface of the flux. Intensity non-uniformity indicates either height non-uniformity or hidden voids, both of which give rise to defects after application of solder paste and reflow. The inspection is particularly effective for pre solder application flux inspection.

Systems and methods for implementing hybrid, closed-loop control that generates control values for processes defined by a limited number of function evaluations and large amounts of process and measurement noise. The described control system is applied to a stencil printing process for applying solder paste to an electronic medium such as a printed circuit board or semiconductor wafer. The control system is defined by a hybrid approach. A first, coarse algorithm is used to rapidly produce the value of a stencil printer control value resulting in a solder paste deposit having a volume within predetermined acceptable limits. After the coarse algorithm no longer produces solder paste deposits closer to a desired volume, a second, more refined estimator is used to fine tune the process. An additional transitional algorithm may be added between the coarse algorithm and refined estimator. The coarse algorithm may be implemented with a constrained-conjugated gradient search, and the refined search may be a implemented using a least-squares affine estimator or a quadratic estimator. The transitional algorithm may be implemented using a block version of a least-squares affine estimator.

A method for assembling a whole semiconductor wafer (101) with a plurality of device units (120) having metal contact pads. Each contact pad has a patterned barrier metal layer and a metal stud (103, preferably copper or nickel) with an outer surface suitable to form metallurgical bonds without melting. A leadframe suitable for the whole wafer is provided, which has a plurality of segments groups (102), each group suitable for one device unit; each segment has first (102a) and second ends (102b) covered by solderable metal. A predetermined amount of solder paste (104) is placed on each of the first segment ends. The leadframe is then aligned with the wafer so that each of the paste-covered segment ends is aligned with the corresponding metal stud of the respective device unit. The leadframe is connected to the wafer and the whole wafer is encapsulated (105) so that the device units and the first segment ends are covered, while the second segment ends remain exposed. The encapsulated wafer is separated (110) into individual device units (120).

The present invention discloses an electronic package to contain and protect an integrated circuit (IC) chip. The electronic package further includes a leadframe, a flexible circuit or PCB type of substrate. The leadframe, flexible circuit or PCB type substrate further includes solder contacts, which are aligned with via holes in the molding layers on the top and bottom sides of the package. These via holes are for placing solder paste or solder balls from above and below for electrical access to the IC chip. These solder balls provide access for electrical testing after the package is mounted on a motherboard. They also provide the connection points for stacking multiple packages vertically.

The present invention offers a method of welding FPC board and PCB board, and the special fixture for this method which includes an upper-template and an under-template. The method includes the following steps: the first step, printing solder paste onto a big-piece PCB board composed of several small-piece PCB boards; the second step, using SMT to compose components onto the PCB board; the third step, fixing the PCB board in the slot of under-template of the fixture for locating; the fourth step, aligning the solder pad zones of FPC board and PCB board; the fifth step, covering the upper-template of the fixture to the upper-surface of the PCB board, and the overlapped area of solder-pad zone is 50%-80%, the under-surface of the upper-template should must maintain horizontal, rotating the block button on the under-template to fasten the upper-template; the sixth step, sending the fastened fixture into enclosed reflow oven for refluxing weld; the seventh step, taking off the template, checking the welding state between FPC board and PCB board. As the said welding method is less in steps and simple in its special fixture, the productive efficiency is high, and the cost is low.

The invention aims to provide a thermosetting flux suitable for solder bonding of a semiconductor element and an electronic part and making solder bonding with a high bonding strength and a high heat resistant strength at a high temperature possible and a paste containing the flux and a non-lead type solder paste and with respect to the thermosetting flux, an epoxy resin, a hardening agent, and at least one of rosin derivatives having functional groups reactive on the epoxy resin and selected from maleic acid-modified rosin, a fumaric acid-modified rosin, and acrylic acid-modified rosin are used. The flux can be used in form of a solder paste while being mixed and kneaded with the non-lead type solder alloy powder.

A semiconductor module solder bonding of high reliability in which the heat resisting properties of the circuit substrate and electronic parts are taken into consideration. In order to achieve this, there are provided semiconductor devices each having solder bumps as external pads, and a circuit substrate bonded to the external pads of each of the semiconductor devices through a solder paste, each of the solder bumps being made of a first lead-free solder, the solder paste being made of a second lead-free solder having a melting point lower than that of the first lead-free solder.

A system in package (SIP) is fabricated on a sheet of copper foil. An interconnection circuit is fabricated on the foil using copper conductors and a dual damascene structure for each conductive layer. The preferred dielectric material is an amorphous fluorinated polymer called Cytop. Input/output traces of the interconnection circuit terminate in wells filled with solder. Chips are bumped and direct attached by inserting the bumps into the wells. The preferred bumps are gold stud bumps, and the preferred wells contain solder paste to a depth of approximately 15 microns. Imprinting is the preferred method for patterning; it enables 6-micron wide traces, 6-micron diameter vias, and a cost per well of around 0.02 cents. Stripline structures are described for a 4-layer stackup that can support operating frequencies of at least 10 GHz. New methods are proposed for testing the completed assembly and for rework of any chips that prove defective. After the assembly is fully tested and reworked in sheet form the copper foil is folded to form a stacked die package or system in package. 5-high and 9-high stacks are illustrated. The copper foil provides a low impedance thermal path for cooling every chip in the SIP.

The invention discloses a halogen-free cleaning-free rosin flux, and preparation and application thereof, and particularly relates to a flux suitable for surface mount lead-free welding paste, preparation of the flux and application of the flux. The flux comprises 20-50% (mass fraction, the same below) of rosin, 5-25% of film-forming agent, 30-50% of high boiling solvent, 3-8% of activator and 2-5% of thixotropic agent, and the flux does not contain any halogen. In order to control growth of interface IMC (intermediate compound) during welding, 0.3-1% of combined inhibitor is added. The welding paste prepared with the flux and lead-free tin-silver-copper powder has the advantages of excellent printing performance, fine weldability, less post-weld residue, thin and even welding spot interface IMC and excellent mechanical property, and is capable of meeting the requirement of high-end electronic products on packaging.

This invention discloses a power device package for containing, protecting and providing electrical contacts for a power transistor. The power device package includes a top and bottom lead frames for directly no-bump attaching to the power transistor. The power transistor is attached to the bottom lead frame as a flip-chip with a source contact and a gate contact directly no-bumping attaching to the bottom lead frame. The power transistor has a bottom drain contact attaching to the top lead frame. The top lead frame further includes an extension for providing a bottom drain electrode substantially on a same side with the bottom lead frame. In a preferred embodiment, the power device package further includes a joint layer between device metal of source, gate or drain and top or bottom lead frame, through applying ultrasonic energy. In another embodiment, a layer of conductive epoxy or adhesive, a solder paste, a carbon paste, or other types of attachment agents for direct no-bumping attaching the power transistor to one of the top and bottom lead frames.

A capacitor has first planer internal electrodes in electrical contact with a first external termination. Second planer internal electrodes are interleaved with the first planer internal electrodes wherein the second planer internal electrodes are in electrical contact with a second external termination. A dielectric is between the first planer internal electrodes and the second planer internal electrodes and at least one of the external terminations comprises a material selected from a polymer solder and a transient liquid phase sintering adhesive.

A light emitting element is die-bonded to a portion of a lead frame exposed at the bottom of an opening formed at a top face of a resin package. A reflector to direct light emitted from the light emitting element towards a predetermined direction is attached to the top face of the resin package. Lead terminals are arranged so as to protrude from two opposite side regions of the resin package. A predetermined lead terminal among the plurality of lead terminals, connected to a portion where the light emitting element is die-bonded, is bent upwards, and soldered to the reflector by solder paste.

A soldering apparatus has a fixture receiving an electronic component and a conducting wire, with a free end of the conducting wire superimposed on the soldering area of the electronic component, a convey mechanism capable of transmitting the fixture downstream, a daubing device, and a soldering device. The daubing device has a level movable element capable of moving along a convey direction of the convey mechanism, and a vertical movable element mounted on the level movable element and capable of moving along an upward and downward direction. A carrier mounted to the vertical movable element has a solder paste can for loading the solder paste, and an output portion for dispensing the solder paste to the soldering area. The soldering device has a soldering head heating the solder paste for shrinking the insulator, with the core wire exposing and connected to the soldering area by the cool solder paste.

A semiconductor package structure for flip chip package includes at least a patterned circuit layer and an insulating layer alternately stacking up each other. The patterned layer includes a plurality of bump pads, and the insulating layer includes a plurality of etching holes. The etching holes and the bump pads are aligned, such that the bump pads are exposed through the etching holes. A plurality of bumps is disposed on the active surface of the chip, which can be obtained by stud bumping. The etching holes are filled with solder paste, and the bumps of the chips penetrate into the solder filled etching holes. Vibration obtained by mechanical equipment, or ultrasonic equipment can be applied to assist the alignment of the bumps to the corresponding bump pads. A reflow process is applied to collapse the solder paste that fills the etching holes to form electrical connection between the bumps and bump pads.

In a surface mount assembly, an active integrated circuit device, such as, for example, a dynamic random access memory, typically has a lead finger attached to a solder pad of a printed wiring board. The surface mount assembly is significantly improved by configuring a passive component, such as a resistor or capacitor, such that it has metallic terminations on an upper and lower surface so that it may be positioned between the solder pad of the printed wiring board and the lead finger.

The invention discloses scaling powder for no-clean lead-free low-silver welding paste. The scaling powder comprises, by weight percentage, 3-13% of active agent, 0.2-1.5% of surface active agent, 0.2-3.0% of emulgator, 3.0-10.0% of thixotropic agent, 3-8% of film-forming agent, 0.1-1% of antioxidant, 0.1-0.5% of corrosion inhibitor and the rest of solvent. The active agent is composed of four or five components in succinic acid, oxalic acid, salicylic acid, glutaric acid, citric acid, adipic acid, lactic acid, benzoic acid, malic acid and triethanolamine. The scaling powder for the no-clean lead-free low silver welding paste does not contain halogen, the corrosion to a circuit board is greatly lowered, the printing quality of the welding paste is good without bridging or turned-down edges, a welding point is good in forming after returning, the brazing connecting defect is greatly lowered, the residue is small without solder balls, the cleaning is not needed, the welding paste is directly used for assembling, the Sn-0.45 Ag-0.68 Cu or Sn-0.3 Ag-0.7 Cu low silver welding paste manufactured by using the scaling powder does not contain the halogen and rosin, the organic chemistry smoke is small, and the pollution to the environment is small.

According to the invention, a resin-free solder paste made from a metal powder, particularly soft solder and a gel, is prepared, wherein the gel according to the invention leaves no residue on the metal surface during the remelting of the metal powder. The gel according to the invention is based on a mixture that is stable during storage and that comprises carboxylic acid(s), amine(s), and solvent(s). Important uses are the application of soft solder pastes on power-modules, die-attach, chip-on-board, SiP (System-in-Package), for wafer-bumping, particularly on UBM's (Under-Bump-Metallization), and SMT (Surface Mounted Technology), particularly coated circuits. With the use of resin-free soft solder pastes according to the invention, cleaning is eliminated before a protective coating process after the soldering of an electrical connection, and the formation of pores in solder bumps deposited on UBM's is reduced to less than 20 vol. %.

In a protective panel with a touch input function of an electronic apparatus display window, with a built-in antenna being placed on a back side thereof, an upper electrode sheet and a lower electrode panel that constitute the protective panel with a touch input function are respectively provided with radio-wave transmitting sections with no conductor formed therein, within a frame area to be covered with a decorative layer, in association with the built-in antenna, and with respect to all the portion or most of the portion of a border relative to the conductor of the radio-wave transmitting section on the upper electrode sheet side, since a paste layer, used for bonding the upper electrode sheet to the lower electrode panel at peripheral edge portions thereof, is provided with a through hole in a manner so as to overlap with, at least, an area near the inside of the border, with air inside the through hole being allowed to flow in or flow out through an air bent.

This invention provides an electronic component mounting method capable of effectively utilizing a self-alignment effect even if a mounting interval of electronic components is small. This method includes the steps of detecting a printing position of a solder paste on the circuit board and mounting an electronic component. This invention further provides apparatus, devices, and system using the method. When a solder paste on a circuit board having a land formed thereon is printed and an electronic component is mounted, the printing position of the solder paste of the circuit board is detected by a printing position detecting device included in an inspecting apparatus. Then, the electronic component is mounted by using the detected printing position of the solder paste as a reference by an electronic component mounting apparatus.

Disclosed is a chip and method of forming the chip with improved conductive pads that allow for flexible C4 connections with a chip carrier or with another integrated circuit chip. The pads have a three-dimensional geometric shape (e.g., a pyramid or cone shape) with a base adjacent to the surface of the chip, a vertex opposite the base and, optionally, mushroom-shaped cap atop the vertex. Each pad can include a single layer of conductive material or multiple layers of conductive material (e.g., a wetting layer stacked above a non-wetting layer). The pads can be left exposed to allow for subsequent connection to corresponding solder bumps on a chip carrier or a second chip. Alternatively, solder balls can be positioned on the conductive pads to allow for subsequent connection to corresponding solder-paste filled openings on a chip carrier or a second chip.

This invention relates to an integrated circuit package and a method for the same, especially relates to the integrated circuit package without a solder mask and the method for the same. A solder wettable metal is used as the material of the first solder pad and a non-wettable insulating layer is formed on the top surface and sidewalls of the metal layer, which is not solder pads, in the integrated circuit packages without a solder mask of the present invention to avoid short circuit defects and to increase a circuit density and reliability of the integrated circuit packages.

A solder paste including a metal component consisting of a first metal powder and a second metal powder having a melting point higher than that of the first metal, and a flux component. The first metal is Sn or an alloy containing Sn, and the second metal is a metal or alloy which forms an intermetallic compound having a melting point of 310° C. or higher with the first metal and has a lattice constant difference, i.e. a difference in between the lattice constant of the intermetallic compound and the lattice constant of the second metal component, of 50% or greater.