224 results about "Chip carrier" patented technology

The embodiment of the invention provides a chip carrier plate and a manufacturing method thereof, a chip packaging structure, and a manufacturing method of the chip carrier plate, and the method comprises the steps: forming a first protection layer on a first surface of a glass substrate, forming a plurality of first through holes in the first protection layer, carrying out the laser induction of the glass substrate through the first through holes, and forming a plurality of induction regions, and in the induction area, etching the glass substrate to form a plurality of second through holes penetrating through the glass substrate, and forming conductive connection parts in the second through holes. The first protection layer with the first through hole is manufactured on one side of the glass substrate, the first protection layer exposes the area, needing laser induction, on the glass substrate, the area, not needing laser induction, on the glass substrate is protected, and it is avoided that when the glass substrate is etched subsequently, etching damage is caused to other positions of the surface of the glass substrate. Therefore, the thickness of the glass substrate can be ensured, and the surface quality such as roughness of the surface of the glass substrate can be ensured.

A method for manufacturing an optoelectronic device comprises steps for providing a chip carrier having a top surface on which an optoelectronic semiconductor chip is arranged, for providing a protective film having a top surface and a bottom surface, for arranging a silicone layer on the top surface of the chip carrier, wherein the optoelectronic semiconductor chip is embedded in the silicone layer, and for laminating the bottom surface of the protective film onto the silicone layer.

The invention relates to the technical field of semiconductor device packaging, in particular to an LED light-emitting chip packaging method. The method comprises the following steps: S1, selecting an LED light-emitting chip according to a user demand; s2, carrying out cleaning and wafer expansion treatment on the chip bearing piece; s3, fixing the LED light-emitting chip on the bonding pad of the chip bearing piece; s4, the LED light-emitting chip is covered with fluorescent glue; and S5, carrying out curing treatment on the fluorescent glue. According to the invention, the optical effect of an LED product can be improved.

The invention relates to a key management method and device based on a quantum security chip carrier, and relates to the technical field of quantum computing, a unique UID is generated through a quantum random number generator in combination with a PUF technology, a mapping relation is established, sub-keys are derived in a layered mode and stored in a partitioned mode, and the key management efficiency is improved. A ternary binding mechanism of a chip unique identity, a quantum random entropy source and a storage environment fingerprint is constructed, through integrity verification, bidirectional identity authentication and a quantum secure transmission channel, key full-life-cycle security control is realized, quantum attacks and security threats are effectively resisted, and the security, credibility, traceability and suitability of key management are improved.

The invention provides an FCBGA chip support plate process parameter optimization method, system and device and a medium, and belongs to the technical field of PCB production, the method comprises the following steps: collecting and preprocessing a historical data set in the FCBGA chip support plate production process, and screening data subsets with correlation greater than a preset threshold based on target features of a to-be-optimized production task; training a machine learning prediction model capable of mapping the process parameters to the quality indexes; constructing a multi-objective optimization function by taking a machine learning prediction model as a core; a multi-objective optimization algorithm is adopted to search in the process parameter constraint space, and a Pareto optimal solution set is solved; and selecting a final optimal process parameter according to a preset decision strategy, applying the final optimal process parameter to an actual production line of the FCBGA chip carrier plate, then collecting actual production result data, and feeding back the actual production result data to a historical data set. The method is based on historical data machine learning multi-objective optimization, incremental learning dynamically adapts to production line changes, and quality and efficiency are improved.

The present invention discloses a method for preparing a thick biaxially oriented liquid crystal polymer film, which is characterized by: adding LCP resin to a drying tank, drying it, and then putting it into a melt extrusion device for melt extrusion; the molten LCP resin is extruded through a T-die, and the formed LCP sheet flows onto a steel belt below, and the temperature of the steel belt is controlled by a hot air plate below; the LCP sheet runs on the steel belt, and then a circulating needle-punched belt is brought into contact with both sides of the LCP, and the LCP sheet is extended in the horizontal direction by the uniform movement of the needle-punched belt, and then peeled off from the steel belt after natural cooling; the LCP film is subjected to high-temperature heat setting and then cooled to obtain a thick biaxially oriented liquid crystal polymer film. The liquid crystal polymer film prepared by the present invention has the characteristics of high mechanical strength, uniform longitudinal and transverse tensile strength, and relatively thick thickness, and can be widely used in the fields of rigid high-frequency and high-speed copper-clad laminates, high-temperature resistant sheets, wireless charging insulation sheets, flame-retardant sheets, chip carriers, etc.

The invention relates to a jet type liquid cooling heat dissipation device for an electronic chip and a working method of the jet type liquid cooling heat dissipation device. The device comprises a chip carrier provided with an electronic chip, a base, a jet flow guide plate, a backflow collection plate, a cover plate and a connector, the base is installed on the chip carrier in a sealed mode, and the jet flow guide plate, the backflow collecting plate and the cover plate are sequentially stacked and mutually connected in a sealed mode and are integrally fixed to the base. A first through hole and a second through hole are formed in the position, above the electronic chip, of the jet flow guide plate, a cooling liquid through hole and a cooling liquid guide hole are formed in the backflow collection plate, and a first cooling liquid connector and a second cooling liquid connector are formed in the cover plate. Compared with the prior art, through the collaborative design of the jet flow guide plate and the backflow collection plate, cooling liquid directly impacts the surface of an electronic chip in a high-speed jet flow mode, and therefore the local heat exchange efficiency is remarkably improved; and meanwhile, a backflow path is optimized, flowing resistance is reduced, high heat exchange performance and low pressure drop are both considered, and the heat dissipation device is suitable for efficient heat dissipation of high-heat-flux electronic chips.

A method for producing an optoelectronic component comprises steps of: providing a chip carrier (100) having a top side (101) on which an optoelectronic semiconductor chip (110) is positioned; providing a protective film (200) having a top side (201) and a bottom side (202); positioning a silicone layer (120) on the top side of the chip carrier (100), such that the optoelectronic semiconductor chip (110) is embedded in the silicone layer (120); and laminating the bottom side of the protective film (200) onto the silicone layer (120).

This invention relates to the field of semiconductor technology, and more particularly to a packaging frame, packaging structure, and heat dissipation device for SiC MOS applications. It includes: a first frame comprising a heat dissipation island and a first pin portion connected in sequence; the top surface of the heat dissipation island is located above the first pin portion, and a chip carrier area is provided at its bottom; a stepped area is provided at the edge of the top surface of the heat dissipation island; a chamfered step is provided between the stepped area and the first pin portion; the thickness of the heat dissipation island is greater than the thickness of the first pin portion; and a second frame is spaced apart and disposed on the side of the first frame. This invention achieves decoupling of electrical connections and heat conduction paths, significantly improving thermal management capabilities, enhancing heat dissipation capabilities, and reducing system thermal resistance. The top heat dissipation design improves Rth(j-a) by approximately 20% and Rth(j-h) by approximately 50% compared to traditional bottom heat dissipation; it also addresses the requirement of achieving a maximum operating junction temperature of 175~200℃ for SiC chips.

The present application relates to a kind of anti-shake camera module, it includes: module shell;Intermediate support seat, it is arranged in module shell and the space in module shell is divided into upper chamber and lower chamber;Optical lens, it is set in the upper chamber;Lens OIS carrier, the optical lens is installed in the lens OIS carrier;Photosensitive chip, it is set in the lower chamber;Chip OIS carrier, the photosensitive chip is fixed in the chip OIS carrier;Lens OIS ball, it is arranged between the bottom surface of the lens OIS carrier and the upper surface of the intermediate support seat;And chip OIS ball, it is arranged between the top surface of the chip OIS carrier and the lower surface of the intermediate support seat.The anti-shake camera module of the present application is easy to assemble, can effectively control module height, has big anti-shake stroke and has AF function.

The utility model discloses a chip carrier device for biochemical synthesis and a biochemical synthesis system. The chip carrying table device comprises a carrying table main body which is provided with a cavity with a downward opening, the top of the cavity is provided with a chip installation area, and the chip installation area is provided with a plurality of through holes; the carrying table support is positioned below the carrying table main body; the carrying table support is connected with the carrying table main body through a rotating pin; an angle adjusting assembly is arranged on the carrying table support, and the carrying table body has the freedom degree of horizontally rotating around the center of the rotating pin under the adjusting effect of the angle adjusting assembly. A sealing assembly matched with the cavity is arranged on the carrying table support; a negative pressure adsorption assembly is arranged below the sealing assembly and communicates with the cavity through a pipeline. And the cavity forms a negative pressure environment facing the plurality of through holes under the action of the negative pressure adsorption assembly so as to adsorb the chip covering the chip mounting area. The device can meet different requirements of positioning, position adjusting, fixing and the like of the chip, and precise positioning and precise sealing of the chip are achieved.

The invention provides a temperature control testing device for a high-temperature chip. The temperature control testing device comprises an inner-layer temperature control structure and an outer-layer temperature control structure, the outer-layer temperature control structure comprises an air isolation cover and a bottom substrate, and the air isolation cover is fixed on the upper surface of the bottom substrate to define a high-temperature inner cavity; the inner-layer temperature control structure is provided with a chip carrying table which is arranged in the high-temperature inner cavity, the upper surface of the chip carrying table carries a chip, and a vacuum adsorption device with a plurality of adsorption holes is integrated. The inner layer temperature control structure and the outer layer temperature control structure are connected through a plurality of low-heat-conductivity connecting columns. An inner-outer double-layer temperature control structure design is adopted, and heat conduction is weakened through the low-heat-conductivity connecting columns. The outer layer forms a closed high-temperature inner cavity through an air isolation cover, and is integrated with a high-boron glass observation window and a slidable partition plate; the temperature of the inner layer is controlled through a chip carrier, and a vacuum adsorption device is integrated to fix a chip. The outer layer isolates outside airflow, the inner layer reduces the temperature difference between the chip and the cavity, closed-loop temperature control is achieved through the inner heating element, the outer heating element and the temperature sensor, the problem that temperature fluctuation of single-layer temperature control is large is solved, and stable temperature control is achieved.

The application provides a chip carrier plate, a preparation method thereof and a chip packaging structure. The chip carrier plate comprises a core layer, a conductive column, a first wiring layer and a second wiring layer. The core layer is provided with a conductive hole, and the cross-sectional shape of the conductive hole parallel to the plane where the core layer is located comprises a ring shape. The conductive column is arranged in the conductive hole, and the cross-sectional shape of the conductive column parallel to the plane where the core layer is located comprises a ring shape. The first wiring layer and the second wiring layer are arranged on both sides of the core layer and are electrically connected with the conductive column. The application designs the conductive hole and the conductive column as a ring structure, thereby increasing the contact area between the conductive column and the core layer, reducing the pressure intensity borne by the core layer in the chip packaging process, and greatly reducing the risk of cracks in the core layer.

This invention provides an anomaly tracing system and method for chip carrier tray damage, belonging to the field of semiconductor chip testing technology. The system includes: a cabinet storage detection system for acquiring and sending six-sided images of the damaged tray to a tray damage tracing system; the tray damage tracing system compares the six-sided images of the damaged tray with the six-sided images of the corresponding normal tray. If the deviation of any region on any face is greater than or equal to a preset value, the region is marked as a candidate damage region, and feature point coordinates are extracted to construct a polygon; the smallest bounding polygon covering all vertices of the polygon is compared with the rectangular region of the corresponding contact position of the mechanism. If there is a spatial intersection between the two, the mechanism is determined to be a highly correlated suspected mechanism causing the tray damage. This invention achieves automated identification and accurate correlation between damaged areas and interference points.

The invention discloses a packaging structure design and a packaging process of a multi-channel driving circuit, and relates to the technical field of microelectronic device packaging. Which comprises a ceramic base, a metal wall, a chip carrier and an outer lead electrode, and is characterized in that the ceramic base is of a stepped structure and is made of an Al2O3 multilayer ceramic material; the metal wall on the first step is fixedly connected with the ceramic base through a sintering process, and nine inner electrode bonding pads are arranged on the second step; the chip carrier on the third step is fixedly connected with the ceramic base through a sintering process; and an outer lead electrode is welded and fixed at the bottom of the ceramic base. The heat conductivity of the ceramic material is obviously higher than that of the plastic packaging material, heat generated by the chip can be efficiently conducted to the external environment, and a lighter and smaller packaging appearance is achieved through internal structure optimization. And secondly, the loss of the high-frequency signal in the ceramic material is lower, so that the loss of a finished product device can be reduced.

The invention discloses a semiconductor chip testing device which comprises a machine frame, a stock bin assembly, a feeding and discharging assembly and a testing assembly. The stock bin assembly, the feeding and discharging assembly and the testing assembly are installed on the machine frame. A testing plate communicating with an upper computer and a chip carrying plate electrically connected with the testing plate are sequentially arranged above a testing carrying plate. A plurality of chip seats are arranged on the upper surface, opposite to the test plate, of the chip carrier plate, a plurality of pressure heads corresponding to the chip seats are arranged on the lower surface of a pressure plate arranged above the chip carrier plate, the plurality of pressure heads are arranged to form at least two pressure head rows, the plurality of pressure heads in each pressure head row are arranged at intervals along the X direction, and the plurality of pressure heads correspond to the chip seats. A strip-shaped through hole extending in the X direction is formed in the position, located between any two adjacent pressing head rows, of the upper surface of the pressing plate. According to the invention, batch testing of multiple chips is realized, the stress stability and consistency of the chips in the whole testing process can be ensured, the production testing efficiency can be improved, and the testing precision can be ensured.

The utility model provides a motor, a camera module and electronic equipment. The motor comprises a base, a carrier, a circuit board and a driving chip. The carrier is movably connected with the base. The circuit board is fixedly connected to the base. The driving chip is fixedly connected to the circuit board and is electrically connected to the circuit board. The circuit board comprises a substrate and a first bonding pad, and the substrate comprises a first board face opposite to the base. The substrate is provided with a first groove, and an opening of the first groove is located on the first plate surface. The first bonding pad is embedded in the substrate, and at least part of the first bonding pad is located in the first groove. The base comprises a first conductive piece, and a second welding face of the first conductive piece extends out of the side face of the substrate. And the first bonding pad is fixedly connected with the second welding surface of the first conductive piece through the first welding point. The thickness of the circuit board is reduced by arranging the first groove, and at least part of the first bonding pad is arranged in the first groove, so that the welding reliability of the first bonding pad and the first conductive piece is improved.

The invention provides a high-speed sorting machine with a wafer picking and overturning function for wafer loading type chip carrier plates and a working method. The high-speed sorting machine comprises a ring box loading and unloading carrying table; ring is carried out on the ring carrying platform; a ring clamping device; the material sheet jacking device is used for jacking the material sheet; a positioning camera; the first transfer flying shuttle and the second transfer flying shuttle are used for conveying ring rings; the single-suction-nozzle transferring device is used for sucking the material sheets; the multi-suction-nozzle overturning device is used for overturning the material sheets; the multi-suction-nozzle transferring device is used for sucking and transferring the material sheets; a tray transfer device; an empty tray loading bin; a tray bin loading and unloading device; the invention discloses a tray grabbing and transferring device. Through the film stretching assembly and the ejector pin assembly, the chip carrier plate can be accurately ejected out; the overturning mechanism is designed in the rear section of the action process, the material sheets are transferred through the double-shuttle-car mechanism, the sheet picking step and the overturning / sorting step are connected, the overturning mechanism is compatible with multiple chip sizes and compatible with the overturning action mode and the non-overturning action mode, production is efficient, layout is compact, and cost is reduced.

The invention discloses a blue film chip sorting device, and belongs to the technical field of chip unit manufacturing equipment. Comprising a chip carrier used for positioning, clamping and transferring a chip tray, a blue film positioning carrying table used for positioning, clamping and transferring a blue film, a vacuum carrying clamp capable of transferring a chip unit between the chip carrier and the blue film positioning carrying table, and a tray supply mechanism used for supplying the chip tray to the chip carrier. The blue film supply mechanism is used for supplying a blue film to the blue film positioning carrying table, the visual module is used for detecting the position of a chip unit on the blue film, the lower side of the blue film arranged on the blue film positioning carrying table is suspended, and a lifting carrying table and a limiting sliding table which can synchronously ascend and descend are arranged below the blue film positioning carrying table; an outer ring ejector sleeve and an inner ring ejector core are slidably connected to the lifting platform deck in the lifting direction of the lifting platform deck. According to the blue film chip sorting device, blue film base materials on chip units can be separated in batches, and therefore the chip units on blue films can be separated safely and efficiently.

The present application relates to a chip carrier assembly, a chip testing device and a method, wherein the chip carrier assembly is used to fix chips of different sizes, and includes a rotatable vertical rod, a horizontal beam, a first side wall and a second side wall, wherein the rotatable vertical rod is provided with a gear with gear teeth surrounding the rotatable vertical rod; a first through hole and a first slide groove are provided in the horizontal beam; the top of the first side wall is connected to the first connecting rod located in the first slide groove; the top of the second side wall is connected to the second connecting rod located in the first slide groove, and the side surface of the first connecting rod is provided with a plurality of linearly arranged first tooth grooves; the rotatable vertical rod is used to rotate in the first through hole, driving the gear to rotate, so that the gear teeth engage with the first tooth grooves, thereby driving the first side wall relatively close to or away from the second side wall. The chip carrier assembly in the present application can fix chips of different types, shapes and volumes, thereby improving chip testing efficiency while reducing the testing cost of multiple types of chips.

The invention relates to a liquid-helium-conduction-free cooling quantum resistance device carrying platform, and the carrying platform comprises a cold conduction column which is provided with a heat conduction thread at the outer edge of the bottom and is used for binding a cold conduction belt; the center of the bottom of the chip carrying table is fixedly connected with the top of the cold conduction column; the circuit board group comprises an interface circuit board, a first carrier plate, a second carrier plate, a third carrier plate and a fourth carrier plate which are stacked from top to bottom and are electrically connected with one another through gold-plated contact pins; the first carrier plate is fixed below the interface circuit board through an isolated interface, the second carrier plate and the third carrier plate are fixedly mounted on the upper side of the chip carrier, and the fourth carrier plate is fixedly connected below the third carrier plate; the resistor chip is fixed on the upper surface of the chip carrier and is electrically connected with the gold-plated patch on the surface of the second carrier through a bonding lead; and the gold-plated patch and the gold-plated pin form a path. The operation complexity is obviously reduced, long-term stable operation of the quantum resistor in a liquid-helium-free environment is realized, and the traceability precision of resistance value transmission is ensured.

The utility model provides a kind of heat dissipation cover mounting assembly for traditional SMT chip mounter, for traditional SMT chip mounter's heat dissipation cover mounting assembly, including vacuum adsorption platform, chip carrier, heat dissipation cover carrier and suction nozzle placement platform, suction nozzle placement platform makes suction nozzle with predetermined angle be placed and fetch. When using, chip is placed in the first clamping groove of chip carrier, heat dissipation cover is placed in the second clamping groove of heat dissipation cover carrier, chip carrier is adsorbed to workbench surface, heat dissipation cover carrier, suction nozzle placement platform are fixed on the workbench of SMT chip mounter;Mechanical hand picks up suction nozzle from suction nozzle placement platform, operates suction nozzle to suck heat dissipation cover and is mounted to chip substrate.The utility model provides a kind of heat dissipation cover mounting assembly compatible traditional SMT chip mounter.Using vacuum adsorption platform to fix chip carrier, solve the clamping problem of small size substrate.Suction nozzle placement platform guarantees suction nozzle angle, improves the stability and precision of suction nozzle work, ensures the accurate suction and placement of heat dissipation cover.

The application discloses a liquid path system and a selection valve, and the liquid path system comprises a first selection valve, a chip carrier and a driving member. The first selection valve comprises a plurality of first liquid path ports, at least one second liquid path port and a plurality of third liquid path ports. Since the first selection valve comprises the plurality of first liquid path ports, the at least one second liquid path port and the plurality of third liquid path ports, and the first selection valve can be switched to be connected in one-to-one correspondence between the plurality of first liquid path ports and the plurality of third liquid path ports to conduct a plurality of mutually independent sample channels, the liquid path system can realize one-to-one connection between a plurality of independent sample channels and a plurality of fluid channels on the chip carrier by switching the first selection valve, so that the plurality of fluid channels of the sequencing carrier can be independently loaded, the loading efficiency can be greatly improved, the loading time can be shortened, and the sample can be measured immediately after being loaded.

The application discloses a packaging structure of a chip, which comprises a chip carrier lead frame, a plurality of piers are arranged on the base island of the chip carrier lead frame, a folded edge part is arranged on the periphery of the base island of the chip carrier lead frame, a bonding material layer is filled in the plastic packaging area of the chip carrier lead frame, the bonding material layer completely wraps the piers and bonds and fixes the chip body, a chip positioning part is arranged on the folded edge part, and the chip positioning part is used for physical packaging of the chip body on the chip carrier lead frame.

This invention discloses an infrared receiver, comprising a photodiode chip, a transistor chip, a resistor, a chip carrier, and a package. The photodiode chip, transistor chip, and resistor are fixed on the top of the chip carrier, and the package surrounds the top of the chip carrier. The bottom of the chip carrier extends out of the package and is provided with a control pin, a collector pin, and an emitter pin. The photodiode chip and the transistor chip are electrically connected. The resistor is connected across the two electrodes of the photodiode chip, and the transistor chip is electrically connected to the control pin, the collector pin, and the emitter pin, respectively. This infrared receiver retains the characteristics of photodiodes, such as a large detection angle, fast response speed, and low temperature drift, while also enabling signal amplification, facilitating control, having short interconnections between components, strong anti-interference capability, and a high signal-to-noise ratio.

The present application relates to a chip transfer method and a display panel. The chip transfer method comprises the following steps: providing a chip carrier plate; forming a temporary bonding structure, the temporary bonding structure comprising a bonding layer arranged on a chip and a through hole arranged on the chip carrier plate, the bonding layer being connected with an inner wall of the through hole; removing a buffer layer on the chip connected with the chip carrier plate, the bonding layer keeping the chip on the chip carrier plate; arranging a target substrate and the chip carrier plate so that a side of the chip carrier plate provided with the chip is opposite to a side of the target substrate for arranging the chip; and disconnecting the bonding layer arranged on a chip to be transferred from the through hole so that the chip to be transferred is separated from the chip carrier plate and falls to the target substrate. The stability of the chip when peeling off the chip carrier plate is improved, thereby ensuring the accuracy of the chip transfer.

The invention discloses a power chip embedded type packaging module which comprises a chip carrier plate which comprises a first circuit substrate and a conducting strip embedded in the first circuit substrate; a ceramic substrate disposed on the first surface side of the chip carrier; the second circuit substrate is arranged on the second surface side of the chip carrier; the plurality of power chips are packaged between the chip carrier plate and the ceramic substrate; the first side of the power chip is electrically connected with the first circuit substrate and the conducting strip, and the second side, opposite to the first side, of the power chip is electrically connected with the ceramic substrate; two opposite sides of each ceramic heat conduction block are respectively connected with the conducting strip and the ceramic substrate; and the heat-conducting ceramic blocks and the power chips are alternately arranged along the length direction of the conducting strip. The packaging module has the advantages of being high in integration level and good in heat dissipation performance, the circuit loop area of the module can be reduced, circuit impedance is effectively reduced, and the parasitic inductance effect is reduced.

The present application relates to a chip transfer method, a backboard, a manufacturing method of the backboard and a display panel. The chip transfer method comprises: providing a backboard, the backboard comprising a substrate, a flexible circuit layer and a plurality of deformation units; controlling a first group of deformation units on the backboard to deform, so that a region of the flexible circuit layer corresponding to the first group of deformation units forms a height difference with a region of the flexible circuit layer corresponding to other deformation units; abutting a side of a chip carrier plate on which chips are arranged against the backboard, at least part of the chips on the chip carrier plate being in contact with a region of the flexible circuit layer closer to the chip carrier plate; and transferring the chips in contact with the flexible circuit layer to the flexible circuit layer. The chip transfer method realizes selective chip transfer and direct chip transfer to the backboard to shorten the manufacturing process.

The utility model discloses a novel packaging structure of an intelligent card chip carrier tape, which relates to the packaging field of the intelligent card chip carrier tape, and comprises a cut intelligent card chip carrier tape, and an intact intelligent card chip carrier tape is arranged above the cut intelligent card chip carrier tape; and the butt joint mechanism is positioned at the top of the cut intelligent card chip carrier tape and the intact intelligent card chip carrier tape and is used for carrying out butt joint on the cut intelligent card chip carrier tape and the intact intelligent card chip carrier tape. According to the utility model, through the cooperation of parts such as the butt joint mechanism and the like, the complete connecting groove at the other end of the intelligent card chip carrier tape continues to be in butt joint with other connecting grooves, and the design of the intelligent card chip carrier tape allows a plurality of carrier tapes to be connected through the butt joint of the connecting grooves, which means that the number or layout of intelligent card chips can be expanded as required; and when a plurality of carrier tapes are welded, the welding efficiency is greatly improved through stable butt joint of the connecting grooves.

This utility model discloses a chip carrier tape that facilitates material handling, belonging to the field of chip carrier tapes. It includes: a carrier tape body; multiple placement blocks fixedly connected to the top of the carrier tape body; cover plates rotatably connected to the inner sides of each placement block; abutment blocks slidably connected to one side of each placement block; a slot adapted to the abutment blocks on one side of the cover plates; the outer side of the abutment blocks movably inserting into the inner side of the cover plates; a third block fixedly connected to one side of the abutment blocks; a fourth block movably abutting one side of the third block; a horizontal plate fixedly connected to one side of the fourth block; two large connecting rods rotatably connected to the top of the horizontal plate; and a movable block rotatably connected to the other end of each of the two large connecting rods. Two external threads with opposite directions are provided on the outer side of the screws. This utility model has a reasonable structural design. Through the cooperation between the first and second blocks and the large connecting rods, the cover plates can be easily fixed to the device, allowing users to quickly open it and further improving work efficiency.