146 results about "Chip carrier" patented technology

The embodiment of the invention provides a chip carrier plate and a manufacturing method thereof, a chip packaging structure, and a manufacturing method of the chip carrier plate, and the method comprises the steps: forming a first protection layer on a first surface of a glass substrate, forming a plurality of first through holes in the first protection layer, carrying out the laser induction of the glass substrate through the first through holes, and forming a plurality of induction regions, and in the induction area, etching the glass substrate to form a plurality of second through holes penetrating through the glass substrate, and forming conductive connection parts in the second through holes. The first protection layer with the first through hole is manufactured on one side of the glass substrate, the first protection layer exposes the area, needing laser induction, on the glass substrate, the area, not needing laser induction, on the glass substrate is protected, and it is avoided that when the glass substrate is etched subsequently, etching damage is caused to other positions of the surface of the glass substrate. Therefore, the thickness of the glass substrate can be ensured, and the surface quality such as roughness of the surface of the glass substrate can be ensured.

The invention relates to a key management method and device based on a quantum security chip carrier, and relates to the technical field of quantum computing, a unique UID is generated through a quantum random number generator in combination with a PUF technology, a mapping relation is established, sub-keys are derived in a layered mode and stored in a partitioned mode, and the key management efficiency is improved. A ternary binding mechanism of a chip unique identity, a quantum random entropy source and a storage environment fingerprint is constructed, through integrity verification, bidirectional identity authentication and a quantum secure transmission channel, key full-life-cycle security control is realized, quantum attacks and security threats are effectively resisted, and the security, credibility, traceability and suitability of key management are improved.

The invention provides an FCBGA chip support plate process parameter optimization method, system and device and a medium, and belongs to the technical field of PCB production, the method comprises the following steps: collecting and preprocessing a historical data set in the FCBGA chip support plate production process, and screening data subsets with correlation greater than a preset threshold based on target features of a to-be-optimized production task; training a machine learning prediction model capable of mapping the process parameters to the quality indexes; constructing a multi-objective optimization function by taking a machine learning prediction model as a core; a multi-objective optimization algorithm is adopted to search in the process parameter constraint space, and a Pareto optimal solution set is solved; and selecting a final optimal process parameter according to a preset decision strategy, applying the final optimal process parameter to an actual production line of the FCBGA chip carrier plate, then collecting actual production result data, and feeding back the actual production result data to a historical data set. The method is based on historical data machine learning multi-objective optimization, incremental learning dynamically adapts to production line changes, and quality and efficiency are improved.

This invention relates to the field of semiconductor technology, and more particularly to a packaging frame, packaging structure, and heat dissipation device for SiC MOS applications. It includes: a first frame comprising a heat dissipation island and a first pin portion connected in sequence; the top surface of the heat dissipation island is located above the first pin portion, and a chip carrier area is provided at its bottom; a stepped area is provided at the edge of the top surface of the heat dissipation island; a chamfered step is provided between the stepped area and the first pin portion; the thickness of the heat dissipation island is greater than the thickness of the first pin portion; and a second frame is spaced apart and disposed on the side of the first frame. This invention achieves decoupling of electrical connections and heat conduction paths, significantly improving thermal management capabilities, enhancing heat dissipation capabilities, and reducing system thermal resistance. The top heat dissipation design improves Rth(j-a) by approximately 20% and Rth(j-h) by approximately 50% compared to traditional bottom heat dissipation; it also addresses the requirement of achieving a maximum operating junction temperature of 175~200℃ for SiC chips.

The present application relates to a kind of anti-shake camera module, it includes: module shell;Intermediate support seat, it is arranged in module shell and the space in module shell is divided into upper chamber and lower chamber;Optical lens, it is set in the upper chamber;Lens OIS carrier, the optical lens is installed in the lens OIS carrier;Photosensitive chip, it is set in the lower chamber;Chip OIS carrier, the photosensitive chip is fixed in the chip OIS carrier;Lens OIS ball, it is arranged between the bottom surface of the lens OIS carrier and the upper surface of the intermediate support seat;And chip OIS ball, it is arranged between the top surface of the chip OIS carrier and the lower surface of the intermediate support seat.The anti-shake camera module of the present application is easy to assemble, can effectively control module height, has big anti-shake stroke and has AF function.

The utility model discloses a chip carrier device for biochemical synthesis and a biochemical synthesis system. The chip carrying table device comprises a carrying table main body which is provided with a cavity with a downward opening, the top of the cavity is provided with a chip installation area, and the chip installation area is provided with a plurality of through holes; the carrying table support is positioned below the carrying table main body; the carrying table support is connected with the carrying table main body through a rotating pin; an angle adjusting assembly is arranged on the carrying table support, and the carrying table body has the freedom degree of horizontally rotating around the center of the rotating pin under the adjusting effect of the angle adjusting assembly. A sealing assembly matched with the cavity is arranged on the carrying table support; a negative pressure adsorption assembly is arranged below the sealing assembly and communicates with the cavity through a pipeline. And the cavity forms a negative pressure environment facing the plurality of through holes under the action of the negative pressure adsorption assembly so as to adsorb the chip covering the chip mounting area. The device can meet different requirements of positioning, position adjusting, fixing and the like of the chip, and precise positioning and precise sealing of the chip are achieved.

The invention provides a temperature control testing device for a high-temperature chip. The temperature control testing device comprises an inner-layer temperature control structure and an outer-layer temperature control structure, the outer-layer temperature control structure comprises an air isolation cover and a bottom substrate, and the air isolation cover is fixed on the upper surface of the bottom substrate to define a high-temperature inner cavity; the inner-layer temperature control structure is provided with a chip carrying table which is arranged in the high-temperature inner cavity, the upper surface of the chip carrying table carries a chip, and a vacuum adsorption device with a plurality of adsorption holes is integrated. The inner layer temperature control structure and the outer layer temperature control structure are connected through a plurality of low-heat-conductivity connecting columns. An inner-outer double-layer temperature control structure design is adopted, and heat conduction is weakened through the low-heat-conductivity connecting columns. The outer layer forms a closed high-temperature inner cavity through an air isolation cover, and is integrated with a high-boron glass observation window and a slidable partition plate; the temperature of the inner layer is controlled through a chip carrier, and a vacuum adsorption device is integrated to fix a chip. The outer layer isolates outside airflow, the inner layer reduces the temperature difference between the chip and the cavity, closed-loop temperature control is achieved through the inner heating element, the outer heating element and the temperature sensor, the problem that temperature fluctuation of single-layer temperature control is large is solved, and stable temperature control is achieved.

The application provides a chip carrier plate, a preparation method thereof and a chip packaging structure. The chip carrier plate comprises a core layer, a conductive column, a first wiring layer and a second wiring layer. The core layer is provided with a conductive hole, and the cross-sectional shape of the conductive hole parallel to the plane where the core layer is located comprises a ring shape. The conductive column is arranged in the conductive hole, and the cross-sectional shape of the conductive column parallel to the plane where the core layer is located comprises a ring shape. The first wiring layer and the second wiring layer are arranged on both sides of the core layer and are electrically connected with the conductive column. The application designs the conductive hole and the conductive column as a ring structure, thereby increasing the contact area between the conductive column and the core layer, reducing the pressure intensity borne by the core layer in the chip packaging process, and greatly reducing the risk of cracks in the core layer.

This invention provides an anomaly tracing system and method for chip carrier tray damage, belonging to the field of semiconductor chip testing technology. The system includes: a cabinet storage detection system for acquiring and sending six-sided images of the damaged tray to a tray damage tracing system; the tray damage tracing system compares the six-sided images of the damaged tray with the six-sided images of the corresponding normal tray. If the deviation of any region on any face is greater than or equal to a preset value, the region is marked as a candidate damage region, and feature point coordinates are extracted to construct a polygon; the smallest bounding polygon covering all vertices of the polygon is compared with the rectangular region of the corresponding contact position of the mechanism. If there is a spatial intersection between the two, the mechanism is determined to be a highly correlated suspected mechanism causing the tray damage. This invention achieves automated identification and accurate correlation between damaged areas and interference points.

The utility model provides a motor, a camera module and electronic equipment. The motor comprises a base, a carrier, a circuit board and a driving chip. The carrier is movably connected with the base. The circuit board is fixedly connected to the base. The driving chip is fixedly connected to the circuit board and is electrically connected to the circuit board. The circuit board comprises a substrate and a first bonding pad, and the substrate comprises a first board face opposite to the base. The substrate is provided with a first groove, and an opening of the first groove is located on the first plate surface. The first bonding pad is embedded in the substrate, and at least part of the first bonding pad is located in the first groove. The base comprises a first conductive piece, and a second welding face of the first conductive piece extends out of the side face of the substrate. And the first bonding pad is fixedly connected with the second welding surface of the first conductive piece through the first welding point. The thickness of the circuit board is reduced by arranging the first groove, and at least part of the first bonding pad is arranged in the first groove, so that the welding reliability of the first bonding pad and the first conductive piece is improved.

The invention provides a high-speed sorting machine with a wafer picking and overturning function for wafer loading type chip carrier plates and a working method. The high-speed sorting machine comprises a ring box loading and unloading carrying table; ring is carried out on the ring carrying platform; a ring clamping device; the material sheet jacking device is used for jacking the material sheet; a positioning camera; the first transfer flying shuttle and the second transfer flying shuttle are used for conveying ring rings; the single-suction-nozzle transferring device is used for sucking the material sheets; the multi-suction-nozzle overturning device is used for overturning the material sheets; the multi-suction-nozzle transferring device is used for sucking and transferring the material sheets; a tray transfer device; an empty tray loading bin; a tray bin loading and unloading device; the invention discloses a tray grabbing and transferring device. Through the film stretching assembly and the ejector pin assembly, the chip carrier plate can be accurately ejected out; the overturning mechanism is designed in the rear section of the action process, the material sheets are transferred through the double-shuttle-car mechanism, the sheet picking step and the overturning / sorting step are connected, the overturning mechanism is compatible with multiple chip sizes and compatible with the overturning action mode and the non-overturning action mode, production is efficient, layout is compact, and cost is reduced.

The invention discloses a blue film chip sorting device, and belongs to the technical field of chip unit manufacturing equipment. Comprising a chip carrier used for positioning, clamping and transferring a chip tray, a blue film positioning carrying table used for positioning, clamping and transferring a blue film, a vacuum carrying clamp capable of transferring a chip unit between the chip carrier and the blue film positioning carrying table, and a tray supply mechanism used for supplying the chip tray to the chip carrier. The blue film supply mechanism is used for supplying a blue film to the blue film positioning carrying table, the visual module is used for detecting the position of a chip unit on the blue film, the lower side of the blue film arranged on the blue film positioning carrying table is suspended, and a lifting carrying table and a limiting sliding table which can synchronously ascend and descend are arranged below the blue film positioning carrying table; an outer ring ejector sleeve and an inner ring ejector core are slidably connected to the lifting platform deck in the lifting direction of the lifting platform deck. According to the blue film chip sorting device, blue film base materials on chip units can be separated in batches, and therefore the chip units on blue films can be separated safely and efficiently.

The utility model provides a kind of heat dissipation cover mounting assembly for traditional SMT chip mounter, for traditional SMT chip mounter's heat dissipation cover mounting assembly, including vacuum adsorption platform, chip carrier, heat dissipation cover carrier and suction nozzle placement platform, suction nozzle placement platform makes suction nozzle with predetermined angle be placed and fetch. When using, chip is placed in the first clamping groove of chip carrier, heat dissipation cover is placed in the second clamping groove of heat dissipation cover carrier, chip carrier is adsorbed to workbench surface, heat dissipation cover carrier, suction nozzle placement platform are fixed on the workbench of SMT chip mounter;Mechanical hand picks up suction nozzle from suction nozzle placement platform, operates suction nozzle to suck heat dissipation cover and is mounted to chip substrate.The utility model provides a kind of heat dissipation cover mounting assembly compatible traditional SMT chip mounter.Using vacuum adsorption platform to fix chip carrier, solve the clamping problem of small size substrate.Suction nozzle placement platform guarantees suction nozzle angle, improves the stability and precision of suction nozzle work, ensures the accurate suction and placement of heat dissipation cover.

The application discloses a liquid path system and a selection valve, and the liquid path system comprises a first selection valve, a chip carrier and a driving member. The first selection valve comprises a plurality of first liquid path ports, at least one second liquid path port and a plurality of third liquid path ports. Since the first selection valve comprises the plurality of first liquid path ports, the at least one second liquid path port and the plurality of third liquid path ports, and the first selection valve can be switched to be connected in one-to-one correspondence between the plurality of first liquid path ports and the plurality of third liquid path ports to conduct a plurality of mutually independent sample channels, the liquid path system can realize one-to-one connection between a plurality of independent sample channels and a plurality of fluid channels on the chip carrier by switching the first selection valve, so that the plurality of fluid channels of the sequencing carrier can be independently loaded, the loading efficiency can be greatly improved, the loading time can be shortened, and the sample can be measured immediately after being loaded.

The application discloses a packaging structure of a chip, which comprises a chip carrier lead frame, a plurality of piers are arranged on the base island of the chip carrier lead frame, a folded edge part is arranged on the periphery of the base island of the chip carrier lead frame, a bonding material layer is filled in the plastic packaging area of the chip carrier lead frame, the bonding material layer completely wraps the piers and bonds and fixes the chip body, a chip positioning part is arranged on the folded edge part, and the chip positioning part is used for physical packaging of the chip body on the chip carrier lead frame.

This invention discloses an infrared receiver, comprising a photodiode chip, a transistor chip, a resistor, a chip carrier, and a package. The photodiode chip, transistor chip, and resistor are fixed on the top of the chip carrier, and the package surrounds the top of the chip carrier. The bottom of the chip carrier extends out of the package and is provided with a control pin, a collector pin, and an emitter pin. The photodiode chip and the transistor chip are electrically connected. The resistor is connected across the two electrodes of the photodiode chip, and the transistor chip is electrically connected to the control pin, the collector pin, and the emitter pin, respectively. This infrared receiver retains the characteristics of photodiodes, such as a large detection angle, fast response speed, and low temperature drift, while also enabling signal amplification, facilitating control, having short interconnections between components, strong anti-interference capability, and a high signal-to-noise ratio.

The present application relates to a chip transfer method and a display panel. The chip transfer method comprises the following steps: providing a chip carrier plate; forming a temporary bonding structure, the temporary bonding structure comprising a bonding layer arranged on a chip and a through hole arranged on the chip carrier plate, the bonding layer being connected with an inner wall of the through hole; removing a buffer layer on the chip connected with the chip carrier plate, the bonding layer keeping the chip on the chip carrier plate; arranging a target substrate and the chip carrier plate so that a side of the chip carrier plate provided with the chip is opposite to a side of the target substrate for arranging the chip; and disconnecting the bonding layer arranged on a chip to be transferred from the through hole so that the chip to be transferred is separated from the chip carrier plate and falls to the target substrate. The stability of the chip when peeling off the chip carrier plate is improved, thereby ensuring the accuracy of the chip transfer.

The present application relates to a chip transfer method, a backboard, a manufacturing method of the backboard and a display panel. The chip transfer method comprises: providing a backboard, the backboard comprising a substrate, a flexible circuit layer and a plurality of deformation units; controlling a first group of deformation units on the backboard to deform, so that a region of the flexible circuit layer corresponding to the first group of deformation units forms a height difference with a region of the flexible circuit layer corresponding to other deformation units; abutting a side of a chip carrier plate on which chips are arranged against the backboard, at least part of the chips on the chip carrier plate being in contact with a region of the flexible circuit layer closer to the chip carrier plate; and transferring the chips in contact with the flexible circuit layer to the flexible circuit layer. The chip transfer method realizes selective chip transfer and direct chip transfer to the backboard to shorten the manufacturing process.

The utility model discloses a novel packaging structure of an intelligent card chip carrier tape, which relates to the packaging field of the intelligent card chip carrier tape, and comprises a cut intelligent card chip carrier tape, and an intact intelligent card chip carrier tape is arranged above the cut intelligent card chip carrier tape; and the butt joint mechanism is positioned at the top of the cut intelligent card chip carrier tape and the intact intelligent card chip carrier tape and is used for carrying out butt joint on the cut intelligent card chip carrier tape and the intact intelligent card chip carrier tape. According to the utility model, through the cooperation of parts such as the butt joint mechanism and the like, the complete connecting groove at the other end of the intelligent card chip carrier tape continues to be in butt joint with other connecting grooves, and the design of the intelligent card chip carrier tape allows a plurality of carrier tapes to be connected through the butt joint of the connecting grooves, which means that the number or layout of intelligent card chips can be expanded as required; and when a plurality of carrier tapes are welded, the welding efficiency is greatly improved through stable butt joint of the connecting grooves.

This utility model discloses a chip carrier tape that facilitates material handling, belonging to the field of chip carrier tapes. It includes: a carrier tape body; multiple placement blocks fixedly connected to the top of the carrier tape body; cover plates rotatably connected to the inner sides of each placement block; abutment blocks slidably connected to one side of each placement block; a slot adapted to the abutment blocks on one side of the cover plates; the outer side of the abutment blocks movably inserting into the inner side of the cover plates; a third block fixedly connected to one side of the abutment blocks; a fourth block movably abutting one side of the third block; a horizontal plate fixedly connected to one side of the fourth block; two large connecting rods rotatably connected to the top of the horizontal plate; and a movable block rotatably connected to the other end of each of the two large connecting rods. Two external threads with opposite directions are provided on the outer side of the screws. This utility model has a reasonable structural design. Through the cooperation between the first and second blocks and the large connecting rods, the cover plates can be easily fixed to the device, allowing users to quickly open it and further improving work efficiency.

To provide an improved semiconductor package with increased density, a printed circuit board (PCB) core assembly, and a method for forming them.SOLUTION: A method of structuring a substrate for a semiconductor core assembly that may be utilized to form a semiconductor package assembly, a PCB assembly, a PCB spacer assembly, a chip carrier assembly, an intermediate carrier assembly (e.g., for a graphics card), or the like, wherein a silicon substrate core is structured by direct laser patterning, one or more conductive interconnects are formed in the substrate core, and one or more redistribution layers are formed on a surface thereof. The silicon substrate core may then be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.SELECTED DRAWING: Figure 2

The utility model relates to the field of sealed storage boxes, in particular to an anti-oxidation sealed storage box for a chip bearing disc. Comprising a box body, a box door is installed on one side of the box body, a plurality of universal wheels are installed on the lower surface of the box body, an adjusting structure is arranged on the inner wall of the box body, the adjusting structure comprises a plurality of containing plates and a lead screw, the lead screw is fixed to the inner wall of the box body, and the lead screw is arranged on the surfaces of the containing plates in a sliding and penetrating mode; the arc surface of the lead screw is in threaded connection with a plurality of adjusting rings, and the lower surfaces of the adjusting rings are fixedly connected with a plurality of sliding plates. The anti-oxidation sealed storage box for the chip bearing discs has the advantages that when the anti-oxidation sealed storage box is used, the height of the placing plates and the distance between the two placing plates can be conveniently adjusted, so that the chip bearing discs with different thicknesses can be placed in the box body; and therefore, the application range of the sealed storage box is widened.

The invention relates to the field of chip packaging detection, in particular to a chip carrier tape packaging detection method and device. The execution process of the method and the device comprises the following steps: picking up a plurality of chips to be packaged and placing the chips in a carrier tape; linear light is projected to the surfaces of a plurality of chips to be packaged in a carrier band from the inclined upper direction, and a continuous linear light band is formed on the chips to be packaged and the carrier band; acquiring an image of the continuous linear light band, and identifying whether a light segment on the linear light band corresponding to the to-be-packaged chip has an offset part or not; if the deviation does not exist, the height abnormity does not exist; and if the offset part exists, identifying that the to-be-packaged chip has height abnormity. According to the invention, the abnormal state of the corresponding chip in height can be effectively identified through the offset condition on the linear light band, and synchronous detection can be continuously carried out, so that the efficiency of abnormal detection in the height direction is effectively improved.

The utility model discloses a chip carrier tape, and relates to the technical field of carrier tapes. The chip carrying belt comprises a carrying belt unit, the carrying belt unit is provided with a containing groove used for containing a chip, the containing groove is matched with the chip in shape, the corner of the containing groove is provided with an anti-collision groove, and the corner of the chip can be contained in the anti-collision groove. According to the chip bearing belt, the problem that positioning is not accurate due to the fact that chips are prone to overturning in the process that the chips are placed in the grooves of the bearing belt in the prior art can be solved.

The utility model provides a device for automatically replacing defective products on a chip carrier tape with good products, which comprises a first feeding device, a first chip detection device, a second feeding device and a chip detection and replacement device, the first feeding device is used for conveying the chip carrier tape to the first chip detection device, and the second feeding device is used for conveying the chip carrier tape to the second chip detection device. The first chip detection device is used for detecting whether a chip on a chip carrier tape is a good product or not, the second feeding device is used for conveying a standby chip carrier tape to the chip detection and replacement device, and the chip detection and replacement device firstly takes out a defective product from the chip carrier tape and throws the defective product to a recovery box. According to the invention, the spare chip carrier tape is arranged on the chip carrier tape, and then the non-defective chips are taken out from the spare chip carrier tape and are placed in the chip grooves of the chip carrier tape, so that the defective products on the chip carrier tape are automatically replaced by non-defective products, each chip on the chip carrier tape used in the production process of electronic products is ensured to be a non-defective product, the production quality of the electronic products is ensured, and the production efficiency of the electronic products is improved. And the effective efficiency is improved.

The invention relates to the technical field of packaging materials, and discloses a PC chip carrier tape packaging material and a preparation method thereof. The PC chip carrier tape packaging material is prepared from the following raw materials in parts by weight: 80 to 100 parts of polycarbonate, 15 to 30 parts of ABS (Acrylonitrile Butadiene Styrene) resin, 4 to 8 parts of ACR (Acrylonitrile Butadiene Styrene) resin, 2 to 6 parts of modified antistatic agent, 3 to 6 parts of modified scratch-resistant agent, 0.1 to 0.5 part of antioxidant 1010 and 6 to 10 parts of nano zinc oxide. The modified antistatic agent provided by the invention can realize lasting and stable antistatic performance of the PC material, and effectively avoid electrostatic adsorption of dust and impurities; the modified scratch-resistant agent provided by the invention can effectively reduce the friction coefficient of the material and reduce the friction loss of the carrier tape in high-speed transmission, winding and use processes, and forms synergistic protection with the modified antistatic agent.

A semiconductor device comprises a semiconductor chip and an electrically conductive chip carrier, wherein the semiconductor chip is mounted on the chip carrier. The semiconductor device furthermore comprises an electrically conductive extension element mechanically connected to the chip carrier, wherein the extension element and the chip carrier are formed as an integral single piece. A part of the chip carrier which has the extension element is configured as an antenna.

Provided in the embodiments of the present invention is a display device, which comprises: a display panel and a backlight module. The backlight module comprises: a driving substrate and a plurality of light-emitting devices. Each light-emitting device comprises: a chip carrier, wherein the chip carrier forms an accommodating space having a bottom and a side wall; at least two light-emitting chips, wherein the at least two light-emitting chips respectively emit light of different wavelengths, and the light-emitting chips are located at the bottom of the accommodating space inside the chip carrier; and an encapsulation unit provided in the accommodating space, wherein the encapsulation unit is arranged on the side of the light-emitting chips facing away from the bottom of the accommodating space inside the chip carrier, and the diameter of the side of the encapsulation unit close to the light-emitting chips is larger than that of the side of the encapsulation unit facing away from the light-emitting chips. In this way, the light emitted by the light-emitting chips can be converged toward a center, and is prevented from being directly emitted out and instead irradiated on a side wall of the encapsulation unit, such that the light can be further reflected or refracted, thereby achieving light mixing, improving a display effect, and enhancing the user experience.

This invention provides a molded power semiconductor package that improves the cooling of the source connection. [Solution] A semiconductor device 1 comprising a die carrier 7 and a first semiconductor die 9 having at least a first load electrode and a second load electrode, wherein the first semiconductor die 9 is mounted on the die carrier 7, the first load electrode is electrically connected to the die carrier 7, a first set 3 of external connectors is electrically and thermally connected to the die carrier 7, a second set 4 of external connectors is separated from the die carrier 7 and electrically connected to the second load electrode 10, and the overall wire size of the second set 4 of external connectors is larger than the overall wire size of the first set of external connectors.

A device package including a chip carrier having a cavity and one or more microwave waveguides configured to route signals. There is a chip including one or more pads and located within the cavity of the chip carrier. Each pad is aligned with a corresponding connector pad of a microwave waveguide of the one or more microwave waveguides of the chip carrier. At least one pad of the one or more pads is coupled to the connector pad of the corresponding microwave waveguide by way of an overlapping capacitive coupling between the at least one pad and the corresponding connector pad of the microwave waveguide with which the at least one pad is aligned.