41results about How to "Reduce core size" patented technology

A method for producing a high density inductor includes the steps of forming a coil having a spiral shape, sealing the coil in the interior of a core member, and forming a terminal electrode for allowing electric conduction to said coil on the outside of said core member. In this method, the coil is formed by repeating a process of forming a wire layer by means of a thin film forming process and a process of forming an additional wire layer on top of the wire layer by means of the thin film forming process to pile up the wire layers. With this production method, it is possible to form a coil with a high aspect ratio. In addition, the inductor is designed in such a way that the core member envelopes only the coil. With that design, it is possible to make the inductor compact.

A fiber optic apparatus formed by fusing together multiple optical fibers and stretching the fused optical fibers to form a tapered portion. The tapered portion is cleaved or cut and polished to form a facet at which an optical beam is received or transmitted.

Exemplary embodiments are directed to methods and systems for producing a three-phase current to a three-phase output. Switching converters are used to generate a positive current, a negative current, and an intermediate current. The system is configured such that the produced positive current follows a path of a highest phase of a sinusoidal three-phase signal at a given time, the produced negative current follows a path of a lowest phase of the three-phase signal at the given time, and the produced intermediate current follows a path of a phase of the three-phase signal between the highest and the lowest phase at the given time. The produced currents are switched to each phase conductor of the three-phase output in sequence so that phase currents of the three-phase current are formed in the output conductors.

A coil apparatus having a divided winding conformation and a manufacturing method of the coil apparatus which can prevent a winding from collapsing while achieving a reduction in size of a core and simplification of a structure. A coil apparatus includes a ferrite core and a coil provided around the core. The coil includes at least a first coil portion and a second coil portion, and a boundary end surface of the first coil portion on the second coil portion side is inclined in such a manner that its inner peripheral side is closer to the second coil portion than its outer peripheral side. Further, a boundary end surface of the second coil portion on the first coil portion side is inclined in such a manner that its outer peripheral side is closer to the first coil portion than its inner peripheral side.

The magneto-optical recording apparatus of the present invention comprises: a magnetic head of which one end is fixed and of which the other end is free and provided with a magnetic field generating portion for applying a magnetic field onto a magneto-optical recording medium; an optical pickup, provided opposite the magnetic head with the recording medium between them, for irradiating a portion applied with a magnetic field from the magnetic head with a light beam; and a member for regulating displacement of the magnetic head in a direction parallel to a magneto-optical recording medium surface.

A method of designing a memory device that has substantially reduced bitline voltage offsets is provided. The method includes providing a memory core having a depth that defines a plurality of words, and a word width that is defined by multiple pairs of a global bitline and a global complementary bitline. The method also includes designing a core cell having a bitline and a complementary bitline, and designing a flipped core cell that has a flipped bitline and a flipped complementary bitline. Further, the method includes arranging a core cell followed by a flipped core cell along each of the multiple pairs of the global bitline and the global complementary bitline. Preferably, the bitline of the core cell is coupled with the flipped complementary bitline of the flipped core cell, and the complementary bitline of the core cell is coupled to the flipped bitline of the flipped core cell.

This invention provides one magnetic double lowering semi-bridge inverter, which comprises inverter first arm, second arm, and magnetic couple induction composed of first and second couple filter induction. This invention adopts magnetic integration technique to roll magnetic parts into one common core through couple means and parameters setting to reduce parts volume and consumption.

The invention discloses a bridgeless double-Boost power factor correction rectifier for left-right alternating auxiliary current conversion. ZVS conduction of a main loop switch and an auxiliary loopswitch can be realized. A fully-controlled switch replaces a rectifier diode of a basic bridgeless circuit, and a main loop has two charging states. Two-way reset of exciting current is achieved through the auxiliary loops working alternately, and therefore the size of a transformer magnetic core is reduced. Coupling of the secondary winding of the transformer reduces the voltage stress of the auxiliary converter diode.

The invention relates to a three-winding parallel single-phase induction motor. A stator winding of the single-phase induction motor adopts a three-winding parallel connection mode, so when the single-phase induction motor operates under a rated load, the single-phase induction motor has an approximately symmetrical air gap field, has the efficiency closer to that of a same-capacity three-phase induction motor and higher power factor and is small in volume and light in weight. The single-phase induction motor comprises a shell, wherein a stator is arranged inside the shell; a rotor is arranged on a rotating shaft; the stator winding is divided into three phases A, B and C which spatially form an angle of 120 degrees respectively in turn; the phase B and the phase C are respectively connected in series with a respective capacitor; and the phase A is connected in parallel with the phase C and is reversely connected in parallel with the phase B to form a composite parallel branch so as to be connected to a single-phase power supply.

A micro-structured optical fibre precursor 1 is made by size reducing a multiple core optical fibre having solid multiple cores or a multiple core optical fibre preform O having multiple solid core preforms C. A fibre fuse is induced in at least one of the cores 2 of the precursor 1. The effect of the fibre fuse is to consume the core 2 along the whole length of the fibre or to consume periodically spaced lengths of core 2 along the whole length of the fibre.

A method, apparatus, computer program and computer program product for processing core data produced by a computer process to identify data relevant to the computer process, the method comprising the steps of: identifying core data for a computer process; identifying trace data comprising sequential trace entries for the computer process; selecting a predetermined number of most recent entries in the trace data; identifying any references to a memory address in each selected trace data entry; dereferencing each identified memory address in the core data; and extracting the data from the dereferenced memory location in the core data.

The invention relates to an N-phase power converter, an inductor element, and an inductor cut-off control method, wherein the converter has input-parallel and output-parallel N phase. The converter includes: N switch units, wherein each phase of the N-phase power converter includes one of the N switch units; and an integrated inductor unit including M inductor subunits, M being a natural number greater than or equal to 2, each inductor subunit including i inductors, i being a natural number greater than or equal to 2, and N>M*i or N=M*i. The M*i inductors in the integrated inductor unit are respectively coupled to the M*i switch units in the N switch units, wherein the i inductors of each of the inductor subunits are inversely coupled to each other, and a coupling coefficient of the M inductor subunits is smaller than the coupling coefficient of the i inductors in each inductor subunit.

The invention discloses an ET type filter inductor. The ET type filter inductor comprises a magnetic core, a framework, an enameled wire and pins. The two ends of the magnetic core and the two ends of the framework are connected through glue. The enameled wire is wound around the framework. The pins are arranged at the end of the framework. The magnetic core is made of ET24R10K. The framework is made of ET24PBT. The ET type filter inductor further comprises a base. The base is located at the end of the magnetic core and fixedly connected with the magnetic core. The pins are located at the lower end of the base. The maximum total length of the magnetic core is not larger than 34 mm. The ET type filter inductor is simple in structure, the size of the magnetic core is small, and the maximum resistance is not larger than 0.8 ohm. The maximum withstand voltage between coils and between the coils and the magnetic core is 1000 VAC / 1 min / 10 mA.

The invention relates to an LED driver. The LED driver comprises a first capacitor, a second capacitor, a transistor, a diode, an energy storage inductance unit and a control circuit board; two ends of the first capacitors are electrically connected with a power supply, two ends of the second capacitor are electrically connected with the load; a source electrode of the transistor is grounded through a resistor, a drain electrode is electrically connected with the first end of the second capacitor; the energy storage inductance unit comprises at least two energy storage inductors in series connection; a first connecting end of the energy storage induction unit is electrically connected with the second end of the first capacitor and the second end of the second capacitor, and a second connecting end of the energy storage induction unit is electrically connected with the drain electrode of the transistor; a control signal connecting end of the control circuit board is electrically connected with a grid electrode of the transistor. Through the LED driver disclosed by the invention, a magnetic core in each energy storage inductor of the energy storage induction unit is small, and the flattening arrangement can be realized, and then the height of the energy storage inductor can be reduced, and the height requirement of the flattened lamp is satisfied.

In the opto-electronic integrated circuit, an optical waveguide in which a sapphire substrate for an SOS substrate is formed as a lower clad and a silicon film is formed as a core, an electronic integrated circuit formed in the silicon film, and grooves for fixing optical fibers are formed monolithically. Further, a photodiode array and a laser diode array are mounted on a hybrid basis. Since the lower clad of the optical waveguide is used as the sapphire substrate and the core is used as the silicon film, a difference in refractive index can be made large sufficiently, thus resulting in thinning of the silicon film. It is therefore possible to shorten the time required to process the core and the like. Further, since the electronic integrated circuit is formed on the sapphire substrate, the high-frequency characteristics are enhanced.

The application provides a high-voltage pancake winding of a transformer; the winding comprises a low-voltage coil 1, an insulating barrel 2, comb type supporting strips 3, filler strips 4 and high-voltage coils 5, the distance between the low-voltage coil 1 and the insulating barrel 2 is a, the insulating barrel 2 and the comb type supporting strips 3 are fixed, the high-voltage coils 5 are arranged on comb teeth of the comb type supporting strips 3, and one comb tooth is provided with a cake 51 of one high-voltage coil 5; multiple wire cakes 51 of the high-voltage coil 5 are arranged, the wire cakes 51 are connected in series to form the high-voltage coils 5, the distance between the high-voltage coil 5 and the insulating barrel 2 is b, filler strips 4 are added into the head wire cakes 51 and the tail wire cakes 51 of the high-voltage coils 5, andin a direction from the head end wire cake 51 to the middle wire cake 51 and a direction from the tail end wire cake 51 to the middle wire cake 51, the thicknesses of the added filler strips 4 are gradually reduced, so that the distance a between the low-voltage coil 1 and the insulating barrel 2 and the distance b between the high-voltage coil 5 and the insulating barrel 2 can be reduced, the size of an iron core of the transformer is reduced, and the no-load loss is reduced.

The invention provides a DC circuit breaker energy supply system and a control method and device thereof. The energy supply system comprises a resonant capacitor of which the input end is connected with a low-frequency AC voltage source through a rectification circuit and the output end is connected with a resonant inductor through a switching circuit, wherein the resonant capacitor and the resonant inductor generate resonant current when the switching circuit is conducted and low-frequency alternating current is converted into high-frequency alternating current to be outputted; and an energytaking magnet ring which sleeves on an energy supply cable with the output end connected with a load for converting the high-frequency alternating current into the voltage meeting the load requirements to supply power to the load. Compared with the low-frequency energy supply mode, the low-frequency alternating current is converted into high-frequency alternating current to be outputted so that the size of the energy taking magnet ring can be reduced under the condition of meeting the same power supply requirement and then the size of the high voltage DC circuit breaker system and the cost ofthe system can be reduced.

The application relates to a fusion protein comprising an antibody molecule, or antigen-binding fragment thereof, and a member of the vascular endothelial growth factor family, such as VEGF-C or VEGF-D. The antibody molecule preferably binds an antigen associated with angiogenesis, such as the ED-A isoform of fibronectin. In particular, the application relates to the therapeutic use of such fusion protein in the treatment of an inflammatory disease or disorder.

The invention discloses a method, a device and a chip for reducing the core size of a nonvolatile flash memory. The method comprises the following steps: judging whether adjacent well regions with consistent working voltage exist on a chip or not, and removing the distance between the adjacent well regions with consistent working voltage if the adjacent well regions with consistent working voltageexist, so that the adjacent well regions with consistent working voltage are merged together; according to the technical scheme, the total area of a specific module region of the chip can be greatlyreduced, and the width-to-length ratio of the mos device does not need to be reduced, so that the problems of leakage current increase and breakdown voltage reduction caused by reduction of the width-to-length ratio of the mos device are avoided.

A pulse width modulator (PWM) of a multi-phase power converter is provided. The PWM includes a signal modulator that corresponds to each phase of the converter. Each signal modulator of the PWM is configured to receive a unique triangle carrier signal, receive a unique sine wave signal, compare the received triangle carrier signal and the received sine wave signal, and output at least one control signal based on a result of the comparison. The control signal controls an inverter that applies pulse width modulation to a DC power for converting the DC power to a multi-phase power, AC harmonics of the multi-phase power filtered by a common mode inductor.

The present disclosure relates to an N-phase power converter, an inductance element, and an inductance cut-off control method, wherein the converter has N phases with parallel inputs and parallel outputs, and the converter includes: N switching units, wherein the N Each phase of the phase power converter includes one of the N switching units; and an integrated inductance unit, the integrated inductance unit includes M inductance subunits, M is a natural number greater than or equal to 2, and each inductance subunit includes i inductances, i is a natural number greater than or equal to 2, and N>M*i or N=M*i, the M*i inductances in the integrated inductance unit are respectively coupled to the inductances in the N switch units M*i switch units, wherein: the i inductances of each inductance subunit are inversely coupled to each other, and the coupling coefficient between the M inductance subunits is smaller than the i in each of the inductance subunits The coupling coefficient between the inductors.