2021 results about "Auxiliary circuit" patented technology

A detachable cartridge unit and an auxiliary unit combined forms a functional component for a data processing system. The cartridge unit is configured to receive a variety of auxiliary units in order to form different functional components and perform different functions. The circuit board of the cartridge unit contains circuits and components common to each functional component. The auxiliary unit contains components and circuits unique to the function that the auxiliary unit represents. The cartridge unit comprises a circuit board, a housing containing the circuit board, a first connector coupled to the circuit board for connecting to a data processing system, a second connector coupled to the circuit board, and a grip movably connected to the housing with a hinge. The auxiliary unit includes an auxiliary circuit board, an auxiliary connector coupled to the auxiliary circuit board for detachably connecting to the second connector, an auxiliary housing containing the auxiliary circuit board, a guide for guiding the auxiliary connector to connect to the second connector via a predetermined path, and an auxiliary grip movably connected to the auxiliary housing with a hinge.

The invention relates to a super capacitor energy storage type power quality compensator. A system structure comprises a compensation transformer, a series compensator, a parallel compensator, a super capacitor group, a current foldback circuit, a bidirectional DC / DC chopper circuit, a signal sampling circuit, a control circuit, a drive circuit, a human-computer interface and corresponding auxiliary circuits, which form a three-phase three-wire system topological structure. By utilizing the excellent characteristics of great power density, high charging and discharging speed and long cycle life of a super capacitor, the super capacitor energy storage type power quality compensator is matched with the DC / DC chopper circuit to form an energy storage control system which plays the roles of adjusting power and stabilizing the voltage of a direct current bus in work. The invention also has the functions of dynamic voltage recovery, active filter and reactive compensation and can ensure that a load can obtain rated sine voltage and the current of a grid is sine current with the same direction (unit power factor) with that of a voltage fundamental wave positive sequence active component, thereby comprehensively improving the quality of power. The invention has positive generalization and application value for both the public grid and users.

A driving device of a work machine includes a power generator adapted to be driven by an engine, and a power storage device for storing the electric power generated by the power generator. Electric motors and a motor generator, both adapted to be operated by electric power supplied from either one or both of the power generator and the power storage device respectively drive pumps and a pump motor. Supporting circuits for feeding supporting hydraulic oil are provided between a plurality of driving circuits that drive a plurality of hydraulic actuators of a working unit by oil hydraulics generated by the pumps and the pump motor. By enabling the plurality of driving circuits to effectively share excess energy, the invention makes possible a compact construction of a driving device of a work machine.

A multi-port rotary valve used to distribute coolant to an engine cooling system comprises a valve body having a plurality of outlet ports for directing coolant flow to a radiator circuit, a heater circuit, and an auxiliary circuit. An internal gear driven rotary disc includes a gear driven mechanism located on an inner circumference of the rotary disc. The rotary disc includes two apertures positioned on a top surface of the rotary disc for regulating predetermined flow paths and flow rates to the plurality of ports. An inlet housing body which includes an inlet port mates with the valve body and encases the rotary disc. An actuator which is coupled to a drive gear mounted internal to the inlet housing body is responsive to a control signal for transmitting a torque to the internal drive gear for rotating the rotary disc to regulate coolant flow.

The invention relates to the field of mobile equipment and discloses a method and a device for sharing a Micro-USB interface. In the method and the device for sharing the Micro-USB interface provided by the invention, a headphone interface, a USB data transmission interface, a charging interface and a UART interface for downloading and updating mobile phone software are multiplexed to a five-pin Micro-USB interface through two single-pole three-throw analog switches and certain auxiliary circuits; the functions of headphone, USB data transmission, charging and the downloading and updating of the mobile phone software can be realized on the Micro-USB interface, namely, a headphone interface, a USB data transmission interface, a charging interface and the UART interface for downloading and updating the mobile phone software are combined into a Micro-USB interface with a very small size, which realizes four complex functions. Due to the adoption of the method and the device for sharing the Micro-USB interface, valuable space for a mobile phone is saved, a smaller handheld terminal with a simple structure and low realization cost is designed conveniently.

The functionality of electronic convertors for low voltage filament lamp applications, such as halogen lamps, can be increased by including auxiliary circuits. Such auxiliary circuits may include gate drive resistors; a charge pump for sustaining the DC supply; open circuit protection; short circuit protection; thermal protection; extended resetting time; latched shutdown; self-dimming; a digital (DALI) interface; and line voltage compensation.

A memory circuit for reading and writing data into a SRAM memory array using charge recycling is presented. The write and read circuit includes a cell voltage level switch, a recycle charge storage, a precharge switch, a write enable switch, and column decoder. The cell voltage level switch is connected to a low power supply and a high power supply and has two states of operation: a write operation state and a read operation state. For each state of operation, the voltage level switch selectively provides a power supply if a column has been selected or if the operation is a read or write. The recycle charge storage stores excess charge from SRAM cells after a read operation or after a write operation in unselected columns. After the read or write operation, the recycle charge storage discharges excess charge to the bitlines during bitline precharging.

A switch power supply with standby function is disclosed. The power supply can satisfy the need of the green environment protection. And a single ended green switch power supply IC or thick film or modular circuit design with standby function is disclosed, too. It comprises a standby power supply, a main power supply, a PFC device, and a supplemental circuit, wherein a remote control signal is transmitted to main control circuit in response to a main error signal to control main power supply. A method for preventing switch power current from overload and saturation is disclosed too. Finally, the present invention also provides a green power supply with standby function as well as its IC associated with digital processing highly qualified PFC, and a PC standard (such as ATX, ATX12, SSI) computer switch power supply.

A main circuit of a three-level active neutral point clamped voltage source converter having a pair of additional main switches provides two paths between an output node and a neutral point in which one of the paths involves only switches of an inner pair of switches that are operated at a high frequency. An auxiliary circuit operating at a high frequency for only a brief period during each high frequency switching cycle selects the path involving only the inner switches and provides operation with zero voltage switching and avoids reverse recovery of diodes connected antiparallel with the main and additional main switches. Accordingly, turn-on switching losses in the main switches is avoided and the voltage source converter can be operated at increased frequency to allow reduction in size of magnetic components and full potential power transfer to be achieved.

A method of writing data to a selected column of a memory includes selecting a first column. The data writing is initiated by applying a logic high to a first bit line of the first column and a first potential to a second bit line of the first column that is lower than the logic high. The first potential is removed and a second potential is applied to the second bit line. The second potential is less than the first potential. The first potential may be ground, and the second potential may be a negative voltage. Reducing the write voltage for the bit line that is receiving a logic low improves its ability to be written. By first bringing the logic low to the first potential, which may be ground, and then further reducing the applied voltage, the requirements on the source of the second potential are reduced.

A video processor for endoscopic camera or for videoendoscopic probe associated with a color video sensor, the video processor comprising: a signal preprocessing circuit designed to be remotely connected to the video sensor through an electrical link without any intermediate connection device, the preprocessing circuit comprising a first signal processor for generating from image signals output by the video sensor raw video signals comprising a brightness signal and a color signal, these signals being not usable directly because they are phase shifted and are noisy due to synchronization residues, and a synchronizing circuit for synchronizing the video sensor and the first signal processor; and a remote auxiliary circuit comprising a second signal processor connected to the first signal processor through a low impedance electrical link providing good immunity to interference, the second signal processor generating from said raw video brightness and color signals at least one useful video signal according to an international video standard.

Circuits and methods that improve linearity with use of cancellation of at least a portion, and preferably, substantially all of, at least one significant harmonic from the output of a primary circuit, e.g., the 3.sup.rd harmonic, using the output of a substantially functionally identical auxiliary circuit.

The invention relates to a digital control device and method for an LLC (logical link control) synchronously-rectified resonant converter. The device comprises a digital signal processor, a primary high-frequency driving circuit, a current sampling detection circuit, a voltage sampling detection circuit and a secondary high-frequency driving circuit, wherein the digital signal processor judges an operation area of a circuit according to an output voltage fed back by the voltage sampling detection circuit, after the circuit performs three-pole two-zero compensation, the values of an on-chip period register are respectively changed so as to generate high-frequency driving signals which are then output to the primary and secondary high-frequency driving circuits by the digital signal processor; the current sampling detection circuit detects a secondary output current which is then output to the digital signal processor, then the digital signal processor judges whether an overloading or overcurrent phenomenon (generated in the process of area switching) occurs according to the size of the current so as to cut off the primary and secondary high-frequency driving circuits in time. In the invention, the LLC resonant converter is subjected to the following digital control by a digital signal processing chip-peripheral timer combined circuit: the advanced conduction of secondary synchronous rectifying tubes is realized by the design of software / hardware auxiliary circuits, and the control on secondary driving signals is performed by adding a 555 timer, so the application of a timer in a DSP (digital signal processing) chip is reduced, thereby effectively solving the problem of conduction loss of synchronous rectifying tubes introduced in the process of underloading in the traditional control strategy; and the application of a PWM (pulse-width modulation) port of the digital signal processing chip is reduced, thereby improving the reliability of the whole device.

A soft-switched, full-bridge pulse-width-modulated (FB PWM) converter and its variations provide zero-voltage-switching (ZVS) conditions for the turn-on of the bridge switches over a wide range of input voltage and output load. The FB PWM converters of this invention achieve ZVS with a substantially reduced duty cycle loss and circulating current, which optimizes the conversion efficiency. The ZVS of the primary switches is achieved by employing an auxiliary circuit comprising an inductor and transformer to store energy for ZVS turn-on of the bridge switches.

A battery system includes a plurality of battery modules each including a plurality of battery cells. One battery module includes a main circuit board, and the other battery modules include auxiliary circuit boards. The main circuit board includes a cell characteristics detecting circuit that detects characteristics of each battery cell and a control-related circuit having a function related to control of the plurality of battery modules. The auxiliary circuit board includes a cell characteristics detecting circuit that detects characteristics of each battery cell, and does not include a control-related circuit having the function related to control of the plurality of battery modules. In a battery module of another battery system, a first printed circuit board, a board holder and a second printed circuit board are attached to one end surface frame. A voltage detecting circuit that detects a voltage between terminals of each battery cell and a communication circuit having a communication function are mounted on the first and second printed circuit boards, respectively.

A method and apparatus for providing portable ground power for aircraft. A ground power unit includes a lithium ion cell battery assembly and a standard three-pin aircraft ground power connector integrated into a single unit and packaged inside a ruggedized plastic housing with a carry handle, thereby eliminating the heavy and bulky power cables between the battery and connector. A battery management unit sets charge / discharge limits and provides monitoring of state of charge, health, and function. A charging connector and charging circuitry with user-selectable regulated charging limits allows simultaneous charging and discharging operations and connection into aircraft auxiliary circuits. A ganging station is provided to electrically combine the outputs of several ground power units in parallel for starting larger aircraft.

The invention discloses method and device of sharing a minitype USB interface for a UART and a USB, relating to the field of mobile equipment. The method and device of sharing the minitype USB interface for the UART and the USB are characterized in that a USB data transmission interface, a charging interface and a UART interface downloaded and updated by mobile phone software are skillfully multiplexed to a five-pin Micro-USB interface through two single-pole double-throw analogue switches and certain auxiliary circuits, and a USB data transmission function, a charging function and a mobile phone downloading and updating function can be achieved on the same one Micro-USB interface, i.e. a charger, a USB data transmission line and the UART interface are combined in one; three complicated functions are achieved by the Micro-USB interface with very small dimensions, thereby saving valuable space for a mobile phone and being convenient for designing a smaller-size hand-held terminal, and moreover, the device has simple structure and low implementation cost.

An arrangement for measuring current through a phase section of a buck mode DC-DC converter includes an auxiliary integrated circuit containing an auxiliary power MOSFET and a pilot MOSFET coupled in parallel with a current path through a high side MOSFET of a half-bridge of the converter. The pilot MOSFET has a current path coupled to a current measurement terminal. The MOSFETs of the auxiliary circuit are time division multiplexed with the high side MOSFET, whereby a determination of current through the auxiliary high side MOSFET is based upon current through the pilot device and the geometric ratio of the size of the pilot device to that of the high side auxiliary MOSFET. The high side MOSFET is activated for a large number of switching cycles relative to the pilot circuitry, but the pilot circuitry is activated sufficiently often to derive a relatively accurate measure of current flow.

A hydrostatic driveline for a vehicle, a method for minimizing a fuel consumption rate of the vehicle, and a method for tracking an optimal state of charge function for a hydrostatic accumulator are provided. The driveline includes a power source, a drive axle, a first fluid accumulator, a second fluid accumulator, an auxiliary circuit including a first pump drivingly engaged with the power source, and a drive circuit including a second pump drivingly engaged with the power source, a motor drivingly engaged with the drive axle, and a directional valve. The second pump is in fluid communication with the directional valve and the directional valve in fluid communication with the first fluid accumulator and the second fluid accumulator. The directional valve may be selectively controlled to direct fluid from the second pump and the motor to the first fluid accumulator and the second fluid accumulator.

The invention relates to a multifunctional data acquisition module based on a compact peripheral component interconnect (CPCI) bus. The multifunctional data acquisition module comprises a hardware module and a field-programmable gate array (FPGA) program. The hardware module comprises an impedance control circuit board, an electronic component, a small computer system interface (SCSI100) signal connection socket, a standard CPCI bus connector, and a standard 3UEurocard front panel. The impedance control circuit board and the electronic component are the core functional carriers of the invention and are divided into eight functional units such as an analogue-digital (AD) conversion module, a digital-analogue (DA) conversion unit, a timer unit, a counter unit, a universal input-output (IO) unit and an auxiliary circuit unit. The FPGA program comprises an AD conversion module, a DA conversion module, a timer module, a counter module and a universal IO module and is programmed and developed by Verilog hardware description language (HDL). The multifunctional data acquisition module has steady performance, high reliability, high bus signal driving capability, far transmission distance, simple structure, powerful function, high cost performance, is convenient to use, and can perform long-term and continuous mass data transmission.

A resonant power converter is provided with auxiliary circuit branches and control circuitry for switchably coupling the auxiliary branches to resonant circuit components during holdup times. Auxiliary branches are coupled in parallel with any one or more of a resonant inductor, a resonant capacitor, and a magnetizing inductive winding via respective switches. When a holdup time condition is detected in accordance with, for example, a drop in the mains line voltage, the switches are controlled to adjust the corresponding inductance or capacitance for the duration of the holdup time condition or otherwise for a predetermined duration. The power converter in normal operation is configured for high efficiency and in a holdup time operation is configured to produce sufficient holdup time.

An integrated circuit memory includes memory cells 2 is connected to a power supply Vdd via a power supply control circuit 4. The power supply control circuit includes a first gate 26 and a second gate 28. The first gate 26 is switched by a write assist circuit so as to be non-conductive when writing to the memory cell 2. The second gate 28 is conductive both when writing to the memory cell 2 and when not writing to the memory cell 2. Accordingly, when a write operation is made a relatively high resistance path is formed through the power supply control circuit 4 compared to when writing is not being performed. This increase in the resistance through the power supply control circuit 4 during write operations induces a dip in the virtual supply voltage provided at the supply output of the power supply control circuit 4 in a manner which assist writes to be made. If individual memory cells 2 tend to resist changes in their state more strongly, then they will tend to draw more current which will in turn result in a larger virtual supply voltage dip which will assist more strongly in encouraging those memory cells 2 to change state.

A small and efficient DC-DC converter is provided. In this DC-DC converter, passive elements such as an inductor and a capacitor can be reduced in size by reducing switching loss by a soft switching technology and increasing the drive frequency of a switching element. The DC-DC converter has a main switching element, a main diode and an auxiliary circuit that discharges the electric charges of the capacitance between the ends of the main switching element. The DC-DC converter includes an auxiliary inductor magnetically coupled with the main inductor, an auxiliary switching element that stores energy in the auxiliary inductor, and an auxiliary diode that discharges energy stored in the auxiliary inductor to the direct-current power source or the output side. The auxiliary inductor is coupled with the main inductor in the direction in which backward voltage is applied to the auxiliary diode when the main inductor discharges energy.

The invention discloses a low dropout linear regulator. Aiming at the problem of complicated structure of the existing low-dropout linear regulator, the LDO of the present invention includes an error amplifier, a feedback sampling network, a bias circuit and a slew rate enhancement circuit, and is characterized in that a part of the slew rate enhancement circuit is included in the error amplifier Among them, the error amplifier includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, and a fourth NMOS transistor; wherein the first NMOS transistor and the second NMOS transistor serve as slew rate enhancement As a component of the circuit, the slew rate enhancing circuit further includes a first capacitor and a second capacitor. The voltage stabilizer of the present invention constitutes a slew rate enhancement circuit through two NMOS transistors and two capacitors, does not require too many additional auxiliary circuits, has a simple structure and low power consumption, and can be applied without reducing performance. Under low voltage, it has extremely fast transient response.