721 results about "Digital signal processor" patented technology

The invention discloses an unmanned aerial vehicle radio communication frequency band countering method for automatic frequency identification and frequency writing, and relates to the technical field of unmanned aerial vehicle interference, and the method comprises a frequency band identification module which is used for scanning a 300MHz-6GHz frequency band in real time and identifying an enemy unmanned aerial vehicle communication signal; the signal analysis module is connected with the frequency band identification module, comprises a digital signal processor and an FPGA (Field Programmable Gate Array), and is used for analyzing signal modulation types and spectrum characteristics; the automatic frequency writing module is used for adjusting an interference frequency band through a direct digital frequency synthesis technology according to an analysis result; the multi-frequency-band interference transmitter supports synchronous interference in frequency bands of 1.2 GHz, 2.4 GHz, 5.2 GHz and 5.8 GHz; the intelligent control terminal integrates an adaptive interference algorithm, and the response time is less than or equal to 1 second. According to the unmanned aerial vehicle radio communication frequency band countering method capable of automatically identifying and writing the frequency, the radio communication frequency band used by the enemy unmanned aerial vehicle is automatically identified, and the corresponding frequency band is written in real time for accurate interference, so that the interference effect of an interference system facing the enemy unmanned aerial vehicle is improved.

The invention relates to the technical field of power equipment state detection, in particular to an ultrahigh-frequency partial discharge online detection system, method and device and a medium, and the system comprises the steps: collecting an initial discharge signal in real time through an ultrahigh-frequency sensor array, and carrying out the preprocessing of the initial discharge signal, so as to obtain an ultrahigh-frequency discharge signal; carrying out peak detection on the ultrahigh-frequency discharge signal, and triggering a high-speed analog-to-digital converter to collect an original waveform when the amplitude exceeds a preset threshold value; performing multi-dimensional feature extraction on the original waveform by using a digital signal processor to obtain multiple groups of dimensional features; identifying and classifying the multiple groups of dimension features based on a random forest algorithm, generating discharge type labels and confidence coefficients, and storing the discharge type labels and the confidence coefficients in a dynamic database; carrying out spatial position calculation on the ultrahigh-frequency discharge signal by adopting a time difference method, and determining a three-dimensional coordinate of a discharge source; the dynamic database and the three-dimensional coordinates of the discharge source are subjected to space-time correlation and multi-dimensional analysis, a defect analysis result is generated, and high-precision online detection of the partial discharge defect of the high-voltage equipment is achieved.

Workloads for executing a graph neural network (GNN) may be divided among various processing units, such as a central processing unit (CPU) and a neural processing unit (NPU). The NPU may include a data processing unit (DPU) and a digital signal processor (DSP). The CPU may perform precomputation, model optimization, hardware optimization, and compilation. For example, the CPU may precompute a parameter matrix and use the parameter matrix as internal parameters of a GNN. The CPU may also perform node padding, approximation computation, or transfer of DSP operations to DPU to optimize the GNN. The CPU may also perform sparsity data compute and storage, vertical fusion of DSP operations and DPU operations, or data quantization to optimize performance of the NPU. The compiled GNN may be provided to the NPU, and the DPU and DSP may perform the operations in the compiled GNN to produce a prediction of the GNN.

The invention relates to the technical field of integrated circuits, and provides a clock domain crossing synchronization circuit and method based on a multiphase clock, and the circuit comprises a selector, an asynchronous clock synchronization module and a digital signal processor. Wherein serial data to be transmitted and a low-frequency clock are input into the selector, and the selector is used for outputting corresponding RX parallel data to the asynchronous clock synchronization module according to the serial data and the low-frequency clock; the asynchronous clock synchronization module is used for outputting corresponding alignment data to the digital signal processor according to the input RX parallel data, the clock of the digital signal processor and the low-frequency clock; the asynchronous clock synchronization module is used for performing phase alignment on the RX parallel data and a clock of the digital signal processor; and the digital signal processor is used for carrying out data processing on the alignment data. According to the invention, stable transmission of low-delay cross-clock domain data can be realized.

The invention relates to the technical field of power supplies, and discloses a high-precision power supply control method based on a digital signal processor, which comprises the following steps of: acquiring data such as voltage, current, temperature, load parameters and the like of a power supply at a high frequency of kHz-level sampling frequency by using a high-precision sensor, transmitting the data to a DSP (Digital Signal Processor), and removing noise interference by applying wavelet transform. Sample quality is improved through high-frequency data acquisition and wavelet denoising, nonlinear and time-varying characteristics of a power supply system are identified by using a lightweight CNN and an LSTM, a reinforcement learning dynamic optimization control strategy is combined, self-adaptive switching between traditional control and an intelligent algorithm is realized through working condition identification, and the power supply system control method based on the LSTM is realized. The problems that noise interference influences data quality, system characteristic recognition is inaccurate, complex working condition control strategy optimization is insufficient, and output precision is unstable due to the fact that a control mode cannot be switched in a self-adaptive mode in an existing power supply can be effectively solved, and control precision, efficiency and device loss can be considered. And the stable operation requirement of the high-precision power supply under multiple working conditions is met.

The invention discloses an automatic control method and system for a bias point of a photoelectric modulator, and relates to the field of signal processing, and the method comprises the steps: generating a composite disturbance voltage signal through a digital signal processor; the bias electrode is injected into the photoelectric modulator and used for collecting the optical signal output by the photoelectric modulator and converting the optical signal into an electric signal; extracting a fundamental component amplitude and phase difference data of a second harmonic component, a third harmonic component and a fundamental wave; dynamic characteristic parameters are calculated through spectral analysis, and the mapping relation between the characteristic parameters and the offset of the offset points is established; outputting the offset direction and the offset level of the offset point through a deep learning model; a bias voltage compensation amount is generated through a fuzzy PID (Proportion Integration Differentiation) controller; and adjusting the bias electrode voltage, smoothing the filter, and eliminating high-frequency jitter. The method has the advantages that high-precision and stable bias point adjustment is realized through the composite disturbance signal, real-time spectrum analysis and deep learning optimization decision in combination with fuzzy PID control and a dynamic closed-loop mechanism, and the system performance and stability are remarkably improved.

The invention discloses a frequency division control radio frequency power supply solid-state impedance matcher and a method thereof, and aims to solve the problems that a traditional mechanical impedance matcher is slow in response, low in adjustment precision and difficult to adapt to a dynamic load. According to the system, an all-solid-state impedance matcher is adopted, impedance dynamic adjustment is achieved through a matching network composed of an adjustable inductance module and a switched capacitor module, closed-loop control is constructed in combination with a radio frequency signal detection module and a digital signal processor, and a frequency division control strategy is adopted, and the high-frequency band realizes high-precision matching through a control strategy of coarse adjustment of the adjustable inductance module and fine adjustment of the switched capacitor module. The device has the advantages of high response speed, wide frequency band coverage and the like, and is particularly suitable for industrial plasma application scenes with remarkable dynamic impedance characteristics.

The invention discloses a dual-redundancy servo controller and a main-standby autonomous switching method thereof, and belongs to the technical field of electric servo control. The controller comprises a host machine and a standby machine; each of the host and the standby machine comprises a DSP (Digital Signal Processor), an FPGA (Field Programmable Gate Array), a hardware ID (Identity) identification module, a motor power driving IPM (Intelligent Power Module) and a generator tripping instruction module which are in signal connection; the DSP and the FPGA are respectively connected with an LDO (Low Dropout Regulator) power module; the FPGA is in communication connection with the control system; the motor power driving IPM is connected with the execution mechanism; the DSP processors of the host and the standby machine are in signal connection; and the switching instruction modules of the host and the standby are in signal connection. The invention discloses a main / standby autonomous switching method for a dual-redundancy servo controller, which adopts a DSP and an FPGA to cooperatively detect and process faults, improves the fault detection rate by 5%, and reduces the possibility that the output of an IPM module is not turned off by 20% when a fault occurs; three heterogeneous redundant generator tripping modes of hardware generator tripping, serial port generator tripping and heartbeat generator tripping are adopted, and the reliability of main and standby independent generator tripping is improved by 20%.

The invention relates to the field of radio measurement, in particular to a radio height simulation device and method. The radio height simulation device comprises a fixed attenuator, a photoelectric conversion module Tx, a first optical path control member, a second optical path control member, a photoelectric conversion module Rx, a numerical control attenuator and a host. One end of the fixed attenuator is connected with the radio altimeter, one end of the photoelectric conversion module Tx is connected with the fixed attenuator, the other end of the photoelectric conversion module Tx is connected with the first optical path control element, the first optical path control element is externally connected with at least one optical fiber, and the optical fiber is connected with the second optical path control element; according to the invention, the dependence on a digital signal processor and a long-distance radio frequency cable is reduced, the hardware cost is reduced, the radio altimeter can be tested according to the radio height simulation device, the device can be calibrated by using a vector network analyzer, and the accuracy of height simulation is further ensured.

A digital signal processing (DSP)-based serializer-deserializer (SERDES) includes a first filter configured to mitigate inter-symbol interference (ISI) attributed to dispersion associated with a long-reach transmission medium. The SERDES includes a second filter configured to shape the ISI. The SERDES includes also includes a third filter coupled in parallel with the second filter and configured to reduce ISI attributed to reflections associated to both near-zero delays and long delays.

The invention discloses a parallel constant-voltage digital audio power amplifier and a broadcasting system. Comprising a line input module, a line output module, a first analog-to-digital conversion circuit, a second analog-to-digital conversion circuit, a third analog-to-digital conversion circuit, a digital signal processor, a single-chip microcomputer, a digital-to-analog conversion circuit, an error comparator, a modulator, an integrating circuit, a pulse width modulation input half-bridge output stage, and a first carrier frequency selection and gain adjustment module. A second carrier frequency selection and gain adjustment module, a first LC filter, a high-frequency compensation network, a communication bus and a power switch. The technical problems that an existing multi-channel parallel digital constant-voltage power amplifier is only limited to power amplifier channels in the same power amplifier, the parallel connection mode only uses the first channel as a main power amplifier and only uses the other channels as slave power amplifiers, and certain limitation exists are solved.

The invention provides a simulation method and system with controllable split-phase voltage drop time difference, and relates to the technical field of electric power testing, and the method comprises the steps: adjusting voltage through a three-phase voltage regulator, employing a bidirectional silicon controlled rectifier and IGBT hybrid switch structure to achieve voltage drop, collecting and processing a three-phase voltage signal through a digital signal processor, and extracting zero crossing point information; and a control pulse signal with phase compensation is generated, the conduction time sequence of the switch element is controlled to realize soft switching, and the industrial computer receives and processes the signal and displays a voltage drop waveform. The split-phase voltage drop time difference can be accurately controlled, and the simulation precision and the system reliability are improved.

The invention discloses an optical fiber signal transmission system and method based on quantum noise encryption, and relates to the technical field of optical fiber communication, and the system comprises a composite modulation transmitting module, a dispersion compensation relay module, a coherent receiving module and a digital signal processor. The composite modulation transmitting module comprises an electro-optical modulator and a quantum noise randomization encoder; the dispersion compensation relay module comprises an adjustable dispersion compensator and a Raman amplifier; the coherent receiving module comprises a local oscillator laser and a 90-degree optical mixer; a digital signal processor includes a clock recovery unit and a maximum likelihood sequence detector. All the modules are sequentially connected and cooperatively work. And the adjustable dispersion compensator dynamically applies reverse dispersion compensation calculated based on a dispersion coefficient and a transmission distance according to the dispersion amount monitored in real time. According to the invention, through technologies of quantum noise encryption, dynamic dispersion compensation, Raman amplification, coherent reception and the like, safe and efficient transmission with single-wave 400Gbps and 100km transmission bit error rate less than or equal to 1 * 10 <-12 > is realized.

The invention relates to the technical field of communication, and discloses a dual-mode communication unit relaying and signal amplifying device, which comprises a signal receiving module comprising an HRF wireless receiving channel and an HPLC power line coupling channel which are independently configured, the working frequency band of the HRF wireless receiving channel is 470-510MHz, the receiving sensitivity is not lower than-120dBm, and the working frequency band of the HPLC power line coupling channel is 470-510MHz; the HPLC coupling channel supports a frequency band of 0.7-12 MHz and has an impedance matching range of 20-200 omega, the two channels alternately scan input signals in a time division multiplexing mode, and the signal processing module is integrated with a digital signal processor and field programmable gate array cooperative processing architecture and is internally provided with a signal type identification circuit. According to the device for relaying and amplifying the signals of the dual-mode communication unit, the HRF signals and the HPLC signals are automatically distinguished through fast Fourier transform spectrum analysis, an HRF wireless receiving channel and an HPLC power line coupling channel are integrated, a repeater is installed in an area where HRF signal transmission is not good, the repeater can process the HRF signals and the HPLC signals at the same time, and the signal transmission efficiency is improved. And real-time receiving and efficient transmission of dual-mode signals are realized.

Some embodiments are directed towards a multiple-input multiple-output (MIMO) receiver system for use with N antennas. The receiver system includes: an analog combiner assembly comprising a matrix of vector modulators applying gain and phase shift to each of N signals being received from the respective antenna and combine said N signals into P corresponding signals, P<N; an array of ADC units, each performing quantization of a respective one of said P corresponding signals with a predetermined bit constrain; and a signal recovery system. The signal recovery system can include a digital signal processor performing task-specific recovery of selected K signals, arriving on the antennas in predetermined input directions, from quantized and filtered digital representation of the N signals being received by the analog combiner assembly; and a control unit. The control unit is adapted to utilize optimized operational data to operate the analog combiner and the digital signal processor.

Linear unretimed interfaces lack clock and data recovery and retiming circuits implemented on a sophisticated digital signal processor. When the interface is not a retimed interface, it can be especially useful to extract some information about the link to allow for debugging and optimization of system deployment. An efficient solution can be implemented in unretimed interfaces to compute metrics such as the impulse response and signal histogram. Having the metrics allows for the solution to check and monitor the quality and the status of the link. Based on the link quality and status information, it is possible to address non-idealities and optimize performance of the unretimed interfaces and the link.

The invention relates to the technical field of intelligent power regulation, discloses a charger control method and system based on intelligent power regulation, and dynamically adjusts a power distribution strategy by monitoring equipment power consumption and a battery state in real time. The method comprises the following steps: firstly, acquiring an equipment power consumption curve and a battery health index, judging the priority of a power consumption demand and a charging demand according to a preset threshold value, determining a preliminary power distribution scheme, optimizing power distribution by adopting a pulse width modulation technology and a digital signal processor according to the actual conditions of equipment and a battery, and generating a frequency-coordinated power control signal; and finally, calculating progressive power transfer parameters among multiple energy paths through a proportional-integral-differential control algorithm to realize smooth power transfer, and processing feedback data by using an adaptive filtering algorithm to ensure stable power output. Intelligent power balance between equipment operation and battery charging can be achieved, the energy utilization efficiency is effectively improved, the service life of the battery is prolonged, and stable operation of equipment is guaranteed.

The invention discloses a reconfigurable heterogeneous radar data computing module and computing device, and relates to the technical field of computing devices, the reconfigurable heterogeneous radar data computing module comprises a ZYNQ processor, a digital signal processor (DSP) and a neural processing unit (NPU), the ZYNQ processor is connected with the DSP and the NPU; the ZYNQ processor comprises an ARM processor and an FPGA (Field Programmable Gate Array) logic resource; the FPGA logic resource is used for carrying out parallel class algorithm processing on the radar data; the DSP is used for carrying out serial algorithm processing on the radar data; the NPU is used for performing artificial intelligence algorithm processing on the radar data; the ARM processor is used for scheduling FPGA logic resources according to the calculation tasks, and the DSP and the NPU execute corresponding algorithms. According to the reconfigurable heterogeneous radar data calculation module, the high-performance calculation requirement can be met.

The invention provides a laser feedback adjusting method and system based on pulse waveform monitoring, and the system comprises a beam splitter and a detector which are disposed in a laser, the beam splitter splits the laser outputted by the laser into a main output light beam and a monitoring light beam, and the detector carries out the photoelectric conversion of the monitoring light beam to obtain a monitoring electric signal; the positive end of the comparator is connected with a monitoring electric signal, and the negative end of the comparator is connected with a periodically circulating reference voltage threshold signal so as to output a digital waveform signal containing pulse width modulation information; the FPGA processing unit calculates a waveform reconstruction parameter in real time according to the digital waveform signal based on a TDC digital time conversion technology, and generates a reconstructed waveform; the digital signal processor performs deviation analysis on the reconstructed waveform and the target waveform to obtain a deviation analysis result; and the FPGA processing unit generates a feedback control quantity according to the deviation analysis result so as to adjust the laser based on the feedback control quantity in the next feedback period to realize accurate tracking of the output waveform of the laser on the target waveform.

An optical sighting device includes an eyepiece positioned to receive optical radiation along an optical axis to produce a real exit pupil located remote from the eyepiece. The real exit pupil is positioned at an eye relief distance from the eyepiece along the optical axis. A digital signal processor determines an axial distance from the eyepiece to an eye positioned proximate the real exit pupil along the optical axis. An aperture stop is centered along the optical axis to direct the optical radiation in a direction of the eyepiece. The eye relief distance is based at least in part on a position of the aperture stop along the optical axis. The optical sighting device further includes an eye relief actuator to translate the aperture stop along the optical axis to null a spatial offset between the eye relief distance and the axial distance to the eye.

The invention belongs to the technical field of digital signal processors, and particularly relates to a non-intrusive real-time monitoring debugger for a DSP (digital signal processor). The real-time monitoring debugger comprises a bus monitoring module and a tracking buffer module, and the bus monitoring module and the tracking buffer module jointly complete debugging and obtain real-time operation information. The bus monitoring module is used for monitoring the memory access operation of the DSP, and meanwhile, the tracking buffer module is used for recording execution tracks of a program before and after an event, so that comprehensive and accurate debugging information is provided for a system, and problems occurring in the running process of the DSP can be quickly positioned and solved, and the debugging efficiency is improved; in addition, by arranging a special register, high configurability is achieved, so that monitoring and recording strategies can be flexibly adjusted according to different debugging requirements, and the debugging process is more targeted and efficient.

Technology is disclosed for an optical receiver. The optical receiver may include an optical and digital signal processing (ODSP) device. The ODSP device may include a photodiode operable to convert an optical signal to an electrical signal; a digital signal processor operable to generate a digital signal based on the electrical signal; a quantization component operable to generate a quantized output signal based on the digital signal; and a processing device. The processing device may be operable to measure one or more signal statistics of the digital signal; and identify one or more quantization thresholds, wherein the one or more quantization thresholds are computed based on the one or more signal statistics.

The invention discloses a hearing aid health analysis method based on a physiological signal monitoring function. The method comprises the following steps: collecting physiological signal data of a user in real time through a multi-mode biosensor array integrated on a hearing aid body; the hearing aid body comprises a digital signal processor and a wireless communication module; the physiological signal data at least comprises a brain wave signal, a skin electric response signal and a temporal artery pulse signal; performing motion artifact elimination processing on the physiological signal data through an adaptive filtering algorithm; performing feature extraction on the preprocessed physiological signal by using an embedded health analysis engine to generate a composite health feature vector containing a sympathetic nerve activity index, cognitive load measurement and a cardiovascular function index; and dynamically generating a health risk assessment report based on an association relationship between the composite health feature vector and a preset hearing scene, the bone conduction vibration unit and the audio synthesis module of the hearing aid body output graded health alarm signals.

An embodiment of the present invention discloses a device and method for diagnosing and predicting aircraft electrical circuit faults. The device includes a remote power controller RPC control engine based on a digital signal processor and a power line interface module. The power line interface module transmits the excitation signal generated by the RPC control engine and sends it to the aircraft electrical circuit. The response signal generated when the aircraft electrical circuit is excited is transmitted to the RPC control engine through the power line interface module. The RPC control engine is used to realize the diagnosis and prediction of aircraft electrical circuit faults. This application does not require a large number of sensors to be set up, nor does it require the transmission, collection, and processing of a large amount of data from these sensors, making the diagnosis and prediction of aircraft electrical circuit faults more reliable, economical, and practical.

Content aware audio processing includes receiving, by a digital signal processor, a frame of audio data. In response to detecting that the frame of audio data is a silent frame, the digital signal processor selects a light graph from a plurality of graphs including the light graph and a full graph. Comfort noise is generated that corresponds to the silent frame. The comfort noise frame is processed through the light graph in place of the silent frame. The light graph is dedicated for processing comfort noise frames.

A set of audio headphones operatively coupled to an information handling system includes a digital signal processor (DSP), a headphone power management unit (PMU) to provide power to the DSP, a first ear cup with a first speaker and a second ear cup with a second speaker operatively coupled to each other via a headband, and a mouth privacy cover operatively coupled to the first ear cup at a first end of the mouth privacy cover and operatively coupled to the second ear cup at a second end of the mouth privacy cover, the mouth privacy cover having a microphone built into the mouth privacy cover and operatively coupled to the DSP via a cover receiver with electrical contacts formed on the mouth privacy cover and interfacing with ear cup contact pads formed on at least one of the first ear cup and second ear cup.

The invention discloses an automatic test system of a power driving chip, and particularly relates to the technical field of automatic test, which comprises a dynamic test control module, a multi-level parallel test module, an abnormal power detection module and a safety verification diagnosis module. Based on cooperative work of a programmable electronic load and a digital signal processor, the dynamic response capability of a chip under different working conditions is verified, abnormal power data under an extreme load condition is generated, electrical parameters and thermal parameters of the chip are synchronously collected, the relevance between abnormal power performance and temperature is analyzed, and the abnormal power performance is analyzed. Temperature rise differences caused by power-off protection and electric leakage are distinguished, abnormal power waveforms are extracted and classified so as to distinguish power-off protection and electric leakage events, the influence degree of environmental charge interference is quantified, finally, response effectiveness of a chip protection circuit in a strong charge environment caused by electric leakage is simulated, and calibration is performed according to a collected correction value. Therefore, the automation degree of the system is improved, and the test robustness is enhanced.

Provided in the present invention are an image perspective conversion display apparatus, an image perspective conversion display method, and a computer-readable storage medium. The image perspective conversion display apparatus comprises: a digital signal processor, which is configured to perform warping processing on a first video image from a camera's perspective and depth data corresponding thereto, so as to obtain a second video image from a user's human eye perspective; a network processor, which is configured to perform target detection on the first video image so as to determine a first image mask indicating an occluded region in the second video image, and which is configured to perform an inpainting operation on the basis of the second video image and the first image mask so as to obtain an inpainted image that fills the value of at least one pixel in the occluded region; and an application-specific integrated circuit, which is configured to perform correction and layer blending on the first video image and the inpainted image so as to obtain a third video image to be displayed.

The embodiment of the invention relates to an image processing method and device and a medium. The method proposed herein includes: generating, by a graphics processing unit, a first reference frame, a second reference frame, and motion vector information corresponding to the first reference frame; transmitting the motion vector information to a digital signal processor by a graphic processing unit; the digital signal processor divides the motion vector information into a plurality of groups; processing the plurality of groups in parallel by using a plurality of processing cores of the digital signal processor, each processing core being configured to: write a group of motion vectors indicated by a corresponding group to a group of projection positions of the group of motion vectors in the interpolated frame by using a scatter instruction; respectively reading source pixel information from the first reference frame and the second reference frame based on the written group of motion vectors by utilizing a collection instruction; the source pixel information is fused by a digital signal processor to generate an interpolated frame. In this way, according to the embodiment of the invention, the generation efficiency of the interpolation frame can be effectively improved.

A set of headphones comprising a digital signal processor, a headphone power management unit (PMU) to provide power to the digital signal microprocessor (DSP), a voice pick-up sensor to detect vibrations at a user's head caused by the user talking, and the DSP to determine where the user's voice audio input is picked up via an array of microphones formed into the set of headphones and wherein, when the DSP does not detect the user's voice audio input at the array of microphones, the DSP executes computer-readable program code of a beamforming module to recalibrate an angle of a voice detection zone at which the array of microphones detect the user's voice. The DSP to further calibrate the beamforming angle of the voice detection zone once the user's voice audio input is detected to meet an amplitude threshold level or a signal to noise level threshold level.