897 results about "Analog front-end" patented technology

A system may include multiple digital beamformer (DBF) circuits coupled to an analog front end that includes an antenna array. Each DBF circuit is coupled to a subset of the antenna elements of the array. Each DBF may be configured to adjust coefficients of complex multipliers to selectively enable and disable beams, antenna elements, transmit paths, receive paths, or any combination thereof to enable per-element calibration of the antenna array.

The invention discloses a multichannel electrophysiological signal acquisition system and an acquisition method thereof, and the multichannel electrophysiological signal acquisition system comprises a power supply module electrically connected with a controller, an analog front-end chipset, a filter module and an analog-to-digital conversion module; the analog front-end chip set is used for acquiring an analog signal and preprocessing the analog signal; the pre-processed analog signal is converted into a digital signal through a filter module and an analog-to-digital conversion module, and the digital signal is transmitted to a controller; the filter module is used for filtering and denoising; the timer module connected with the controller generates a sampling frequency, transmits the sampling frequency to the analog-to-digital conversion module, and provides a time sequence signal for the analog-to-digital conversion module. The invention discloses a multi-channel electrophysiological signal acquisition system, which solves the problem of synchronous sampling time sequence control of a high-density electrode array and eliminates signal phase deviation caused by clock jitter among multiple channels under the constraint of maintaining the total power consumption of the system. And real-time power frequency interference suppression is realized.

The invention discloses a dual-mode analog front end with a full-speed clock-free decision feedback equalizer (UC-DFE). The dual-mode analog front end comprises a terminating impedance matching network, a linear processing link, the UC-DFE and a signal output module, the terminating impedance matching network realizes broadband impedance matching and electrostatic protection; the linear processing link comprises a CTLE and a VGA and is used for compensating channel attenuation and expanding signal bandwidth; the UC-DFE comprises a summator, a static comparator, a delay unit and a feedback tap, and realizes high-speed signal processing and feedback equalization; and the signal output module converts the balanced signal into a target coding format and outputs the signal. According to the invention, the overall performance of the circuit is improved, the problems of time sequence tension, bandwidth limitation and the like of the traditional DFE architecture at a high speed are solved, and the circuit is suitable for 128Gbps high-speed PAM4 and NRZ signal transmission and shows better comprehensive performance.

The invention relates to a high-precision temperature sensor based on complementary dynamic element matching and a zoom analog-to-digital converter and a working method, and belongs to the technical field of sensor improvement, and the sensor comprises an analog front end, an analog-to-digital converter, a digital rear end and a control logic. An improved chopping technology is adopted, and one clock signal is adopted to control two sub operational amplifiers, so that the output stability and precision of the analog front end are improved. A complementary dynamic element matching technology is utilized, errors caused by voltage drop at the two ends of a switch are reduced, the influence of channel charge injection is counteracted, a scaling type analog-to-digital converter design is provided for an analog-to-digital conversion part, and balance among power consumption, speed and precision is achieved. According to the method, a 10-bit successive approximation register analog-to-digital converter is used for measuring a numerical value and a change trend, and the numerical value and the change trend are analyzed, so that the expression effects of a current mirror structure, a transistor, a filter and the like are evaluated, the aging of the transistor is found in advance, and a clear direction is provided for future design improvement.

The invention belongs to the field of circuits, and particularly relates to an analog front-end circuit for capacitance detection and a current calibration method, the analog front-end circuit comprises a driving circuit, a to-be-detected capacitor, a chip signal input and output interface circuit, a current amplification circuit or charge amplification circuit, an integrating circuit and an analog-to-digital converter which are connected in sequence; the leakage current measurement and calibration controller is used for receiving a signal of the analog-to-digital converter and outputting a control signal for calibrating the leakage current to the current calibration circuit; the output end of the current calibration circuit is connected with the input end of the integrating circuit, and the current calibration circuit is used for adjusting the output of the current calibration circuit to calibrate the magnitude of the current input into the integrating circuit when receiving the control signal for calibrating the leakage current. According to the application, the leakage current measurement and calibration controller is arranged at the output end of the integrating circuit, the leakage current of the analog front-end circuit is measured, and the control signal is output to adjust the output of the current calibration circuit, so that the magnitude of the current input into the integrating circuit is calibrated, and errors caused by imbalance of the leakage current and the current of the amplifying circuit can be compensated.

The invention discloses a fault detection method, device and system and a storage medium. The fault detection method comprises the steps of obtaining at least two voltage sampling values; wherein the at least two voltage sampling values are obtained by at least two analog front-end modules in the battery monitoring unit through respective target sampling channels to perform voltage acquisition on the same analog battery cell; determining a voltage difference absolute value between every two voltage sampling values in the at least two voltage sampling values; and when the partial pressure difference absolute value in the at least two obtained pressure difference absolute values is greater than a preset threshold value, determining an abnormal target voltage sampling value according to the partial pressure difference absolute value, and determining that the target sampling channel of the corresponding target analog front-end module has an equalization fault according to the target voltage sampling value. Therefore, the accuracy of equalization fault identification can be improved, and the safety of the battery is further improved.

The invention discloses a temperature measurement chip circuit compatible with platinum thermal resistance, NTC and digital semiconductor temperature measurement. According to the circuit, three temperature measurement principles are fused, a single-chip implementation scheme of temperature measurement and acquisition of PT100 / PT1000 / NTC thermistors outside a multi-channel chip and temperature measurement of PN nodes inside the chip is fused, and a time division multiplexing mode is adopted, so that the measurement matching performance among channels is improved, and the power consumption is reduced. During calibration, the internal PN node array temperature measurement channel is calibrated firstly, error correction is performed on the analog front-end circuit, and then the external temperature measurement channel is calibrated by using the precision of the PN node array, so that the calibration efficiency is improved. Reasonable reference voltage is adopted for different internal and external temperature measurement circuits, and for an external temperature measurement channel, differential voltage between two pins is selected, so that the influence caused by driving current deviation is counteracted in calculation. For an internal PN node temperature measurement channel, an internal low-temperature-drift reference voltage VREF is selected, and the influence caused by the reference voltage deviation is counteracted from calculation.

The invention discloses a method for realizing a touch function on a display lamp array, an analog front end, a display panel and an electronic cigarette, and relates to the technical field of electronic cigarette display control. The method comprises the following steps: dividing display lamps of a display lamp array into a plurality of blocks according to the number of touch functions of the display lamp array, and configuring a signal transmission port for the display lamp of each block according to a corresponding lighting mode; when the current lighting cycle arrives, the display lamps of the multiple blocks are turned on at the same time, and after the display lamps are turned on, the signal transmission ports belonging to the same block are combined together; in a touch function detection period corresponding to the current lighting period, self-capacitance detection is carried out on the combined signal transmission ports; and after the touch function detection period is finished, removing the combination of the combined signal transmission ports, and waiting for the arrival of the next lighting period. According to the invention, the touch function is directly realized on the display lamp array, the cost is reduced, and the user experience is improved.

The various implementations described herein include techniques and apparatuses for multi-channel biopotential signal acquisition, biopotential signal pre-processing, and adaptive signal conditioning. In one aspect, an analog frontend circuit includes an instrumentation amplifier (INA) and an analog-to-digital circuit (ADC) in a forward signal path. A digital circuit receives input from the ADC. An adaptive baseline tracking and compensation circuit tracks and compensates moving motion artifact driven changes. A power line interference (PLI) detection and compensation circuit tracks a desired number of PLI harmonics, and magnitude, phase and frequency for the PLI harmonics in real time. A digital-to-analog converter (DAC) circuit combines output of the adaptive baseline tracking and compensation circuit and the PLI detection and compensation circuit to output an analog output. A passive filter receives the analog output and drives an analog compensation signal at an input of the INA.

The invention discloses a communication simulation device for simulating a front-end chip in a battery management system, and relates to the technical field of communication testing, the communication simulation device comprises a micro-control unit, a field programmable logic gate array and a daisy chain conversion module which are connected in sequence; the field programmable logic gate array is used for simulating a register of an analog front-end chip in the battery management system and a daisy chain communication time sequence based on the register configuration parameters; the micro-control unit is used for communicating with an upper computer, receiving a register configuration parameter modification instruction of the upper computer, and modifying register configuration parameters in the field programmable logic gate array according to the register configuration parameter modification instruction; the register configuration parameters in the field programmable logic gate array are uploaded to the upper computer; and the daisy chain conversion module is used for communication between the field programmable logic gate array and the tested battery control unit. According to the invention, the test safety can be improved.

The invention relates to the technical field of wireless communication networks, and provides a low-channel electroencephalogram amplification circuit and brain-computer interface equipment oriented to an after-ear electroencephalogram signal, and the low-channel electroencephalogram amplification circuit comprises a dry electrode sensing module which is used for collecting an electroencephalogram signal; the front active amplification module comprises an operational amplifier circuit with high input impedance; the anti-aliasing filtering module is formed by cascading a multi-order passive filtering network and an active filtering circuit, is connected with the output end of the front active amplification module and is used for filtering high-frequency interference signals; the right leg driving feedback module comprises a programmable impedance adjusting circuit and a current limiting protection circuit, the right leg driving feedback module and the front active amplification module form a closed-loop feedback loop, and the output end of the right leg driving feedback module and the human body form a current loop through a protection resistor; the analog-to-digital conversion module adopts an integrated low-power-consumption analog front-end chip; a wireless transmission module; and the power supply management module provides independent power supply for the analog front-end chip, the operational amplifier circuit and the wireless transmission module.

Disclosed in the present invention is a high-dynamic capacitive digital microphone system based on electrostatic force feedback. The system comprises an MEMS microphone and an interface circuit chip thereof, wherein the interface circuit chip comprises a charge pump, an analog front end, an analog-to-digital conversion circuit, an amplitude detection module, an amplitude adjustment control module and a pulse density modulation module. In the present invention, the characteristic of the sensitivity being able to be adjusted by means of changing a bias voltage by a capacitive sensor is used, and a charge pump with an adjustable output voltage is used to provide electrostatic force feedback, thereby further expanding the adjustable range of a front-end gain, and also reducing requirements for the noise performance of a readout circuit. Therefore, the system in the present application has the characteristics of high dynamic range and high-precision quantization.

The invention relates to a battery management system for a vehicle starting battery, and the system comprises a battery pack which comprises a plurality of connected battery cell units; the analog front end sampling chip AFE is electrically connected with the battery cell unit and is used for acquiring state parameters of the battery cell unit; the MCU control unit is electrically connected with the analog front end sampling chip AFE; the charging and discharging first switching circuit is electrically connected between the battery pack and the load connecting end of the battery pack, and is electrically connected with the analog front end sampling chip AFE; the second charging and discharging switch circuit is electrically connected to the first charging and discharging switch circuit and electrically connected with the MCU control unit or the analog front end sampling chip AFE, and the MCU control unit is configured to control the first charging and discharging switch circuit and the second charging and discharging switch circuit to be switched on or switched off based on preset logic. According to the invention, the problems of large current impact and overcharge load throwing caused by power connection when a lithium battery is used as a starting battery are solved, and the reliability of the battery management system is improved.

In one embodiment, a first die comprises: a first die-to-die adapter to communicate with first protocol layer circuitry via a flit-aware die-to-die interface (FDI) and first physical layer circuitry via a raw die-to-die interface (RDI), where the first die-to-die adapter is to receive message information comprising first information of a first interconnect protocol; and the first physical layer circuitry coupled to the first die-to-die adapter. The first physical layer circuitry may be configured to receive and output the first information to a second die via an interconnect, the first physical layer circuitry comprising a plurality of modules, each of the plurality of modules comprising an analog front end having transmitter circuitry and receiver circuitry. Other embodiments are described and claimed.

The utility model discloses a cloud battery management monitoring device for a new energy automobile. The cloud battery management monitoring device comprises a shell, the main control board comprises a main control chip, an indicating lamp circuit, a crystal oscillator circuit, a plurality of reset circuits, a first filtering voltage stabilizing circuit, a serial port module, a USB module, a CAN conversion module, an SWD burning interface and a charging and discharging circuit. The slave control board comprises a battery pack acquisition module, a slave control chip, a daisy chain circuit, an AFE analog front end, an isoSPI communication interface, a battery equalization circuit, a discharge voltage detection circuit, a digital isolator and an NTC circuit; the slave control chip is connected with the battery pack acquisition module, the discharge voltage detection circuit, the daisy chain circuit, the digital isolator, the AFE analog front end, the isoSPI communication interface, the NTC circuit and the battery equalization circuit through pins. The utility model has the characteristic of improving the energy utilization rate of the battery pack.

The invention relates to the technical field of protection circuits, in particular to a voltage threshold dynamic detection earth leakage protection circuit and a circuit protection board. According to the technical scheme, the device comprises a differential current detection module which is used for collecting current difference signals of a live wire and a zero wire in real time; the dynamic threshold adjusting module is connected with the environment sensor and the processing module, and dynamically sets an electric leakage judgment threshold based on environment parameters and load current spectrum analysis; the time division multiplexing programmable analog front end is used for sequentially executing signal amplification, filtering and analog-to-digital conversion functions through time sequence control; the solid-state electronic switch breaking module responds to the electric leakage signal output by the processing module and realizes circuit breaking; and the self-checking and fault-tolerant module periodically generates analog leakage signals to verify the functional integrity of the system. The method adapts to environmental load change through dynamic threshold adjustment, improves signal processing efficiency through time division multiplexing, guarantees reliability of the system through self-checking fault tolerance, and realizes accurate and rapid leakage protection.

Systems and methods can facilitate wide broad-band IVUS for peripheral vascular applications with simultaneous improved resolution and penetration depth. A custom analog front end interface can withstand large voltages and recover to receive a sub-mV pulse from less than one mm away. The custom analog front end interface can be on an interface chip that can be sized to be integrated within a tip of the IVUS catheter to connect micro-cables within the IVUS catheter to the broad-band transducer. The interface chip can also include a dual-stage amplifier having a pulse mode configured to withstand voltage pulses greater than 30 VPP during pulsing and an echo reception mode configured to receive sub-mV echoes during echo reception.

The invention discloses an LPO wired receiver adopting adaptive CTLE based on a genetic algorithm, and the receiver comprises an analog front end, a data sampler, an edge sampler, an error sampler, a 1: 32 demultiplexer, a verification module, an eye pattern monitor, a genetic algorithm module, clock recovery logic, and a clock path. The eye pattern monitor is used for calculating the eye pattern closure degree according to the data of the data sampler and the error of the error sampler and outputting the eye pattern closure degree to the genetic algorithm module; and the genetic algorithm module is used for realizing parameter adaptive control of a continuous time linear equalizer CTLE and a variable gain amplifier VGA in the analog front end. The invention aims to apply the genetic algorithm to the adaptive equalization of the adaptive continuous time linear equalizer, so that the adaptive continuous time linear equalizer has stronger global search capability and lower power consumption and is not easy to fall into local optimum, and the complexity and power consumption of the adaptive continuous time linear equalizer are reduced. And the real-time and energy-saving requirements are met.

The invention discloses an active pen and touch screen interaction system resistant to common-mode interference and a signal demodulation method. The system comprises a signal receiving terminal and a signal transmitting terminal. The signal transmitting terminal modulates data to be transmitted by adopting a differential binary phase shift keying modulation method, and transmits a generated modulation signal to the signal receiving terminal; the analog front-end receiving module is coupled with the signal transmitting terminal, receives the modulation signal and outputs a digital square wave signal after fidelity extraction processing; and the digital demodulation processing module performs differential coherent digital demodulation on the digital square wave signal based on the prior characteristics of the modulation signal, inhibits residual noise and recovers data to be sent. The analog front end focuses strong common-mode noise suppression and analog filtering, the digital demodulation algorithm performs secondary digital purification by using signal time sequence characteristics, and the two constructs an efficient anti-interference pipeline. Meanwhile, the regular square wave signals can be directly processed through differential coherent demodulation, and the requirements for performance and power consumption of a rear-end processor are lowered.

A capacitance measurement circuit includes an analog front-end (AFE) circuit with current mirror circuits, a parasitic capacitor, an AD converter, an output shift register, and a controller. The controller disconnects a capacitor to be measured and connects one current mirror circuit to record an AFE output voltage VN collected at an inverting input terminal of the AD converter, then connects the capacitor to be measured to collect an AFE output voltage VP at a non-inverting input terminal of the AD converter, and converts a value of (VP−VN) into a first digital signal; determines, based on the value of the first digital signal, a connection number m of the current mirror circuits, controls the analog front-end circuit to connect m current mirror circuits, and repeat the steps to obtain a second digital signal; and shift the second digital signal based on the connection number m to obtain a capacitance measurement value.

A sensor device includes: first sensors connected to first sensor lines; second sensors connected to second sensor lines, the second sensors intersecting the first sensors; a sensor transmitter connected to the first sensors through the first sensor lines, the sensor transmitter configured to supply touch driving signals to the first sensors during a touch sensing period; and a sensor receiver connected to the second sensors through the second sensor lines, the sensor receiver configured to receive touch sensing signals from the second sensors during the touch sensing period, wherein the sensor receiver includes a plurality of analog front-ends, and wherein each of the plurality of analog front-ends is connected to at least one of the second sensor lines and at least one of the first sensor lines.

The invention relates to the technical field of signal processing, in particular to a large-bandwidth signal source bandwidth flatness compensation method and device based on an FPGA (Field Programmable Gate Array), and the method comprises the steps: playing signal data with required bandwidth through an analog front end based on the FPGA, and measuring an original amplitude-frequency response curve of the signal data through a frequency spectrograph; calculating the amplitude-frequency response of the compensation filter, obtaining a compensation filter coefficient, and quantifying the compensation filter coefficient; sending the quantized compensation filter coefficient to an FPGA to compensate the signal data, playing the signal data through an analog front end, and measuring a first pre-compensation amplitude-frequency response curve in a Nyquist frequency range through a frequency spectrograph; and determining a frequency range exceeding the set bandwidth flatness according to the first pre-compensation amplitude-frequency response curve, and performing independent compensation. Therefore, the influence caused by nonlinearity of a DAC device and related circuits is overcome, the amplitude-frequency response of a large-bandwidth signal source is effectively compensated, the signal flatness in the bandwidth is improved, and the stability and reliability of the system are enhanced.

The invention discloses an amplifying circuit for improving a common-mode rejection ratio, relates to the field of sensor analog front-end circuits, and aims to improve the common-mode rejection ratio of a circuit system by suppressing common-mode signal change and differential-mode signals caused by the common-mode signal change. A capacitive coupling structure and a chopping stabilizing circuit are combined, so that the problems of an instrument amplifier with a three-operational-amplifier structure are solved, firstly, the amplifier drives a passive network, and the power consumption is reduced; secondly, the AC capacitor is connected in series to isolate a common-mode signal, so that the CMRR of the circuit is improved; thirdly, the chopping stabilizing circuit modulates the offset voltage and the common-mode signal change voltage to high frequency, the offset voltage and the common-mode signal change voltage are filtered by a filter, the circuit gain is improved, and meanwhile, the CMRR is also improved; and fourthly, the problems of residual offset and output ripple caused by the chopper circuit are reduced through the DSL and the RRL, so that saturation of a post-stage circuit is avoided.

The invention belongs to the technical field of blood oxygen detection, and particularly relates to a non-invasive blood oxygen detection method. The main machine shell is arranged on the upper portion of the blood oxygen machine, a blood oxygen sensor is arranged below the blood oxygen machine and electrically connected with the main machine shell, the main machine shell comprises a single chip microcomputer, an analog front end driving module, a display module, a circuit module, a signal receiving module, a digital signal processing module and a storage module, and meanwhile a lithium battery is arranged in the main machine shell. A power supply is provided for the oximeter; the blood oxygen sensor is directly connected with the signal receiving module to form a blood oxygen signal receiving module, and the blood oxygen signal receiving module is connected with the digital signal processing module to convert a voltage signal into a digital signal; according to the invention, the problem that detection signal pulse wave output signals are interfered by serious noise such as environmental noise and hardware circuits is solved; the problems of signal loss and signal superposition caused by a traditional filtering method are solved.

The present invention discloses a clock data recovery circuit and recovery method suitable for high-speed SerDes, including: an analog front end, inputting a received signal and outputting a phase detector result; a phase detector accumulator, used to accumulate the phase detector result; a gain control unit, used to adjust the gain of the trunk signal; a first branch, including a ratio decision device and a phase gain unit; a second branch, including a weight decision device and a frequency integration unit; an adder, used to add the output results of the phase gain unit and the frequency integration unit, and the adder output passes through a phase accumulator and a phase interpolator in turn; the phase interpolator is used to output a sampling clock for use by the analog front end. The present invention can respond in time under small error conditions, with fast CDR locking speed and short time; reduce the cumulative error of the system, strengthen the tracking effect of clock jitter, and ensure the overall performance improvement of the system.

The invention discloses an electric blanket control method and system based on AI voice interaction, and the method comprises the steps: collecting a noisy voice signal through a microphone array, carrying out the filtering of an analog front-end circuit, the echo elimination of an AEC chip, and the noise reduction of a DSP, and obtaining a high-signal-to-noise-ratio pure voice. The AI or voice recognition chip extracts features and matches the features with a pre-stored template, and the master control MCU drives the voltage regulation circuit to regulate the heating power according to an instruction through PWM (Pulse Width Modulation). And dynamically adjusting the power of each region according to the temperature difference by using a closed-loop control algorithm according to ergonomic partitioning. The intelligent electric blanket solves the problems that a traditional electric blanket is inconvenient to operate, inaccurate in temperature adjustment and lack of effective safety protection, and an existing intelligent electric blanket is insufficient in voice interaction function, convenient voice control, accurate partition temperature control and comprehensive safety protection are achieved, and the user experience is improved.

The invention discloses a low-noise and high-precision analog front-end circuit for biological signal acquisition. The low-noise and high-precision analog front-end circuit comprises a chopping capacitance coupling type instrument amplifier circuit, a switched capacitor type programmable gain amplifier circuit and a Sigma-Delta analog-to-digital converter modulator circuit. T-type capacitance feedback, chopping modulation and programmable technologies are introduced on the basis of an existing amplifier, and the low-noise and programmable gain functions of the pre-amplifier are achieved. Through the three-order one-bit quantized feed-forward chopping type Sigma-Delta modulator, the signal to noise ratio and the effective bit number of the signal are improved. Compared with the prior art, the analog front-end circuit not only has the capability of changing the gain multiple according to the bio-electricity signal, but also has the low-noise and high-precision signal processing effect, and the problems that a traditional analog front-end circuit is large in noise and low in signal processing precision are solved. In addition, the biological signal acquisition-oriented circuit provided by the invention can also be used in other analog front ends, such as an audio processor and the like, and is wide in application range.

The invention discloses a wearable electrocardiogram monitoring method based on composite lead and intelligent reconstruction. Belongs to the technical field of medical signal processing and wearable medical instruments, and solves the technical problems of insufficient multi-lead information amount, poor lead stability, motion artifact interference, unreliable missing lead complementation and the like of the existing wearable electrocardio equipment. According to the technical scheme, the method comprises the steps that a plurality of non-inductive electrodes are arranged on a trunk to achieve multi-channel collection of composite leads; the front end uses an analog front end (AFE); multi-stage denoising is carried out cooperatively at the equipment end and the edge end; when the lead is missing or poor in quality, complementing the lead by using a deep reconstruction network of cross-lead attention and fuzzy gating; and finally, inputting the purified or reconstructed electrocardiosignal into a multi-label deep learning classifier. According to the method, the wearing comfort, the information integrity, the transmission efficiency and the real-time diagnosis capability are considered, and the method is suitable for multi-scene long-time electrocardiogram monitoring and early warning in families, hospitals, exercise rehabilitation and the like.

The embodiment of the invention provides an analog front-end circuit, and relates to the field of communication. Specifically, the analog front-end circuit comprises a plurality of differential amplification branches which are respectively provided with a switch; the control module is used for controlling on-off of the switch based on a communication protocol; wherein communication protocols of different differential amplification branches are different, the communication protocols are obtained based on a digital processing system, and the plurality of differential amplification branches are connected with the digital processing system. The problem that an analog front-end circuit in the related technology is poor in adaptability to a protocol is solved, and the effect of improving the adaptability of the analog front-end circuit to the protocol is achieved.

The invention relates to the technical field of wireless communication and signal processing, in particular to a short-wave spectrum efficient sampling method and system based on compressed sensing, and the method comprises the steps: collecting full-band power spectrum density data through a low-speed scanning receiver; determining a strong interference frequency point set; generating a binary null observation sequence; loading the binary null observation sequence to an analog front-end frequency mixing circuit, performing analog domain orthogonal frequency mixing and integral processing on the input radio frequency signal, and outputting a voltage sampling value; resolving to obtain a signal sparse coefficient through a compressed sensing reconstruction algorithm; calculating a reconstruction residual error according to the voltage sampling value and the signal sparse coefficient; in response to the condition that the reconstruction residual error is greater than a preset error threshold, triggering a reacquisition process of the power spectral density data; outputting a signal sparse coefficient in response to the condition that the reconstruction residual error is smaller than or equal to a preset error threshold; according to the invention, the problems of limited dynamic range and weak signal submerging are solved, and the receiving sensitivity of weak signals in a strong interference environment is obviously improved.