TEC(thermoelectric cooler)-free uncooled infrared focal plane array reading circuit

Abstract

The invention discloses a TEC(thermoelectric cooler)-free uncooled infrared focal plane array reading circuit, and relates to the technical field of uncooled infrared focal plane array. A reading circuit comprises a bias generation circuit, a column-level analog front-end circuit, and a row-level circuit; the row-level circuit comprises a row-level mirror image pixel, is controlled by a row selection switch,and can output a third bias voltage; the bias generation circuit is connected with the row-level circuit, the input end of the bias generation circuit is connected with the output end of the row-level circuit; a first bias voltage and a second bias voltage are generated and outputtedbased onan inputted constant voltage and a third bias voltage; the column-level analog front-end circuitcomprises a blind pixel; the column-level analog front-end circuit is electrically connected with the bias generation circuit, the input end of the column-level analog front-end circuit is connected with the output end of the bias generation circuit to obtain two currents, and the difference between the two currents generated is amplified in a transimpedance mode and outputted as a voltage. By adopting the technical scheme of theTEC(thermoelectric cooler)-free uncooled infrared focal plane array reading circuit, the circuit has a stable output point unaffected by the substrate temperature andthe self-heating effect, and the stability of the circuit is improved.

Description

technical field [0001] The invention relates to the technical field of uncooled infrared focal plane arrays, in particular to a TEC-free uncooled infrared focal plane array readout circuit. Background technique [0002] As one of the key components of the uncooled infrared focal plane array (IRFPA), the readout circuit's main function is to preprocess the weak signals sensed by the infrared detector (such as integration, amplification, filtering, sampling / holding, etc.) and the array signal parallel / serial conversion. [0003] In the prior art, such as the accompanying drawings in the description figure 1 The traditional upper and lower differential current readout structure circuit shown can complete the elimination of the substrate temperature effect and signal amplification in one step, and offset correction can be performed by adjusting the bias voltage of Veb and Vfid; its main disadvantages are: 1. The front bias The noise will be directly amplified, so the bias nois...

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Problems solved by technology

[0003] In the prior art, such as the accompanying drawings in the description figure 1 The traditional upper and lower differential current readout structure circuit shown can complete the elimination of the substrate temperature effect and signal amplification in one step, and offset correction can be performed by adjusting the bias voltage of Veb and Vfid; its main disadvantages are: 1. The front bias The noise will be directly amplified, so the bias noise is very demanding; 2. Due to the self-heating effect, the blind pixel resistance of the pixel is not equal, and the output bias point cannot be automatically determined; 3. Its circuit gain varies with the substrate temperature Larger, leading to possible loss of dynamic range at different substrate temperatures and failure of offset correction;

[0004] It can be seen that in the traditional readout circuit, due to the influence of process deviation, self-heating effect and substrate temperature, the data to be read out fluctuates greatly, and some unnecessary noise will be introduced, which seriously affects the readout quality and circuit stability

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