99 results about "Correlated double sampling" patented technology

The invention provides a correlated double-sampling program-controlled gain amplifier for a high-energy particle detection pixel sensor and an implementation method, and solves the technical problem that a large dynamic range and high readout precision cannot be considered at the same time during existing high-energy particle detection. The circuit comprises a correlated double-sampling circuit, a signal polarity conversion circuit, an amplification feedback circuit and a configuration automatic judgment circuit. The correlated double sampling circuit is used for performing double sampling on the output voltage of the pixel signal to obtain twice sampling voltage; the configuration automatic judgment circuit is used for selecting configurations for switching according to the voltage difference between the two sampling voltages to obtain an output signal; and the amplification feedback circuit is used for performing fixed gain voltage amplification on the output signal to obtain an amplified voltage signal. The circuit can be widely applied to the technical field of integrated circuits.

The invention provides a column memory circuit, a chip, an image sensor and an imaging apparatus. The column memory circuit comprises M * N memory bank modules, N read-out modules and a data transmission module, and a correlated double-sampling module of the column memory circuit is arranged in the read-out module; the first end of the memory bank module receives a first data signal, the second end of the memory bank module is coupled with the first end of the reading module corresponding to the memory bank module, and the second end of the reading module is coupled with the data transmission module; the memory bank module converts a received first data signal into a second data signal, the reading module performs correlated double sampling processing on the second data signal through the correlated double sampling module to obtain a third data signal, and the data transmission module outputs the third data signal. According to the column memory circuit, the area of the column memory circuit can be obviously reduced, the circuit performance can be well ensured, and the cost of an image sensor can be obviously reduced by adopting the column memory circuit provided by the invention.

The invention discloses a novel chopping correlation double-sampling stable multi-path amplifying circuit and method, and relates to integrated circuit design. A Miller compensation capacitor in a chopping stable multi-path CSMP amplification circuit architecture is utilized to design a chopping correlation double-sampling circuit, and compared with a traditional correlation double-sampling circuit, a group of sampling capacitors and sampling switches are reduced. Large capacitance and large resistance required by a traditional high-pass filter circuit are eliminated, and the layout area and the current required for driving a high-pass filter capacitor are reduced; and thermal noise caused by large resistance in the passive high-pass filter is reduced, and the input equivalent noise density is improved. Through an offset calibration technology, the stability of the CSMP architecture is ensured, and the offset voltage is reduced at the same time; output ripples are suppressed by using the high-pass performance of the novel chopping correlation double-sampling circuit, 1 / f noise is reduced, and input equivalent noise density is reduced. The advantages of the chopping correlation double sampling technology and the stable multi-path amplification circuit are combined, and the advantages of low offset, low output ripple and low input equivalent noise density are achieved.

According to the laser full-waveform distance measuring device and method based on correlated double sampling, a high-transmissivity low-reflection spectroscope is adopted to complete light splitting of laser emitted by a laser emitting module, more than 99% of energy of the emitted laser is transmitted to form emitted light which is emitted to a target, and less than 1% of energy is reflected to form reference light which is emitted to the target. The reflected reference light is received by the laser receiving module, and the reflected light after the emitted light is irradiated to the target and the reference light are received by the same laser receiving module. The laser receiving module converts received reference light and emitted light into electric signals and outputs the electric signals to the control and processing module for processing, the control and processing module performs waveform calculation on the electric signals converted from the reference light and the received light, and due to the homology of the emitted light and the returned light, distance measurement errors caused by inconsistent light sources in the distance measurement process are eliminated, and the distance measurement accuracy is improved. Meanwhile, sampling noise of the laser receiving module can be suppressed through correlated double sampling of the emitted light and the received light, so that the sampling signal-to-noise ratio is improved, and the ranging precision is improved.

First and second modulation gates disposed adjacent a silicon photoconversion structure generate, throughout the exposure interval, alternating first and second electrostatic fields that compel photocharge generated within the silicon photoconversion structure to the first and second storage diodes, respectively. Upon conclusion of the exposure interval, accumulated photocharge within the first and second storage diodes is transferred to first and second floating diffusion nodes, respectively, as part of a correlated-double-sampling readout with respect to each of the floating diffusion nodes.

The invention provides a single-slope analog-to-digital converter, a reading method thereof and an image sensor. The single-slope analog-to-digital converter comprises a comparator, a logic control circuit and a counter, a first input end of the comparator accesses a reset signal or a most significant bit signal according to a logic control signal, and a second input end accesses a ramp signal and a pixel signal; the input end of the logic control circuit is connected with the output end of the comparator so as to generate a logic control signal according to the analog signal output by the comparator; the input end of the counter is connected with the output end of the logic control circuit so as to carry out quantitative counting according to the output of the logic control circuit. By combining the most significant bit technology and the comparator fixed input level flipping technology, the high-speed operation of the single-slope analog-to-digital converter can be ensured, and the DCDS function can be adapted, so that the FPN of the single-slope analog-to-digital converter is effectively reduced, and the reliability of the single-slope analog-to-digital converter is improved. The problem that an existing two-step single-slope analog-to-digital converter cannot adapt to digital correlated double sampling, and consequently noise of output signals is large is solved.

An image sensor may include an image sensor pixel array. The image sensor pixel array may include active image sensor pixels and non-active image sensor pixels. A line of image sensor pixels may be coupled to readout circuitry. The readout circuitry may use reset level signals from some of the image sensor pixels to obtain a digital average reset level value and may use the digital average reset level value to perform digital-domain correlated double sampling operations for digital image level values from active image sensor pixels in the line of image sensor pixels.

The invention discloses an electronic device, a frequency control method and terminal equipment, and the electronic device comprises an image sensor, a processing unit, and a DC-DC converter. The processing unit is used for controlling the pulse width modulation frequency of the DC-DC converter to be switched from a third frequency to a fourth frequency under the condition that the sampling frequency of the correlated double sampling unit is switched from a first frequency to a second frequency; wherein the DC-DC converter is used for carrying out voltage conversion according to the pulse width modulation frequency, and outputting the converted voltage to the image sensor; the absolute value of the difference value between the third frequency and the first frequency is smaller than or equal to a first threshold value, and the absolute value of the difference value between the fourth frequency and the second frequency is smaller than or equal to a second threshold value.

Techniques and apparatuses are described that implement random modulation of charge-pump noise phases to reduce structured noise induced by the charge pump. In an example aspect, a correlated double sampling (CDS) circuit is coupled to a pixel array including at least one pixel circuit. The CDS circuit receives an input signal generated by the at least one pixel circuit from the pixel array and samples a reset component of the input signal during a first sampling time to generate a reset component sample. The first sampling time is at a first offset from a reset control signal and prior to a settling time of the at least one pixel circuit. The CDS circuit samples a signal component of the input signal during a second sampling time to generate a signal component sample and determines an output signal based on the reset component sample and the signal component sample.

The invention provides a column memory circuit, a chip, an image sensor and an imaging apparatus. The column memory circuit comprises M * N memory bank modules, N reading modules and a data transmission module, and a correlated double sampling unit of the column memory circuit is arranged in the data transmission module; the memory bank module receives a first data signal, the second end of the memory bank module is coupled with the first end of the reading module corresponding to the memory bank module, and the second end of the reading module is coupled with the data transmission module. The memory bank module converts a received first data signal into a second data signal, the reading module sends the received second data signal to the data transmission module, and the data transmission module performs correlated double sampling processing on the second data signal through a correlated double sampling unit to obtain and output a third data signal. According to the invention, the area of the column memory circuit can be obviously reduced, the circuit performance can be well ensured, and the cost of the image sensor can be obviously reduced.

The present invention discloses a two-step high-speed ADC circuit based on a single-slope and level-coded TDC. The circuit is characterized by comprising a single-slope digital logic ADC circuit and a time-to-digital conversion TDC circuit. The output of the single-slope digital logic circuit and the output of the time-to-digital conversion TDC circuit are output through an accumulator as the analog-to-digital conversion result OUT of the entire circuit. The TDC employs a cyclic level coding scheme, automatically performing a carry function to the single-slope counting logic. Furthermore, the circuit is effectively compatible with digital correlated double sampling technology, subtracting two quantization results with non-ideal factors to obtain a more accurate quantization result.

The invention relates to a low-noise small-size active pixel circuit and a working method thereof, the low-noise small-size active pixel circuit comprises a charge transfer circuit, an overflow circuit and a signal readout circuit, the overflow circuit, the charge transfer circuit and the signal readout circuit are connected in sequence, the charge transfer circuit is used for completing charge-to-voltage conversion, the overflow circuit prevents saturated charge from overflowing, and the signal readout circuit is used for reading out signals. And the signal reading circuit is used for completing correlated double sampling and transmitting a signal to a next-stage circuit. According to the invention, an overflow pipe is added in an 8T circuit in the prior art, and charge overflow and adjacent pixel crosstalk under a strong light condition can be effectively inhibited by constructing a controllable charge discharge channel; a row selection transistor is omitted, signal reading is achieved through voltage control, and charging and discharging of a sampling capacitor are controlled by changing a time sequence.

The present invention provides a wireless charging method, terminal, wireless charging device, and storage medium, relating to the field of data processing. The method comprises: obtaining a target correlated double sampling (CDS) frequency used by a camera application in a selected shooting mode while the camera application is in the foreground; determining an expected charging frequency for a wireless charging device based on the target CDS frequency; instructing the wireless charging device to adjust the charging frequency based on the expected charging frequency; and charging the wireless charging device based on electromagnetic waves generated by the wireless charging device at the adjusted charging frequency. The wireless charging solution provided by the present invention can reduce the adverse effects of noise generated by wireless charging on image acquisition.

The utility model relates to the technical field of electronics, in particular to a spectrograph noise reduction circuit, which is characterized in that a first end of an input module is connected with a spectrograph charge coupling signal, and a second end is connected with a first end of a leading edge double-sampling module; the second end of the leading edge double-sampling module is connected with the first end of the signal holding module, and the second end of the signal holding module is connected with the first end of the trailing edge double-sampling module; the second end of the trailing edge double-sampling module is connected with the output module; the leading edge double sampling module is used for carrying out leading edge correlation double sampling on the charge coupling signal of the spectrograph to obtain a leading edge signal; the back edge double sampling module is used for carrying out back edge correlation double sampling on the spectrometer charge coupling signal to obtain a back edge signal; the signal holding module is used for holding the leading edge signal and the trailing edge signal; and the output module is used for carrying out differential amplification on the leading edge signal and the trailing edge signal. The spectrograph noise reduction circuit can improve the signal-to-noise ratio of the charge coupled signal of the spectrograph, so that the performance of the spectrograph can be improved.

An image sensor includes a pixel configured to operate in a high conversion gain mode and a low conversion gain mode during a readout period, and a correlated double sampling circuit configured to generate a comparison signal based on a ramp signal and a pixel voltage received from the pixel. The correlated double sampling circuit includes a comparator configured to receive the pixel voltage through a first input node, receive the ramp signal through a second input node based on receiving a low conversion gain reset signal or a low conversion gain image signal as the pixel voltage, and receive the ramp signal through a third input node based on receiving a high conversion gain reset signal or a high conversion gain image signal as the pixel voltage, and compare the ramp signal with the pixel voltage and output a comparison signal corresponding to a comparison result.

A sampling method for non-destructive readout infrared detectors, including: testing the response linearity of the non-destructive readout infrared detector, setting the full well detection threshold according to the range of the linear region; in the readout process of a single frame image, reading the storage parameters of the pixel after the sampling of a single pixel is completed, calculating and storing new parameters, and performing the above operations on each pixel row by row and column by column in accordance with the order of the detector output image data; ending the integration after completing the readout of a specified number of frames, and calculating the final output result according to the storage parameters. Compared with the commonly used sampling methods for general infrared detectors such as correlated double sampling, the method of the present invention can further reduce the readout noise; compared with the special sampling methods for non-destructive readout infrared detectors such as standard ramp sampling, this method has the same noise reduction effect as the standard ramp sampling, while also greatly reducing the storage space requirement.

The present invention relates to a column readout circuit for a CMOS image sensor, and more specifically, to a high-speed column readout circuit for a CMOS image sensor. This circuit solves the technical problems of existing column readout circuits, such as slow signal readout speed, inability to output two-terminal voltage signals, and inability to externally adjust the output range. The present invention comprises m branches, a holding and amplifying circuit, and a multiplexer, and has a two-stage amplification function. The multiplexer is used to implement time-sharing readout of sampling signals from the m branches. The branches include a column buffer circuit and a correlated double sampling circuit. The column buffer circuit utilizes fixed capacitors, and by varying the proportional relationship between the two fixed capacitors, different amplification factors are achieved to implement first-stage amplification. The correlated double sampling circuit and the holding and amplifying circuit utilize programmable capacitors, which are combined to form a gain amplifier to implement second-stage amplification. The proportional relationship of the programmable capacitors is changed through external control, causing the amplification factor of the column readout circuit to change accordingly, thereby flexibly adjusting the output range.

An image sensor according to an exemplary embodiment of the present disclosure may include: a pixel array comprising a plurality of pixels arranged in rows and columns, wherein each of the plurality of pixels outputs a pixel signal corresponding to a signal level based on a received optical signal and a reset level; an analog-to-digital converter (ADC) that converts the pixel signal received through an input terminal into analog-to-digital to generate a reset value and a signal value; a clamping circuit that provides a clamping signal to the input terminal during an auto-zero period in which the ADC performs an auto-zero operation; a clamping correction circuit that corrects the reset value provided from the pixel array based on a threshold value to generate a corrected reset value; and a digital CDS (correlated double sampling) circuit that generates pixel data based on the corrected reset value and the signal value provided from the pixel array.

The invention provides a short wave infrared pixel readout circuit and a control method thereof, the short wave infrared pixel readout circuit converts an optical signal into a light current based on a photoelectric conversion module, and provides a preset transconductance gain through a symmetric differential amplification structure in a charge integration amplification module, so as to amplify the light current based on the preset transconductance gain; charge integration is carried out on the light current to obtain integral voltage; and performing reset sampling and signal sampling on the integral voltage through the correlated double-sampling module to obtain a sampling voltage. The short-wave infrared pixel reading circuit provided by the invention adopts a symmetrical differential amplification input structure, has a relatively high common-mode rejection ratio and a relatively good anti-interference capability, and improves the anti-interference capability in an amplification process under the condition of not increasing power consumption; the correlated double sampling modules are concentrated in the reading circuit, signals are not transmitted for multiple times between pixels and a column-level circuit, the processing pressure of the column-level circuit is reduced, the number of circuit switches is small, time sequence control is simple, and the pixel area is reduced.

Presented are a noise shaping SAR-based delta-sigma modulator for a wide input signal range and input impedance amplification for bio-signal recording, and an operating method thereof. The noise shaping SAR-based delta-sigma modulator for a wide input signal range and input impedance amplification for bio-signal recording proposed in the present invention comprises: a correlated double sampling integrator that increases CMRR and reduces noise; an input sampling capacitor that samples in advance a previous output of the delta-sigma modulator when reflecting an output of the delta-sigma modulator to an input stage in order to amplify input impedance without additional amplifiers; an inverter-based amplifier that amplifies an input signal in order to acquire the wide input signal range; a noise shaping SAR for increasing the resolution; and a truncation logic that, when reducing bits output from the delta-sigma modulator to predetermined bits, feeding the predetermined bits back, and reflecting the fed bits to an input digital-analog converter, performs noise shaping via the noise shaping SAR in order to reduce a truncation error, and then performs truncation and feeds the truncated result back to the input digital-analog converter.

Improve the image quality in a solid-state imaging device that performs time delay integration. A correlated double sampling circuit generates a frame in which a predetermined number of lines are arranged, and each line includes a plurality of digital signals. A TDI frame memory retains the (K-1)th frame generated before the Kth frame. A time delay integration circuit performs a time delay integration process of adding a line having a predetermined address in the Kth frame and a line having an address at a certain distance from the predetermined address in the (K-1)th frame.

The present disclosure provides a CMOS image sensing integrated circuit based on a 5T, 8T, 14T hybrid pixel calculation unit, comprising: a photoelectric sensing array, a weight voltage generation module, a readout circuit and a control module; the photoelectric sensing array comprises a plurality of groups of hybrid pixel calculation units and a plurality of row selection switches, the types of pixel calculation units in the hybrid pixel calculation units include 5T, 8T and 14T, the photoelectric sensing array performs convolution multiplication and accumulation operation on the weight voltage of the convolution kernel through the pixel calculation unit, and outputs current; the weight voltage generation module is used for generating the weight voltage corresponding to the convolution kernel; the readout circuit is used for subtraction operation, current-voltage conversion and correlated double sampling; and the control module is used for generating a control signal. Through the present disclosure, the multiplication and accumulation operation in the sensing and convolution algorithm is automatically realized on the chip, parallel calculation and output are realized in the convolution kernel region, the weight does not need to be rewritten in the overlapping region of adjacent convolution kernels, the circuit power consumption is reduced, and the frame rate and operation efficiency are improved.

A readout circuit for a high-precision vibration sensor comprises an on-chip self-test circuit, a low-noise charge amplifier, a correlated double sampling circuit, a PID feedback control circuit, a phase compensation circuit and Sigma-Delta. A self-test signal is amplified by the low-noise charge amplifier, low-frequency noise and offsets are filtered out by the correlated double sampling circuit, then a self-test path and a working path of a vibration sensor are separated in the time domain by the PID feedback control circuit, the phase compensation circuit performs zero compensation and pole compensation on the signal, and Sigma-Delta converts an analog signal into a high-precision digital signal.

An image sensor includes: a pixel configured to operate in a high conversion gain mode and a low conversion gain mode during a readout period, and sequentially output a low conversion gain reset signal, a high conversion gain reset signal, a high conversion gain image signal, and a low conversion gain image signal as pixel voltages; a correlated double sampling circuit configured to compare the ramp signal with a pixel voltage received from the pixel and generate a comparison signal; and a counter circuit configured to generate a high conversion gain pixel value and a low conversion gain pixel value based on a comparison signal and a count code received from the correlated double sampling circuit, the count code having a code value that increases over time.

The application provides a resistance temperature sensor and a test method and a measurement method and a power switch system, which comprises a Wheatstone bridge, a driving stage circuit comprising a first driving circuit and a second driving circuit, two excitation ends connected to the Wheatstone bridge respectively, an analog-to-digital converter with a first input end and a second input end connected to two output voltage ends of the Wheatstone bridge respectively, one output end serving as an output end of the temperature sensor, a driving controller with an output end connected to the first driving circuit and the second driving circuit respectively and also connected to the analog-to-digital converter, and a sampling period comprising two measurement stages in sequence, the first driving circuit enabled in the first measurement stage and the second driving circuit enabled in the second measurement stage. The analog-to-digital converter is used to execute its working time sequence in sequence in a sampling period, quantize two measurement results respectively, and subtract the two quantization results to obtain an output result. The technical scheme of the application adopts correlated double sampling, and improves the precision of the measurement result.

The invention provides a charging control method. The charging control method comprises the following steps: determining a target correlated double sampling (CDS) frequency of an image sensor; determining a target configuration parameter of a power management integrated circuit (PMIC) based on the target CDS frequency; the PMIC is used for supplying power to the image sensor; wherein the power supply rejection ratio of the PMIC for supplying power to the image sensor based on the target configuration parameter is greater than the power supply rejection ratio of the PMIC for supplying power to the image sensor based on other configuration parameters; and controlling the PMIC to supply power to the image sensor based on the target configuration parameter. The invention further provides charging control equipment, computer equipment and a storage medium.

The invention relates to the technical field of infrared imaging, in particular to a low-power-consumption infrared reading circuit based on a phase inverter and a control method, and the low-power-consumption infrared reading circuit comprises a capacitance trans-impedance amplifier based on the phase inverter, a correlated double-sampling circuit based on the phase inverter and an analog-to-digital converter, the capacitor trans-impedance amplifier based on the phase inverter comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor and a first diode, and the correlated double-sampling circuit based on the phase inverter comprises a first sampling switch, a second sampling switch, a second capacitor, a third capacitor and a differential amplifier based on the phase inverter. By adopting the capacitor trans-impedance amplifier based on the phase inverter and a double-sampling circuit structure and utilizing the current multiplexing characteristic of the phase inverter, the problem that an infrared reading circuit is high in power consumption and difficult to deploy in an edge end low-power-consumption scene in the prior art is solved, and the power consumption of the circuit is remarkably reduced.

The invention belongs to the technical field of low-noise CMOS image sensors, and particularly relates to a row random noise suppression ramp generator, a related CMOS image sensor and a working method of the CMOS image sensor. The row random noise suppression ramp generator comprises a Vcm reference voltage generation module, an integral current Ibias generation module and an integrator module, a stable quiescent working point is established through sampling, and low-noise linear ramp voltage is generated. According to the sensor, a time sequence generator is used for overall planning, row logic gates pixel row output signals, column parallel PGA amplification is carried out, column parallel ADC is combined with a slope generator, and quantization and noise suppression are carried out based on correlated double sampling. Based on the row random noise suppression ramp generator, the invention further provides an acoustic CMOS image sensor adopting the row random noise suppression ramp generator, the row random noise can be effectively reduced, the performance such as the signal-to-noise ratio and the dynamic range of the sensor can be improved, and the acoustic CMOS image sensor is adaptive to a column parallel low-noise scene and has high practicability and application value.

The present invention discloses a single-electron readout circuit and method based on a composite dielectric grating photosensitive detector. The photosensitive detector includes a photosensitive transistor and a reading transistor formed on the same substrate. The two transistors share a composite dielectric gate. The composite dielectric gate includes a bottom dielectric layer, a charge coupling layer, a top dielectric layer and a control gate. The readout circuit includes a correlated double sampling circuit, an amplifier circuit and a quantization circuit. The correlated double sampling circuit is used to sample the drain current of the reading transistor, the amplifier circuit is used to amplify the voltage signal output by the correlated double sampling circuit, and the quantization circuit is used to perform single-bit quantization on the voltage signal output by the amplifier circuit. The present invention provides a low-noise, high-gain, high-frame-rate readout circuit and method based on a composite dielectric grating photosensitive detector, which can achieve single-electron level readout and solve the problem of high-performance imaging of high-resolution low-illuminance scenes.

The present invention discloses a low-area digital correlated double sampling circuit for multiplexed readout of multiple columns of pixels, and belongs to the technical field of CMOS image sensors. The present invention utilizes the selection of controlled switches and control signals to store only exposure quantization data in a correlated double sampling state, thereby reducing the use of reset quantization data storage units, and the correlated double sampling work of multiple columns of pixels can be completed with only one subtractor, thereby reducing the use of subtraction units. The present invention introduces three different data modes, and optionally outputs original exposure quantization data, original reset quantization data, and correlated double sampling quantization data, which helps to process and analyze distorted or smeared images using original exposure quantization data and reset quantization data, and evaluates the dark current and reset noise of pixel devices through original reset quantization data to evaluate the performance of pixel devices.