5117 results about "Data buffer" patented technology

An apparatus for collecting data from a plurality of diverse data sources, the diverse data sources generating input data selected from the group including text, audio, and graphics, the diverse data sources selected from the group including real-time and recorded, human and mechanically-generated audio, single-speaker and multispeaker, the apparatus comprising: means for dividing the input data into one or more data segments, the dividing means acting separately on the input data from each of the plurality of diverse data sources, each of the data segments being associated with at least one respective data buffer such that each of the respective data buffers would have the same number of segments given the same data; means for selective processing of the data segments within each of the respective data buffers; and means for distributing at least one of the respective data buffers such that the collected data associated therewith may be used for further processing.

A multi-cloud data replication method includes providing a data replication cluster comprising at least a first host node and at least a first online storage cloud. The first host node is connected to the first online storage cloud via a network and comprises a server, a cloud array application and a local cache. The local cache comprises a buffer and a first storage volume comprising data cached in one or more buffer blocks of the local cache's buffer. Next, requesting authorization to perform cache flush of the cached first storage volume data to the first online storage cloud. Upon receiving approval of the authorization, encrypting the cached first storage volume data in each of the one or more buffer blocks with a data private key. Next, assigning metadata comprising at lest a unique identifier to each of the one or more buffer blocks and then encrypting the metadata with a metadata private key. Next, transmitting the one or more buffer blocks with the encrypted first storage volume data to the first online cloud storage. Next, creating a sequence of updates of the metadata, encrypting the sequence with the metadata private key and then transmitting the sequence of metadata updates to the first online storage cloud.

A method and apparatus for synchronizing streaming media with multiple output devices. One or more media servers serve media streams to one or more output devices (i.e., players). For playback synchronization, one output device is the “master”, whereas the remaining output devices are “slaves”. More data is requested from the media server by the “master” device to maintain a nominal buffer fill level over time. The “slave” devices receive streamed data from the media server at the rate determined by the master device's data requests, and the average rate of data flow over the streaming network is thus controlled by the frequency of the single “master” device's crystal. “Slave” devices make playback rate corrections to maintain respective buffer fill levels within upper and lower threshold levels. For slow networks, each media data packet timestamp is calculated from the time the master's buffer reaches nominal level.

In-circuit emulation (ICE) and software debug facilities are included in a processor via a debug interface that interfaces a target processor to a host system. The debug interface includes a trace controller that monitors signals produced by the target processor to detect specified conditions and produce a trace record of the specified conditions including a notification of the conditions are selected information relating to the conditions. The trace controller formats a trace information record and stores the trace information record in a trace buffer in a plurality of trace data storage elements. The trace data storage elements have a format that includes a trace code (TCODE) field indicative of a type of trace information and a trace data (TDATA) field indicative of a type of trace information data.

A system and method for receiving a transported stream of data packets includes a buffer management device for receiving the data packets, unpacking the data packets, and forwarding a stream of data frames. The system and method further includes a first jitter buffer for receiving the data frames from the buffer management device and buffering the data frames, and a second jitter buffer for receiving the data frames from the buffer management device and buffering the data frames. In addition, the system and method includes a computationally-desirable jitter buffer selected from the first jitter buffer or the second jitter buffer by comparing a first jitter buffer quality and a second jitter buffer quality. The system and method also includes a decoder for receiving buffered data frames from the computationally-desirable jitter buffer.

Systems and methods are disclosed for the management of memory used in a crossfading operation in an electronic device. In one embodiment, a processor is used to alternately decode two audio streams, one which is being faded out and one which is being faded in to implement a crossfade. The two audio streams may be encoded in the same or different formats and may be alternately decoded such that resource usage is reduced. The amount of decoded data of both audio streams and other parameters may determine which audio stream is to be actively decoded. In certain embodiments, the decoded data may be stored in a circular buffer, and a delta is determined between the decoded data and the empty space of the buffer.

A terminal determines a target value of stream data to be stored in its buffer in relation to its buffer capacity and the transmission capacity of the network. Also, the terminal arbitrarily determines a delay time from when the terminal writes a head data of the stream data to the buffer to when the terminal reads the data to start playback in a range not exceeding a value obtained by dividing the buffer capacity by the transmission capacity. The target value and the delay time are then both notified to a server. Based on those notified values, the server controls the transmission speed so that the buffer occupancy of the terminal changes in the vicinity of the target value without exceeding the target value.

A packet processing device in which a receiving buffer free space notifying portion notifies a free space of a receiving buffer, an accumulation condition determining portion determines a size of a big packet based on the free space, and a reassembly buffer processor reassembles a plurality of receiving packets into a single big packet to be transmitted to the receiving buffer. A backward packet inclusive information reading circuit for detecting the free space based on information within a backward packet from the upper layer may be used as the receiving buffer free space notifying portion. Also, an application layer may be used as the upper layer so that the big packet is transmitted not through a buffer of a transport layer but directly to the receiving buffer.

A logging system includes an event receiver and a storage manager. The receiver receives log data, processes it, and outputs a column-based data “chunk.” The manager receives and stores chunks. The receiver includes buffers that store events and a metadata structure that stores metadata about the contents of the buffers. Each buffer is associated with a particular event field and includes values from that field from one or more events. The metadata includes, for each “field of interest,” a minimum value and a maximum value that reflect the range of values of that field over all of the events in the buffers. A chunk is generated for each buffer and includes the metadata structure and a compressed version of the buffer contents. The metadata structure acts as a search index when querying event data. The logging system can be used in conjunction with a security information/event management (SIEM) system.

A graphics system that may be shared between multiple display channels includes a frame buffer, an arbiter, and two pixel output buffers. The arbiter arbitrates between the display channels' requests for display information from the frame buffer and forwards a selected request to the frame buffer. The frame buffer is divided into a first and a second portion. The arbiter alternates display channel requests for data between the first and second portions of the frame buffer. The frame buffer outputs display information in response to receiving the forwarded request, and pixels corresponding to this display information are stored in the output buffers. The arbiter selects which request to forward to the frame buffer based on a relative state of neediness of each of the requesting display channels.

A compression method for a backup data buffer includes a plurality of backup entries for storing persistent data of a non-volatile memory device during at least one update operation. An address of the persistent data in the non-volatile memory device is stored in a driver buffer including address pages. Each address page includes address entries. The compression method includes the functions for marking as erasable an address entry included in a first address page of the driver buffer when the at least one update operation on the persistent data is completed. Address entries not marked as erasable or non-erasable are copied from the first address page to a second address page of the driver buffer. The second address page contains address entries not marked as erasable. The first address page is erased for rendering it ready to be written. The content of the second address page is written to the first, and the second address page is for future writings.

A data processing apparatus and method are provided for performing hazard detection in respect of a series of access requests issued by processing circuitry for handling by one or more slave devices. The series of access requests include one or more write access requests, each write access request specifying a write operation to be performed by an addressed slave device, and each issued write access request being a pending write access request until the write operation has been completed by the addressed slave device. Hazard detection circuitry comprises a pending write access history storage having at least one buffer and at least one counter for keeping a record of each pending write access request. Update circuitry is responsive to receipt of a write access request to be issued by the processing circuitry, to perform an update process to identify that write access request as a pending write access request in one of the buffers, and if the identity of another pending write access request is overwritten by that update process, to increment a count value in one of the counters. On completion of each write access request by the addressed slave device, the update circuitry performs a further update process to remove the record of that completed write access request from the pending write access history storage. Hazard checking circuitry is then responsive to at least a subset of the access requests to be issued by the processing circuitry, to reference the pending write access history storage in order to determine whether a hazard condition occurs. The manner in which the update circuitry uses a combination of buffers and counters to keep a record of each pending write access request provides improved performance with respect to known prior art techniques, without the hardware cost that would be associated with increasing the number of buffers.

A system and method for enabling the removal of decoded pictures from a decoded picture buffer as soon as the decoded pictures are no longer needed for prediction reference and future output. An indication is introduced into the bitstream as to whether a picture may be used for inter-layer prediction reference, as well as a decoded picture buffer management method which uses the indication. The present invention includes a process for marking a picture as being used for inter-layer reference or unused for inter-layer reference, a storage process of decoded pictures into the decoded picture buffer, a marking process of reference pictures, and output and removal processes of decoded pictures from the decoded picture buffer.

A logging system includes an event receiver and a storage manager. The receiver receives log data, processes it, and outputs a data “chunk.” The manager receives data chunks and stores them so that they can be queried. The receiver includes buffers that store events and a metadata structure that stores metadata about the contents of the buffers. The metadata includes a unique identifier associated with the receiver, the number of events in the buffers, and, for each “field of interest,” a minimum value and a maximum value that reflect the range of values of that field over all of the events in the buffers. A chunk includes the metadata structure and a compressed version of the contents of the buffers. The metadata structure acts as a search index when querying event data. The logging system can be used in conjunction with a security information/event management (SIEM) system.

A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries packets from the switch to the network. In the receive path, received packets are processed and switched in an asynchronous, multi-stage pipeline utilizing programmable data structures for fast table lookup and linked list traversal. The pipelined switch operates on several packets in parallel while determining each packet's routing destination. Once that determination is made, each packet is modified to contain new routing information as well as additional header data to help speed it through the switch. Each packet is then buffered and enqueued for transmission over the switching fabric to the linecard attached to the proper destination port. The destination linecard may be the same physical linecard as that receiving the inbound packet or a different physical linecard. The transmit path consists of a buffer/queuing circuit similar to that used in the receive path. Both enqueuing and dequeuing of packets is accomplished using CoS-based decision making apparatus and congestion avoidance and dequeue management hardware. The architecture of the present invention has the advantages of high throughput and the ability to rapidly implement new features and capabilities.

The present invention allows for an increase in programming parallelism in a non-volatile memory system without incurring additional data transfer latency. Data is transferred from a controller to a first memory chip and a programming operation is caused to begin. While that first memory chip is busy performing that program operation, data is transferred from the controller to a second memory chip and a programming operation is caused to begin in that chip. Data transfer can begin to the first memory chip again once it has completed its programming operation even though the second chip is still busy performing its program operation. In this manner high parallelism of programming operation is achieved without incurring the latency cost of performing the additional data transfers. Two sets of embodiments are presented, one that preserves the host data in a buffer until successful programming of that data is confirmed and one that does not require that success be achieved and that does not preserve the data thus achieving a higher rate of data programming throughput.

High availability (HA) protection is provided for an executing virtual machine. At a checkpoint in the HA process, the active server suspends the virtual machine; and the active server copies dirty memory pages to a buffer. During the suspension of the virtual machine on the active host server, dirty memory pages are copied to a ring buffer. A copy process copies the dirty pages to a first location in the buffer. At a predetermined benchmark or threshold, a transmission process can begin. The transmission process can read data out of the buffer at a second location to send to the standby host. Both the copy and transmission processes can operate substantially simultaneously on the ring buffer. As such, the ring buffer cannot overflow because the transmission process continues to empty the ring buffer as the copy process continues. This arrangement allows for smaller buffers and prevents buffer overflows.

A method for using buffer occupancy in uplink scheduling for a communication device includes a first step of sending buffer occupancy information and a time stamp indicating a last transmission opportunity provided to the communication device to an active set base stations. A next step includes utilizing the buffer occupancy information and time stamp to adjust a scheduling fairness setting for the communication device. A next step includes receiving scheduling information from a scheduler in accordance with the scheduling fairness setting. A next step includes transmitting on an uplink channel in accordance with the scheduling information.

A digital video decoding system receives packetized video data representing programs conveyed on a plurality of video channels. The system includes a plurality of buffers for storing encoded video data representing images of video programs conveyed on a corresponding plurality of video channels. An individual buffer, corresponding to an individual video channel, stores sufficient encoded video data to prevent an underflow condition following switching to decode a program conveyed on the individual video channel. A processor initiates switching to decode a program conveyed on a selected one of the plurality of video channels in response to a user channel selection input. A decoder decodes encoded video data received from one of the plurality of buffers corresponding to the program conveyed on the selected video channel as determined by switching initiated by the processor. The decoder also predicts a next channel to be selected by a user based on, (a) predetermined user channel and program preference criteria, (b) predetermined user channel navigation patterns, or (c) user data entry device sensory data.

The invention relates to methods for transmitting a buffer status report (BSR) in a mobile communication system, more particularly to the definition of rules for triggering, generating and transmitting buffer status reports. The invention also relates to a data transmission method utilizing new rules to decide data of which radio bearers is transmitted within a given transmission time interval. Moreover, the invention relates to scheduling method for radio resources that is taking into account additional scheduling—relevant information from the buffer status reporting and/or data transmission method. To avoid unnecessary grants from the network and to suggest an advanced handling of data transmissions the invention suggests a buffer status reporting and data transmission schemes that take into account the scheduling mode of data of radio bearers pending for transmission to decide whether to report on it in a buffer status report, respectively, whether to multiplex the data to a transport block for transmission.

A flash system has multiple channels of flash memory chips that can be accessed in parallel. Host data is assigned to one of the channels by a multi-channel controller processor and accumulated in a multi-channel page buffer. When a page boundary in the page buffer is reached, the page buffer is written to a target physical block if full, or combined with old data fragments in an Aggregating Flash Block (AFB) when the logical-sector addresses (LSA's) match. Thus small fragments are aggregated using the AFB, reducing erases and wear of flash blocks. The page buffer is copied to the AFB when a STOP command occurs. Each channel has one or more AFB's, which are tracked by an AFB tracking table.

The equalizer of the present invention operates on input multipath signal samples, preferably at chip or sub-chip resolution, to remove or substantially cancel the effects of one or more secondary signals from the main path signal. Using predetermined path information for one or more of the secondary path signals, including magnitude, phase, and time offset relative to the main path signal, the equalizer compensates input multipath signal samples by subtracting estimated secondary signal values from the input samples. For each input sample, the equalizer forms a sliced sample, where the sliced sample represents a nominal phase value defined by the modulation scheme used in the original chip or symbol transmission that is closest in value to the actual phase of the input sample. These sliced samples are held in a running buffer and used, in combination with the predetermined path information and scaling logic, to form the estimated secondary signal values for compensating the input samples.

A packet data switch is described comprising a crossbar switch fabric including a set of crosspoint buffers for storing at least one data packet, one for each input/output pair. An input queue is provided for each input-output pair and means are provided for storing incoming data packets in one of the queues corresponding to an input-output routing for the data packet. An input scheduler repeatedly selects one queue from the plurality of queues at each input and a data packet is transferred from the queue selected by the input scheduler from the input queue means to the crosspoint buffer corresponding to the input-output routing for the data packet. A back pressure mechanism is arranged to inhibit selection by the first selector of queues corresponding to input/output pairs for which the respective crosspoint buffer is full. Finally, an output scheduler repeatedly selects for each output one of the crosspoint buffers corresponding to the output and the switch is responsive to the output scheduler to complete the transmission through the switch fabric of the data packet stored in the crosspoint buffer selected by the output scheduler.

Provided is a mobile event-recording device that includes distributed elements within, attached to or otherwise mounted to a mobile vehicle, with the principal elements being: a first camera providing a real-time video signal that corresponds to an observed outboard live-motion scene; and a digital video recorder receiving the video signal provided by the camera and recording the video signal in response to a trigger signal (e.g., an activation switch for a light bar or siren, an air bag sensor signal indicating air bag deployment, or depression of an emergency button or a dedicated recording activation switch). The video recorder uses a buffer to receive and store the video signal so as to preserve the video signal during a programmable sliding (or rolling) time interval prior to the triggering event. Thus, in response to provision of the trigger signal, at least a portion of the video signal stored in the buffer is preserved for recording by the video recorder on a hard disk (or other long-term storage medium) and thereafter, the video recorder records directly on the hard disk (or other long-term storage medium).

A system for performing non-intrusive trace is provided which receives trace information from one or more processors. The trace system may be configured by a user to operate in various modes for flexibly storing or transmitting the trace information. The trace system includes a FIFO which is memory-mapped and is capable of being accessed without affecting processor performance. In one aspect, the trace system includes a trace buffer which receives trace information at an internal clock speed of the processor. In another embodiment, a compression protocol is provided for compressing trace messages on-chip prior to transmitting the messages to an external system or storing the messages in memory.

A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries packets from the switch to the network. In the receive path, received packets are processed and switched in an asynchronous, multi-stage pipeline utilizing programmable data structures for fast table lookup and linked list traversal. The pipelined switch operates on several packets in parallel while determining each packet's routing destination. Once that determination is made, each packet is modified to contain new routing information as well as additional header data to help speed it through the switch. Each packet is then buffered and enqueued for transmission over the switching fabric to the linecard attached to the proper destination port. The destination linecard may be the same physical linecard as that receiving the inbound packet or a different physical linecard. The transmit path consists of a buffer/queuing circuit similar to that used in the receive path. Both enqueuing and dequeuing of packets is accomplished using CoS-based decision making apparatus and congestion avoidance and dequeue management hardware. The architecture of the present invention has the advantages of high throughput and the ability to rapidly implement new features and capabilities.

A graphics system that is configured to utilize a sample buffer and a plurality of parallel sample-to-pixel calculation units, wherein the sample-pixel calculation units are configured to access different portions of the sample buffer in parallel. The graphics system may include a graphics processor, a sample buffer, and a plurality of sample-to-pixel calculation units. The graphics processor is configured to receive a set of three-dimensional graphics data and render a plurality of samples based on the graphics data. The sample buffer is configured to store the plurality of samples for the sample-to-pixel calculation units, which are configured to receive and filter samples from the sample buffer to create output pixels. Each of the sample-to-pixel calculation units are configured to generate pixels corresponding to a different region of the image. The region may be a vertical or horizontal stripe of the image, or a rectangular portion of the image. Each region may overlap the other regions of the image to prevent visual aberrations.

Various embodiments of the present invention provide systems and methods for data processing. For example, a variable iteration data processing system is disclosed that includes at least a first detector, a second detector, a decoder, and a queuing buffer. The first detector is operable to perform a data detection on an input data set at a first time. The decoder receives a derivation of an output from the first detector and performs a decoding process. Where the decoding process fails to converge, the decoder output is passed to the second detector for a subsequent detection and decoding process at a second time.

An audio/video (A/V) system for storing A/V programs includes an interface configured to receive a transport stream structured in packets and representing a plurality of A/V programs. Each A/V program is represented by a plurality of packets and is identified by program identification data in each packet. A storage management system is connected to receive the transport stream from the interface and to detect the program identification data of each received packet. A buffer is coupled to the storage management system and has a plurality of separate buffer portions. Each buffer portion is in communication with the storage management system to receive data of packets having program identification data related to a single A/V program and to store the data of the packets separate from data of packets having program identification data related to different A/V programs. A storage medium is coupled to the storage management system and has a plurality of separate storage files for the A/V programs. Each storage file receives data of the packets having program identification data related to a single A/V program and transferred from one of the separate buffer portions of the buffer.

A method for providing a buffer status report in a mobile communication network is implemented between a base station and a user equipment. When data arrives to buffers of the user equipment and the priority of a logical channel for the data is higher than those of other logical channels for existing data in the buffers, a short buffer status report associated with the buffer of a logical channel group corresponding to the arrival data is triggered. The user equipment is based on obtained resources allocated by the base station to fill all data of the buffer of the logical channel group in a Protocol Data Unit. If all data of the buffer of the logical channel group corresponding to the arrival data can be completely filled in the Protocol Data Unit, the short buffer status report is canceled. Otherwise, the user equipment transmits the short buffer status report.