373 results about "Shut down" patented technology

A Kubernetes migration orchestration manager includes a virtual CSI driver and a pod monitor interface. The virtual CSI driver enables the Kubernetes migration orchestration manager to interact with multiple types of storage system, to ensure that persistent volumes created on a first storage system type are able to be created and synchronized on a second storage system type. The pod monitor interface enables the Kubernetes migration orchestration manager to interact with the pod monitor of the Kubernetes cluster to artificially cause the pod monitor to apply a taint to nodes on the first site. This causes the pod monitor to shut down pods on Site A and to restart the pods on Site B. By stretching persistent volumes to Site B storage system and sequentially migrating pods to Site B, it is possible to orchestrate migration of the k8s cluster without shutting down the k8s cluster.

The present disclosure relates to the technical field of Graphics Processing Units (GPUs), and in particular to a GPU scheduling method and apparatus, and a storage medium. The method comprises: acquiring a migration command, the migration command being used for migrating a workload of a source Virtual Machine (VM) from a source GPU core to a target GPU core; on the basis of the migration command, establishing an association relationship between the source VM and a corresponding hardware identifier on the target GPU core; and on the basis of the association relationship after the migration, using the target GPU core to process the workload from the source VM. According to embodiments of the present application, while the VM is not shut down, the target GPU core is used to process the workload from the source VM, and thus the workload of the source VM is migrated from a high-load source GPU core to an idle target GPU core, so that the thermal migration between multi-core GPU cores can be achieved, the load between a plurality of GPU cores can be balanced, the pressure of a high-load GPU core can be reduced, the response time can be shortened, and the throughput rate can be increased.

Techniques include providing a post-login user interface of an operating system that accelerates navigation by decreasing interactions a user has with the operating system after a successful login. In some implementations, the post-login user interface includes an informed restore user interface that enables a user to select which session items to restore after an unexpected shutdown, such as a crash or a non-user initiated shutdown, for example due to low battery, after a new session, or after a system update. The informed restore user interface may enable a user to select some, all, or none of the applications for restore. The informed restore user interface may provide smart suggestions to help a user resume a task.

Disclosed herein are systems and methods for self-isolation of power-management integrated circuits (PMICs) of memory modules under and in response to fault conditions. In an embodiment, a PMIC is operably engaged with a memory module that is operably engaged with a platform. The memory module includes a non-volatile-memory block having a power supply controlled by the PMIC. The PMIC has a critical-fault signal pin that can be asserted to shut down the platform. The PMIC determines whether at least one critical fault occurred during a prior cycle, and also determines whether a critical fault occurs during a bootup sequence during a current cycle. Based on determining that a prior-cycle critical fault occurred and that a critical fault occurs during the bootup sequence, the PMIC sets a critical-fault indicator corresponding to the current critical fault; powers down the power supply; and does not assert the critical-fault signal pin.

The invention discloses a Linux system quick starting method and device based on dormancy mechanism optimization. The method comprises the following steps: in response to detection of shutdown, executing the following dormancy operations: actively releasing a memory cache and temporary data, setting the size of a dormancy mirror image as a preset lower limit value, and generating the dormancy mirror image with the corresponding size; and in response to detecting that the system is powered on, executing the following wake-up operation: directly starting by the clipped boot kernel, and after the clipped boot kernel is started and before the initial memory disk is initialized, reading the sleep mirror image and restoring the system state. According to the Linux system quick starting method based on dormancy mechanism optimization, the starting speed of the Linux system can be remarkably increased by optimizing the core process of the dormancy mechanism.

The invention discloses a system quick recovery method and system based on system mirror image management, and the method comprises the steps: initializing a boot partition of a functional blade in a heterogeneous cluster system and a boot flag bit of the boot partition, the boot flag bit being used for BIOS reading to select a corresponding boot partition when the functional blade is started; the method comprises the following steps: triggering a job operating system or a boot operating system of a target function blade to restart through a soft shutdown interface, and modifying a start boot flag bit in a BMC (Baseboard Management Controller) of the target function blade, so that the target function blade is sequentially restarted and switched into the boot operating system from the job operating system; and executing system quick recovery or backup for the target system partition under the boot operating system, and then restarting and switching to run under the specified job operating system so as to complete system quick recovery or backup. According to the method, the characteristics of the heterogeneous cluster system are combined, and automatic and flexible system mirror image fast rollback recovery is achieved when the heterogeneous cluster system has a serious fault.

The invention provides a system shutdown control method and device, electronic equipment and a readable storage medium, and relates to the technical field of terminals.The control method comprises the steps that in response to shutdown operation, a plurality of target tasks to be processed before system shutdown and the task type of each target task are obtained; determining a processing sequence of the plurality of target tasks according to the task type of each target task; according to the processing sequence of the multiple target tasks, controlling a target application corresponding to each target task to process the target task; after the multiple target tasks are processed, the system is controlled to be shut down. Before the system is shut down, according to the processing type of each to-be-processed target task, each target application is controlled to process the corresponding target task according to a certain sequence, the processing requirements of different types of target tasks before the system is shut down are met, and the flexibility of the system shutdown is improved.

The invention discloses a fragmented memory optimization method, which comprises the following steps: using a default memory allocation strategy to allocate the size of a memory block in the first starting process of a system, recording the application and allocation conditions of the size of the memory block in the first running process after the first starting of the system is ended, and before the first shutdown of the system, recording the application and allocation conditions of the size of the memory block. And according to the recorded application and distribution conditions of the memory block sizes, judging whether a condition for reformulating a first memory distribution strategy is met, if so, reformulating the first memory distribution strategy as the first memory distribution strategy used in the next starting process of the system, and if not, reformulating the second memory distribution strategy. And taking the default memory allocation strategy as a second memory allocation strategy. The generation of memory fragments can be reduced.

The invention discloses an application process monitoring method and device, a medium and a computer program product, and relates to the technical field of computers. Determining a weight score of the application process according to the business logic weight of the application process and the priority weight of the application process, determining a memory depletion score of the application process according to the process memory occupation parameter of the application process and the weight score of the application process so as to determine a target process, and executing a memory recovery operation on the target process, the process selection mode of the memory depletion terminator mechanism is optimized to meet the business logic requirement, so that the situation that the key process of the business application is shut down when the system memory is recovered is reduced, the normal operation of the system is guaranteed, and the user experience is improved.

The invention relates to the technical field of data storage, and discloses a solid state disk compatibility testing method which comprises the following steps: after a solid state disk is started, automatically collecting basic performance information of the solid state disk based on a Python script and generating a standardized log file; running performance operation of the solid state disk in a preset time period, and simultaneously executing multi-user or multi-task concurrent test operation based on the automated script; a script is used for calling a system startup command or a shutdown command, the next startup process is automatically triggered after shutdown, a startup and shutdown cycle test mechanism is formed, and the startup time, the initialization duration and the abnormal interruption record of the solid state disk are synchronously collected in each startup and shutdown process; when the system runs, the Python script is used for safely removing and reinserting the solid state disk. The problem that an existing test method is narrow in platform coverage range is solved.

Described herein are devices, systems, methods, and processes for enhancing the fault tolerance and efficiency of open loop liquid cooling systems in high-powered computing environments. A leak detector is integrated, which, upon detecting a leak, may signal the baseboard management controller to shut down the coolant flow in the affected section by closing corresponding solenoid valves, preventing a complete system shutdown. The solenoid valves and the leak detector may be part of an on-board cooling system within the server chassis, providing localized control and fault tolerance. Additionally, the system can utilize the solenoid valves to control the coolant flow rate based on the thermal load of the device, optimizing energy usage, and potentially allowing for a higher number of devices within a rack. The embodiments may offer a more resilient and energy-efficient liquid cooling system for devices including high-powered components.

The application provides a CPU platform fault log recording method and device, comprising: receiving the running log data stream output by the CPU debugging serial port in real time; collecting the sampling value of the key power supply voltage and monitoring the hardware signal line to obtain the restart event signal and the shutdown event signal; packaging into a structured log recording unit; and writing the compressed log data block back to the flash memory; in response to the external reading instruction, reading the log data block from the specified log area of the flash memory and transmitting to the host end diagnostic tool; reorganizing and displaying in time sequence for fault analysis. The application can construct a log recording channel completely independent of the main CPU and operating system without increasing any additional hardware cost, ensuring that even in the most extreme system failure scenario, the complete context information at the fault moment can be reliably saved, thereby greatly improving the diagnosis efficiency and accuracy of the occasional fault.

The invention relates to a fault diagnosis method and device in a PLC system, the PLC system and a storage medium, and belongs to the technical field of industrial automation control. The method comprises the following steps: acquiring a starting signal and a plurality of shutdown fault signals of equipment in real time; when it is detected that the starting signal jumps from starting to stopping, a reverse analysis process is triggered, and multiple shutdown fault signals are polled according to a preset priority sequence; if a certain shutdown fault signal is in a fault triggering state, generating a corresponding fault code, and keeping the duration of the fault code to be not less than a preset duration through a timer; and transmitting the fault code to the HMI for display, and recording the fault code to a PLC internal fault log database. According to the invention, through embedded real-time diagnosis and a reverse trigger mechanism, the real-time performance of fault capture and the automation of diagnosis are realized, and the efficiency of fault diagnosis is improved. And meanwhile, the diagnosis function block is only activated when the equipment is shut down, so that the CPU occupancy rate is greatly reduced.

Devices, methods, and systems for shutdown and restart management in a distributed computing environment are described herein. One method includes determining whether a backup of a workload in a distributed computing environment exists, causing a shutdown sequence of the workload to occur at a first predetermined time to shut down the workload, and causing a restart sequence of the workload to occur to restart the workload in the distributed computing environment.

The invention relates to a method and system for realizing a Power Loss control function based on a Feiteng CPU, and the method comprises the steps: adding a code in a BIOS to realize the communication between the BIOS and an MCU, and transmitting Power Loss strategies, such as Power Off, Power On and Last State parameters, set in the BIOS by a user, and an instruction sent to the MCU by the BIOS under the condition of normal shutdown to the MCU through an I2C bus; an MCU firmware program is developed, so that the MCU can communicate with a BIOS, can store related instructions sent by the BIOS, can judge the access and removal of an AC power supply, and can control whether a computer is automatically powered on or started up according to a Power Loss strategy set by a user after the AC power supply is accessed; the power Loss control function of the Feiteng computer is achieved through mutual cooperation of the MCU and the BIOS, and the industrial problem that a current computer applying a Feiteng CPU does not support the power Loss control function is solved.

The invention relates to the technical field of semiconductor design and manufacturing, in particular to an operation method and a design method of a multi-core chip and the multi-core chip. According to the technical scheme, circuit logics which can accept manufacturing defects are divided into the first logic group, and circuit logics which cannot accept manufacturing defects are divided into the second logic group; by reading the defect state of at least one computing core on the multi-core chip, the availability of a first logic group capable of accepting manufacturing defects in the computing core can be determined; and when the defect state indicates that the first logic group is unavailable, configuring a control register in the computing core to close the first logic group, and keeping a second logic group which is not accepted to manufacture defects in the computing core in a running state without influencing the functional circuit logic of the computing core. According to the technical scheme, the circuit logic, capable of accepting manufacturing defects, of the multi-core chip still has usability when the manufacturing defects occur, and the overall yield of manufacturing of the multi-core chip is improved in a disguised mode.

A storage device may simplify an ungraceful shutdown recovery process and reduce a time-to-ready (TTR) value associated with an ungraceful shutdown bootup sequence. The storage device may include a cache to store data structures associated with host data and meta data. The storage device may also include a controller to store the data structures in a host memory buffer. After an ungraceful shutdown, the controller may execute a bootup sequence and access the host memory buffer during the bootup sequence. The controller may use the data structures stored in the host memory buffer to recover the host data and meta data. The controller applies the host data and meta data to the bootup sequence to simplify the ungraceful shutdown recovery process and reduce the TTR value associated with the ungraceful shutdown bootup sequence.

Described herein are devices, systems, methods, and processes for enhancing the fault tolerance and efficiency of open loop liquid cooling systems in high-powered computing environments. A leak detector is integrated, which, upon detecting a leak, may signal the baseboard management controller to shut down the coolant flow in the affected section by closing corresponding solenoid valves, preventing a complete system shutdown. The solenoid valves and the leak detector may be part of an on-board cooling system within the server chassis, providing localized control and fault tolerance. Additionally, the system can utilize the solenoid valves to control the coolant flow rate based on the thermal load of the device, optimizing energy usage, and potentially allowing for a higher number of devices within a rack. The embodiments may offer a more resilient and energy-efficient liquid cooling system for devices including high-powered components.

The invention relates to a test method, system and device, computer equipment and a storage medium. The method comprises the steps that when it is detected that the server is in a system shutdown state, the server is controlled to be powered off and powered on through a power supply enable signal of a mainboard of the server; after the server is powered on, the server system is driven to be powered on and self-checked, and after self-checking is completed, the system is powered off. By adopting the method, the convenience of the AC loop test can be improved.

A system and method for maintaining database integrity. A first storage appliance receives data writes and increments an associated last sequence number (LSN) X upon each data write thereto. A second storage appliance receives data writes and increments an associated LSN Y upon each data write thereto and an external device is coupled to the first storage appliance and the second storage appliance. The first storage appliance and the second storage appliance comprise a cluster management database with data writes being replicated on both the first storage appliance and the second storage appliance. Upon the first storage appliance beginning to shut down, the LSN X is written to the external device.

Techniques for implementing Border Gateway Protocol (BGP) peering status-aware hitless reboot on a network device are provided. In one set of embodiments, at the time of shutting down for a hitless reboot, the network device can collect status information regarding its BGP peerings and can write this information to a file on non-volatile storage. Then, upon booting up after the hitless reboot, the network device can retrieve the file from the non-volatile storage and use the status information included therein to restore the BGP peerings as they existed prior to the hitless reboot.

A method includes storing, by a microcontroller, cache data of the microcontroller into a dynamic random-access memory (DRAM) in response to the microcontroller receiving a power-off command. The method includes operating, by a DRAM controller, the DRAM in a standby state in response to the microcontroller storing the cache data into the DRAM. The method includes determining, by the DRAM controller and when the DRAM is operating in the standby state, a time characteristic associated with the DRAM, a charge characteristic associated with the DRAM, or a combination thereof. The method includes determining, by the DRAM controller, whether a suspend to storage condition is satisfied based on the time characteristic, the charge characteristic, or the combination thereof. The method includes storing, by the DRAM controller, the cache data of the DRAM into a read-only memory (ROM) in response to the suspend to storage condition being satisfied.

The invention provides a chip internal multifunctional control circuit, which comprises a current module, a shutdown module and a state control module, and is characterized in that the current module is connected with the shutdown module and the state control module through a pin A; the shutdown module is configured to output a first control signal when the voltage of the pin A is smaller than a first voltage V1, so that the chip enters a shutdown mode, and output a second control signal when the voltage of the pin A is larger than the first voltage V1; the state control module is configured to enable the chip to enter a standby mode when the shutdown module outputs a second control signal and the voltage of the pin A is larger than the first voltage V1 and smaller than the second voltage V2, control the chip to enter a soft start mode when the shutdown module outputs the second control signal and the voltage of the pin A is larger than the second voltage V2, and control the chip to enter a soft start mode when the soft start mode is finished. And enabling the chip to enter a normal operation mode. According to the invention, accurate switching of multiple modes of shutdown, standby, soft start and normal operation is realized through a single pin.

The invention provides a firmware upgrading method and device, equipment and a medium, which are applied to the technical field of firmware upgrading, and the firmware upgrading method comprises the following steps: monitoring a host state of a server and reserving a configuration mark; when the host state is a shutdown state and the reserved configuration mark is a preset value, a target firmware mirror image is obtained, a configuration file corresponding to the target firmware mirror image is loaded, the configuration file comprises a target memory address area, and the target memory address area is a memory address area corresponding to reserved configuration; and flashing the target firmware mirror image to a target memory device based on the configuration file, and skipping the target memory address area in the flashing process. In this way, the new version of firmware takes effect when the flashing is completed and the server is started, multiple restarting is not needed, and the firmware upgrading efficiency can be improved under the condition that the configuration is reserved.

An Electronic Control Unit (ECU) provides security for an automotive system. The ECU is classified according to a Cybersecurity Assurance Level (CAL) and calculates a cryptographic value for one or more or all modules of the ECU. The calculated cryptographic value is compared with a stored cryptographic value. Based on the CAL classification of the ECU, either control to one or more modules of the ECU is provided or the ECU is shut down as follows: when the calculated cryptographic value matches the stored cryptographic value, control to the one or more or all modules of the ECU is provided; and, when the calculated cryptographic value does not match the stored cryptographic value, the ECU is shut down in one of a current boot cycle or a subsequent boot cycle.

The invention provides a PCIe topology switching method, device and equipment and a readable storage medium, and the method comprises the steps: obtaining the state information of current in-place PCIe equipment in response to a topology switching request; adjusting PCIe equipment associated with a non-gating target according to the gating target shown by the topology switching request and the obtained state information of the current in-place PCIe equipment; and issuing a gating instruction to enable the MUX chip to switch and gate to the gating target, and reconfiguring the PCIe resources after the MUX chip completes the switching and the gating. According to the technical scheme, the gating target of the MUX chip is dynamically adjusted, the PCIe device associated with the non-gating target is adjusted according to the current in-place PCIe device state information before switching, reconfiguration of PCIe resources in the server is achieved, shutdown or restarting is not needed, the hardware topology adjustment process is simplified, and the configuration flexibility and the operation and maintenance efficiency of the server are improved.

The invention discloses a stateless virtual machine backup method based on snapshots and a storage medium. The stateless virtual machine backup method comprises the following steps: acquiring a current mirror chain of each disk of a stateless virtual machine; judging whether a basic mirror image of the stateless virtual machine system disk is stored or not, and if not, storing the basic mirror image; judging whether the data disk is backed up or not, if yes, obtaining the position of the nearest backup data in the mirror chain, and performing incremental backup based on the backup data; if not, carrying out full-quantity backup on the data disk; updating the mirror chain; only the snapshot containing the data disk is allowed to be created in the limited startup state, and management data of the stateless virtual machine startup snapshot always points to the top end of a corresponding data disk mirror chain; while the restarted or shut-down system disk is ensured to be automatically restored, the full-amount and incremental backup of other disks of the stateless virtual machine is realized, and the influence of restoration is avoided.

The present application discloses a system switching method, device, electronic device and storage medium, which are applied to an electronic device installed with an operating system, wherein the operating system includes a first system and a second system of the same system type. When the electronic device runs the first system and receives a standby instruction, the upgrade status of the second system is detected. When it is detected that the second system has completed the upgrade, the electronic device is controlled to shut down. The system version of the first system is lower than the system version of the upgraded second system. When a power-on instruction is received, the electronic device is controlled to start up and run the second system. The present application completes the system switching by controlling the electronic device to shut down in response to the standby instruction when the upgrade of the second system is completed during the operation of the first system, and controlling the electronic device to start up and run the second system in response to the power-on instruction, so that some system defects or new functions are synchronized to the electronic device without the user noticing, thereby improving the user experience.

The invention discloses a digital control method and device for suppressing shutdown stress of a synchronous rectification converter, applied to the synchronous rectification converter, the synchronous rectification converter is used for controlling an output rectification process of a switching power supply, and the digital control method comprises the following steps: continuously detecting whether the switching power supply has a fault based on a preset digital control program; waiting for a driving rising edge signal of a switching tube in the synchronous rectification converter when the switching power supply is determined to have a fault; when a driving rising edge signal is received, PWM control of the synchronous rectification converter is closed based on a preset digital control program and the driving rising edge signal, and then the shutdown stress of the synchronous rectification converter is restrained. According to the method, the PWM control of the synchronous rectification converter is closed when the inductive current of the synchronous rectification converter is positive current, the stress problem of a synchronous rectification tube caused by the inductive negative current of the synchronous rectification converter under the no-load and light-load conditions is avoided, and the shutdown stress of the synchronous rectification converter can be effectively inhibited.

This invention discloses a starting point control method based on twin logic, relating to the field of integrated circuit technology. The method includes: after the chip is powered on, the logic generation circuit begins to establish the state of the target logic channel, and the twin logic channel internally monitors the establishment of this state synchronously; when the twin logic channel determines that the target logic state has been established, it outputs a starting point latch signal and generates a starting point control signal, triggering a timing circuit to sequentially generate a logic lock signal and a shutdown signal; the logic lock signal securely locks the target logic to the latch matrix, and the shutdown signal subsequently shuts down the logic generation circuit. This invention uses "logic-driven timing" instead of the traditional "power-driven timing," truly binding the timing starting point to the physical establishment state of the module, fundamentally avoiding timing races and locking errors; and it can adapt to process and temperature fluctuations, significantly improving system reliability while precisely reducing additional power consumption.