The invention relates to a memory error avoidance method combining software and hardware and a device of the memory error avoidance method. The memory error avoidance method comprises the steps that the mode of combination between an SMBIST and an HMBIST is adopted, if it is the set time late at night and an apparatus is in the non-busy state, the HMBIST is activated to run, and an external timer is shut down; after an HMBIST module starts to run, a CPU of the apparatus enters the sleep mode, the HMBIST module takes over control over an RAM, and whether faults are found or not during memory detection is judged; an SMBIST module calculates the initial address and the size of a memory needing testing according to the current period number, starts to detect the memory, and judges whether faults are found or not during memory detection. The device comprises a master processor module, a CPLD module and a memory module, wherein the master processor module is connected with the CPLD module, and the memory module is connected with the CPLD module. Compared with the prior art, the memory error avoidance method combining the software and the hardware and the device of the memory error avoidance method have the advantages that the design difficulty is reduced, the memory fault detection coverage rate is high, the detection speed is high, the hardware overheads are low, reusability is good, and the cost is low.