138 results about "Bus mastering" patented technology

An apparatus and a method for performing an authenticated encryption with associated data (AEAD) operation of an encrypted instruction and a golden tag stored in a memory device in an event of a cache miss are provided. The apparatus includes a bus control circuit, a block buffer, a tag buffer and an AEAD circuit. The bus control circuit receives a read address from a cache for reading the encrypted instruction and the golden tag from the memory device. The block buffer receives and stores the encrypted instruction from the bus control circuit, wherein a size of the block buffer is preset to be N times a size of one cache line. The tag buffer receives and stores the golden tag from the bus control circuit. The AEAD circuit performs the AEAD operation upon the encrypted instruction and the golden tag to check whether the encrypted instruction is tampered or not.

The invention discloses a communication link automatic selection and concurrent transmission method under a helicopter limit condition, and relates to the technical field of aerospace. Comprising the following steps: firstly combing airborne communication link information, retaining four types of links including a satellite, an ultra-short wave, a short wave and a data transfer radio, and collecting parameters by means of a bus controller; filtering the data by using a Kalman filtering algorithm, and removing abnormal data through threshold verification; and finally outputting stabilized data. Determining a task scene and an environment scene based on the stabilization data in combination with airborne control screen task selection and environment sensor data; according to the technical key points, a fault precursor monitoring technology is adopted, a standby link pre-activation technology is combined, a seamless switching mechanism is matched, the defect that an existing system depends on manual switching is overcome, the automatic switching time of the link is shortened to be within 0.5 second, the communication interruption rate under the limiting condition is reduced to be lower than 5% from 30% or above, the real-time communication requirements of rescue, patrol and the like are met, and the real-time communication efficiency is improved. Good use prospects are realized.

The invention belongs to the technical field of vehicle control, and discloses a networked automobile CAN bus control method and system, and the method comprises the steps: analyzing multi-source data of a networked automobile, constructing a multi-level control architecture based on an analysis result, setting a condition threshold value between control levels, and employing a genetic algorithm to dynamically optimize the condition threshold value as a control threshold value; constructing a threshold prediction model by using a time sequence prediction algorithm, predicting the state and operation scene change of an electronic control unit in the networked automobile by combining the obtained historical multi-source data, and generating a control prediction threshold; and in combination with the control threshold value and the control prediction threshold value, generating a cooperative control value through a cooperative recommendation strategy, and formulating a corresponding control strategy. According to the invention, a multi-level control architecture is constructed through multi-source data analysis, a communication threshold is dynamically optimized in combination with a genetic algorithm, the CAN bus load is reduced, the communication efficiency and real-time performance are improved, key message delay is avoided, and the stability and resource utilization capability of a vehicle-mounted network are enhanced.

This invention relates to the field of vehicular network testing technology, and discloses a domain controller network testing system, method, and apparatus. The system includes multiple vehicular Ethernet converters, Ethernet switches, and bus controllers. Each vehicular Ethernet converter is connected to a domain controller under test, and each vehicular Ethernet converter is also connected to the Ethernet switch. Each domain controller under test is also connected to the bus controller. The Ethernet switch and the bus controller are both connected to a host computer. The host computer is configured to: receive on / off configurations for the channels between the Ethernet switch and at least one of the domain controllers; receive test requests and send test signals to the bus controller; and acquire messages transmitted and received at a specified bus listening port or mirror port to obtain test results. This invention enables arbitrary channel configuration between domain controllers, meeting various testing requirements.

The invention relates to the technical field of automobile electronic testing, in particular to a script-based vehicle-mounted radio frequency receiving module automatic testing method. The method comprises the following steps: constructing a test execution environment configuration structure by integrating an equipment list, physical connection information and historical test records; performing test case parameter extraction, multi-channel operation time sequence arrangement and mapping of RS232 and CAN bus control commands to generate a configuration structure capable of driving script execution; binding a high-frequency test scene and a control channel, expanding a specific instruction sequence, controlling the triggering of a power supply and a radio frequency signal, and completing the collection of test response data; and performing timestamp alignment, protocol analysis and statistical comparison on the response data, generating a test report and updating a test case execution record. According to the method, whole-process automation of test environment modeling, script driving configuration, test execution and result analysis is achieved, the test efficiency and reliability are remarkably improved, and good reusability is achieved.

Systems, methods, and apparatuses for industrial equipment diagnostics are disclosed. Specifically, a bus controller operatively connected to a processor is physically connected to two or more controller area network (CAN) buses, wherein each CAN bus operates according to a different protocol. The bus controller is configured to control the rate at which messages are received on certain buses by adjusting parameters such as a baud rate and sample rate. The bus controller is further configured to filter or mask certain CAN bus messages based on identifiers within the messages. The bus controller is operatively connected to a remote processing system for processing the CAN bus messages from their raw data format into a useable format. The remote processing system performs diagnostic analysis on the processed CAN bus messages, and furthermore performs predictive analytics on the processed CAN bus messages to identify patterns or discrete events indicative of future system failures.

This invention relates to the field of EtherCAT bus control, and more particularly to a multi-axis compliant interpolation synchronization method based on EtherCAT. This invention calculates the maximum distribution quantity d. max The maximum distribution L during the increasing phase of the distribution is below. ac The maximum distribution L during the decreasing phase of the distribution de According to L ac +L de With l rem The invention determines the starting segment number N0, ending segment number N1, ending segment number N2, and total interpolation segment number N3 based on the magnitude of the distribution increase. It then calculates the required main axis distribution for the first N interpolation cycles and uses this calculated main axis distribution to calculate the slave axis distribution. This invention improves the speed smoothness of the cutting machine, reduces interpolation cycles while maintaining cutting accuracy, increases operating speed during intermediate interpolation cycles, and does not affect the vibration caused by corner speed changes at the transition points.

The application discloses a communication conflict detection control method, device and equipment and a storage medium. The application controls a bus slave module to send a request signal containing a unique feature identifier to a bus; controls a bus master module to listen to the bus in real time; controls the bus master module to identify bus slave modules participating in a conflict; controls the bus master module to allocate different sending time slots to the identified conflict bus slave modules; controls the bus master module to broadcast a control frame containing a conflict slave module list and corresponding sending time slots; controls each conflict slave module to perform local clock synchronization according to the allocated sending time slots after receiving the control frame; controls each conflict slave module to send data to the bus in the synchronized sending time slot; and controls the bus master module to enter a next round of listening period after each conflict slave module completes data sending. The application can realize accurate positioning and identification of bus communication conflicts, optimize communication resource allocation, and improve communication efficiency.

A bus configuration system includes a plurality of driver integrated circuits (ICs) coupled sequentially on a daisy chain, and a bus controller coupled to the plurality of driver ICs. Each driver IC includes a plurality of ports. The bus controller is used to generate a port definition code for configuring each port of the each driver IC. The bus controller includes a clock output port used to output a clock signal and a data output port used to output a data signal. When a port of the plurality of ports detects the clock signal, the port is configured as a clock input port.

The invention discloses a communication method for an SPI bus controller and a screen IC based on an LK stage. The communication method comprises the following steps that a, SPI controller hardware is configured, a GPIO function mode function is dynamically configured, and a register structural body is created; b, an SPI controller initialization function is configured, SPI communication behaviors are customized based on SPI controller parameters, and a data sending end sequence mode is configured; c, a data receiving function and a data sending function are packaged, the data receiving function directly reads the data from the receiving register, and the data sending function processes the data and then sends the data to the screen IC; and d, initializing the screen IC. According to the method, register access and control, read and write function packaging and platform embedding of the SPI bus controller are carried out in the LK stage, so that the SPI bus controller is called to receive and send data in the LK stage, the purpose of efficiently and accurately completing data receiving and sending is achieved, and the method has the advantages of being high in transmission rate, short in overall startup time and the like.

This invention discloses a motor control system, relating to the field of motor technology. It includes a data acquisition module, a switching module, an analog module, a transmission module, and a monitoring module. The data acquisition module acquires bus voltage values ​​and switching signals. The switching module switches the power source mode based on the bus voltage values ​​and switching signals. The analog module transmits analog signals from the CAN bus controller to the original equipment controller in electric mode. The transmission module transmits remote motor controller data and winding encoder data to the vehicle controller. The monitoring module controls the motor based on the remote motor controller data and winding encoder data. Through multi-module collaboration, the system can automatically switch between electric and fuel modes based on bus voltage values ​​and switching signals. Data transmission employs an anti-interference design. In terms of safety protection, it provides precise response from alarm to emergency stop, giving the system significant advantages in reliability, compatibility, and economy.

The embodiment of the application provides a kind of bus controller's verification device, method and system.The verification device includes: virtual processor and verification module;Virtual processor includes the virtual bus controller to be measured;Wherein, virtual processor and the virtual bus controller to be measured are hardware description file;Virtual processor is used to send bus control instruction to verification module by communication module according to the verification demand issued by host computer;Verification module is used to carry out bus data frame transmission with the virtual bus controller to be measured by bus transceiver according to bus control instruction;Host computer is used to verify the virtual bus controller to be measured according to the bus data frame received by the virtual bus controller to be measured.The scheme can verify the prototype of bus controller, can detect the error in design stage, and developer can modify the design of bus controller according to the verification result, reduce the cost and time loss caused by failure in later period.

A bus control unit includes: a compression execution unit, configured to compress sparse data by using a compression algorithm, to obtain compression data and compression attribute information; and a compression control unit, configured to generate, according to an instruction format of a communication bus, a data signal carrying the compression attribute information and the compression data, and send the data signal through the communication bus, where the compression attribute information is used for decompressing the compression data to obtain the sparse data.

1. The name of the design product: bus control valve. 2. The use of the design product: can be used alone, also can cooperate with various types of multi-way valve products to realize the closed-loop control of bus communication type. 3. The design points of the design product: in shape. 4. The picture or photo that can best show the design points: design 1 perspective view. 5. Design 1 is specified as the basic design.

A control circuit for a universal serial bus (USB) is provided. The control circuit includes a blocking switch, a current source circuit, a discharge circuit, and a controller. The blocking switch is connected between a power supply terminal of the USB and a bus power terminal of the USB. Before supplying power to the bus power terminal, the controller turns off the blocking switch and controls the discharge circuit to pull down an output voltage value at the bus power terminal. When the output voltage value is lower than or equal to a set voltage value, the discharge circuit stops pulling down the output voltage value, and controls the current source circuit to provide a test current to the bus power terminal. The controller obtains a resistance value at the bus power terminal based on the output voltage value and a current value of the test current.

Methods, systems, and devices for techniques for detecting a state of a bus are described. A memory device may fail to receive or decode (e.g., successfully receive or successfully decode) an access command transmitted to the memory device via a bus. The bus may enter or remain in an idle state which may cause indeterminate signals to develop on the idle bus. A host device may obtain the indeterminate signals from the idle bus and determine that the indeterminate signals include an error based on a signal that develops on a control line of the idle bus. The signal may be associated with a control signal that indicates errors in a data signal when the control signal has a first voltage, and the control line may be configured to have the first voltage when the bus is idle.

The invention discloses a multifunctional electrosurgical workstation and a control method thereof, and is characterized in that the workstation comprises at least two surgical operating instruments; a CAN bus, a CAN bus communication module and a system MCU; a control switch; the at least two surgical procedure instruments, the CAN bus communication module and the control switch are respectively connected to the CAN bus; and the CAN bus is connected with the system MCU through the CAN bus communication module. The CAN bus technology is applied to the multifunctional electrosurgical workstation, a plurality of surgical procedure instruments in the system are controlled through the CAN bus, system buses are greatly reduced, and the reliability of the system is improved.

This invention provides a multi-channel image sensor data transmission system and optoelectronic system based on FPGA-PCIe, belonging to the technical field of video processing and acquisition systems. The multi-channel image sensor data transmission system includes an FPGA circuit board, external memory, and a back-end image processing platform. The FPGA circuit board includes an integrated image processing module, a bus control module, and a PCIe interface control module. Utilizing an FPGA to process and acquire multiple sensor video streams saves hardware costs and circuit board area. It also ports various operation operators to the FPGA, enabling real-time processing and acquisition of the currently transmitted video stream, improving the real-time performance of the operation. Simultaneously, it achieves control and transmission of multiple video streams, meeting the requirements for data transmission agility and high speed. This solves the problem in existing methods where inconsistent video resolutions and frame rates from different image sensors lead to insufficient data bandwidth to meet protocol requirements, resulting in the inability of PCIe devices at both ends of the FPGA to communicate normally.

The utility model provides a kind of adjustable seed cultivation box, it is related to agricultural engineering technical field, including seed cultivation box, the inside of seed cultivation box is provided with seed cultivation adjusting assembly, the upside of seed cultivation tray is provided with three-way atomizing nozzle, the inside rear end of seed cultivation box is provided with moisture absorbing sponge, the left and right sides of fixed support are all provided with electric control light supplementing lamp, the inside top end of seed cultivation box is equipped with bus controller;According to the demand of seed growth stage to illumination, bus controller will control electric control light supplementing lamp automatic regulation illumination intensity and irradiation time, and electric control light supplementing lamp can be from two sides respectively seed in seed cultivation tray is irradiated, reduce illumination dead angle, cooperate oxygen content inductor real-time monitoring box oxygen concentration, if lower than set value, oxygen supply pump is automatically started, oxygen is transported to the box by oxygen supply port, ensure that seed is in sufficient oxygen environment Healthy growth, improve germination rate.

The application provides a method and system for multiprocessor time division multiplexing GPIO, the method runs in a chip and comprises the following steps: initializing the value of each bit of a register to indicate the priority of a processor, the processor is connected with the corresponding bit of the register; gating a first processor to control a GPIO module; when the Nth processor needs to obtain the control right of the GPIO module, modifying the value of the corresponding bit of the register connected with the Nth processor in response to the interaction between the Nth processor and the first processor to obtain the control right; sending an enable signal of a bus control operation to enable the Nth processor to send a bus control operation to the back end; the Nth processor is any processor different from the first processor. Based on the method, a system for multiprocessor time division multiplexing GPIO is also provided. The application adopts the mode of multiprocessor time division multiplexing, uses the existing pins, and when the number of processors increases, different processors can be time division multiplexed through the priority arbitration scheme mechanism.

The invention discloses a multi-battery-pack parallel charging and discharging switching method and system. The battery pack is of the same charging and discharging output interface type, and each battery pack comprises a charging control switch unit, a discharging control switch unit, a bus controller and a control unit. In the method, a control unit receives a bus signal through a bus controller, confirms the high-voltage / low-voltage attribute of the control unit, the current charging and discharging state and the states of other switch units, further controls the state of the switch unit of the control unit and selects a communication mode (a periodic communication mode or an instant communication mode) of the bus controller; when the system needs to operate the charging and discharging control switch unit when discharging is converted to charging, charging is connected to a low-voltage pack, charging is converted to discharging, discharging is connected to a high-voltage pack and the like, an instant messaging mode is switched; and when the system identifies that the current pack is in a discharging and low-voltage pack or a charging and high-voltage pack, starting current monitoring interruption. According to the method, rapid switching of multi-pack parallel charging and discharging is realized, and the response efficiency and the collaboration of the system are improved.

The application relates to the technical field of automobiles, in particular to an online upgrading bus message collection method, device, equipment and storage medium. The application embodiment collects messages on a bus, and the messages on the bus can truly record data that is truly interacted between an OTA module and a controller. If data appearing on the bus does not appear on the log of the controller, it can be positioned that the controller upgrading is abnormally caused by a fault of a bottom network layer of the controller, so that the bus controller does not receive the data. If data not appearing on the bus appears on the log of the OTA module, it is indicated that the controller upgrading is abnormally caused by a fault of a bottom network layer of the OTA, so that the controller cannot receive the data sent by the OTA module. It can be known from the above analysis that the application can accurately position the controller upgrading abnormality reason by collecting the messages on the bus.

An apparatus, system, and method for outputting status information of an internal storage drive. One apparatus includes a mounting tray configured to hold a storage drive, a light pipe coupled to a light-emitting diode (LED) of the storage drive, and a light sensing module coupled to the light pipe. The light sensing module is configured to receive a light signal from the LED, generate a serialized electrical signal based on the light signal, and output the serialized electrical signal to a bus controller, where the serialized electrical signal indicates status information of the storage drive.

The invention relates to the technical field of controllers, in particular to a high-speed communication bus controller. The control module is used for storing flash memory information corresponding to each flash memory, and the flash memory information comprises type information, configuration information and address information corresponding to each flash memory; flash memory information corresponding to the flash memories is transmitted to the state conversion module according to a preset sequence; the state conversion module is used for converting the flash memory information corresponding to each flash memory, transmitting the converted flash memory information to each flash memory, and transmitting a flash memory transmission state signal to the chip selection management module; the chip selection management module is used for determining a target polling sequence according to a user instruction, and the target polling sequence comprises a preset polling sequence and a preset non-polling sequence; and activating the currently selected target flash memory according to the target polling sequence and the flash memory transmission state signal. Therefore, flash memories of different types and different configurations can be managed at the same time, different numbers and types of flash memories can be adapted through parameter configuration, and the method is suitable for various electronic devices needing to efficiently manage multiple flash memories.

The invention discloses a bus-based intelligent control method and system for a thermal-mechanical coupling distributed deicing system, and the method comprises the steps: feeding back the related information between all distributed intelligent nodes to a central energy storage control unit through a bus after the system is powered on; in a normal working mode, the central energy storage control unit communicates with the plurality of distributed intelligent nodes through a CAN bus, and the central energy storage control unit sends related instructions to the distributed intelligent nodes according to a preset time sequence; each distributed intelligent node executes a corresponding task according to the received related instruction; and in a maintenance mode, the upper computer controls the central energy storage control unit and the distributed intelligent nodes through the CAN bus to complete maintenance setting, parameter loading configuration and related query of the intelligent nodes. According to the invention, the distributed design based on the bus is adopted, the collaboration and efficiency of each deicing area of the unmanned aerial vehicle are improved, and the requirements of different numbers of deicing areas of aircrafts of different models can be met by flexibly increasing and decreasing the intelligent nodes.

1. Name of the product in this design: CAN bus control unit (proportional valve). 2. Application of this design: Used in the field of industrial automation to achieve continuous adjustment and control of hydraulic / pneumatic systems via CAN bus. 3. The key design feature of this product is its shape. 4. The image or photograph that best illustrates the design's key points: 3D view 1.

Systems and methods are provided for using subsystem metrics to dynamically adjust the bandwidth (BW) scaling factor used when voting for BW needs based on the BW of monitored traffic. For a CPU core, for example, it can be inefficient to use a static BW scaling factor when other core metrics provide extra information that can improve power consumption efficiency without degrading performance or user experience. Dynamically adjusting or selecting the BW scaling factor based on metrics is more efficient than using a static scaling factor and can result in greater efficiency in terms of achieving lower power consumption without degrading performance or user experience.

The invention discloses a system on chip supporting data transmission, a data transmission method and electronic equipment. The system on chip comprises a processor core used for performing read operation on a state register of the direct memory access controller, obtaining a working state corresponding to the direct memory access controller, and responding to the working state corresponding to the direct memory access controller as a first preset state, performing write operation on an enable register of the direct memory access controller to enable a data transmission function of the direct memory access controller; the direct memory access controller is used for responding to the enabling data transmission function, executing data transmission operation between a data buffer area of the off-chip memory and a data register of the bus controller, responding to completion of the data transmission operation, and performing write operation on a state register of the direct memory access controller; and setting the working state corresponding to the direct memory access controller as a second preset state. According to the invention, the number of system interruptions can be reduced and data transmission delay can be reduced.

The invention provides an AD acquisition system based on a PCIE bus and a data acquisition control method, and the system comprises a multi-channel AD acquisition module which is used for carrying out the synchronous acquisition and digital conversion of multi-channel analog signals, and obtaining the digitalized acquisition data; the high-speed data transmission module is used for carrying out caching and format conversion on the digitized collected data in a DMA (Direct Memory Access) mode; the PCIE bus control module is used for establishing a high-bandwidth data path between the FPGA and the CPU through a PCIE bus and managing DMA transmission and interaction of a control instruction; the acquisition configuration module is used for receiving configuration parameters from the CPU end and dynamically configuring the multi-channel AD acquisition module and the high-speed data transmission module; wherein the multi-channel AD acquisition module, the high-speed data transmission module and the acquisition configuration module are integrated at an FPGA (Field Programmable Gate Array) end, and perform data and instruction interaction with a CPU (Central Processing Unit) end through a PCIE (Peripheral Component Interface Express) bus control module. According to the scheme, performance breakthrough of a multi-channel high-speed AD acquisition system is realized, and a high-reliability solution is provided for the fields of scientific experiments and the like.

This invention relates to the field of distributed fiber optic sensing technology, and provides a method and apparatus for real-time processing of multi-parameter sensing data. The invention converts multiple sensing signals into corresponding digital signals; transmits these digital signals to appropriate processing modules according to their parameter types; the processing modules process the received digital signals and then send write requests to a bus control arbitration module; the bus control arbitration module uses the host number carried in the received write request to establish communication between the processing modules and a data cache control module; the data cache control module converts the received write request into a processing command and sends it to the data cache storage. Executing the processing command enables communication between multiple processing modules and the data cache storage, thus meeting the requirements for integrated real-time processing of multiple parameter data.