369 results about "Bus mastering" patented technology

The invention provides a data synchronization method which can be applied to the technical field of computer communication. The data synchronization method comprises the steps that a synchronization request initiated by a local server is responded, a virtual disk mirror image generated by converting a target file through the local server is received through a preset transmission channel, and the synchronization request carries an editing mode identifier of the target file; mounting the virtual disk mirror image to a serial bus control port of a remote server, so that the virtual disk mirror image can be identified as a removable storage device; if the editing mode identifier represents that the target file is in an editable state, acquiring change information generated by modifying the target file by a local server and / or a remote server by monitoring a file change event on the removable storage device in real time; and dynamically updating the virtual disk mirror image based on the change information to complete modification synchronization of the target file. The invention further provides a mirror image mounting method and device and a storage medium.

The invention discloses a shared cache system applied to a real-time network terminal chip. The shared cache system comprises queue management, enqueue scheduling control, dequeue scheduling control, write bus control, read bus control, a data cache, a register module, an RXFIFO module and a TXFIFO module. According to the cache allocation strategy, the variable-length data is stored by using the fixed-length unit. The user can customize and configure the private space, the residual space is the shared space, and the storage utilization rate is high. The shared cache is mainly used for storing data packets sent by an external application layer through a host interface. And storing the received data packet, extracting frame information according to a network flow protocol, and directly discarding frames which do not meet the protocol. The shared cache is provided with a dynamic cache structure, the state of each queue can be updated in real time, frame loss is prevented, and the data stream processing capacity is improved. And meanwhile, complex hybrid scheduling of a real-time network is met. The whole shared cache is subjected to anti-radiation reinforcement, the scene requirement of space navigation application is met, and high reliability is achieved.

The invention provides a PCIe (Peripheral Component Interconnect Express)-Ethernet high-speed data transmission system based on an FPGA (Field Programmable Gate Array), which belongs to the field of communication of digital circuits and comprises a PCIe interface module, a gigabit Ethernet interface module, a DDR3 (Double Data Rate 3) cache module and an AXI (Advanced eXtensible Interface) bus control module. The high-speed data transmission capability of the PCIe interface and the flexible port expansion capability of the gigabit Ethernet interface are integrated, and a user datagram protocol (UDP)-based control logic is constructed to realize data interaction between the PCIe and the gigabit Ethernet, so that high-speed and reliable data transmission is realized; and the high requirements of a high-speed signal acquisition and playback system and the like on the data transmission rate and reliability are met.

The invention discloses a concurrency control method and device, electronic equipment, a storage medium and a product. The method is applied to a concurrency control system comprising a processor and a bus controller, and comprises the steps that the processor responds to an atomic operation request of a target thread and sequentially sends a storage area switching instruction and a register operation instruction to the bus controller; the bus controller responds to the storage area switching instruction and the register operation instruction, executes storage area switching operation, generates a bus occupation maintaining signal and continuously executes register read-write operation in a target storage area; the processor sends a scheduling request to an operating system, so that the operating system improves the priority of the target thread to be a first priority; and the bus controller generates a bus release signal after the atomic operation of the target thread is finished. According to the scheme, through cooperation of the processor and the bus controller, atomized execution of thread Bank switching and register reading and writing is achieved, and the concurrency performance is improved while the reliability and consistency of data are ensured.

The invention provides a bus control method, a chip, a bus architecture, electronic equipment and a readable medium. The chip comprises a processor and an interface. The processor is used for receiving a first instruction through the interface, controlling the chip to access the SPMI bus based on the first instruction and monitoring data transmitted by the SPMI bus after the chip accesses the SPMI bus, and the SPMI bus is connected with a first node and a second node and is used for transmitting communication data between the first node and the second node; and the processor is also used for establishing connection between the control chip and the first node and the second node through the SPMI bus, disconnecting the connection between the first node and the second node, obtaining second data based on the first data, and sending the second data to the second node when monitoring that the data transmitted by the SPMI bus comprises the first data. Data in the master-slave system based on the SPMI bus is controlled through external equipment such as a chip.

The invention discloses an anomaly detection method and device for a communication bus, the anomaly detection method and device are applied to a system-on-chip, the system-on-chip is integrated with a bus controller and a central processing unit running driving software, and the anomaly detection method comprises the steps that the bus controller monitors a clock line of the communication bus after the communication bus enters a data transmission state; under the condition that the duration of the low level of the clock line exceeds a preset duration, judging that the clock line is abnormal, and generating an interrupt signal; reporting the interrupt signal to a central processing unit; the driving software reads the state information of the bus controller through the central processing unit; analyzing the state information, and determining an expected state of the bus controller to the clock line; under the condition that the expected state is the low level, determining that the equipment causing the clock line abnormity is a bus controller; and under the condition that the expected state is the high level, determining that the equipment causing the clock line abnormity is the external equipment. Therefore, manual intervention can be reduced, and the problem solving efficiency and the system reliability are improved.

The invention provides an FPGA (Field Programmable Gate Array) implementation method for receiving and transmitting 16-path CAN (Controller Area Network) and 16-path serial port data. The FPGA implementation method comprises the following steps of: constructing a hardware architecture suitable for efficiently receiving and transmitting the 16-path CAN and 16-path serial port data by utilizing the characteristic of cooperative work of a processing system PS of XC7Z045FFG900-2 and a programmable logic PL; a CAN bus controller on the PL side is configured; configuring a serial port transceiver chip at a PL side; a ping-pong buffering function on a PL side is realized; establishing register mapping; and a double-AXI interface collaborative interaction mechanism of the PL side and the PS side is realized. The method has the beneficial effects that the ping-pong buffer technology and the parallel processing capability of the FPGA are adopted, so that efficient concurrent processing of 16-path CAN and 16-path serial port data is realized; through reasonable hardware design and register configuration, the stability of communication between the CAN bus and the serial port is ensured; based on the programmable characteristic of the FPGA, the system is flexibly configured and adjusted according to different application requirements; the advantages of an XC7Z045FFG900-2 hardware platform are fully exerted, and the resources of the PL side and the PS side are reasonably distributed and utilized.

System and method for a bottom hole assembly (BHA) in production tubing including an electrical submersible pump (ESP), multi-resettable packer assembly, sensor, power and communications bus, and control system. The multi-resettable packer assembly includes a multi-resettable packer, a port sub hydraulically connecting production tubing to the ESP, an inner mandrel inside the multi-resettable packer axially movable within the multi-resettable packer and port sub, and a stroker tool configured to compress and decompress the multi-resettable packer to seal and unseal an inner surface of production tubing. The stroker tool includes slips to grip the inner surface and a piston that extends from and retracts into the stroker tool. The sensor is configured to measure operating data including a pressure measurement. The power and communications bus powers and transmits signals to the BHA. The control system monitors operating data and controls the stroker tool via the power and communications bus.

The invention discloses an anti-interference system for a slip ring communication technology, and belongs to the technical field of communication. Aiming at the problems of electromagnetic interference, mechanical vibration and unstable contact of monocrystalline silicon furnace equipment, a collaborative solution is provided. The system comprises a conductive slip ring assembly, a dynamic shielding module, an asymmetric differential transmission module, an intelligent filtering module, an environment sensing module and a contact impedance compensation module, and real-time cooperative control is realized through a bus controller. The dynamic shielding module adopts a liquid metal micro-channel layer and a piezoelectric driving layer, the shielding density is dynamically reconstructed according to the electromagnetic interference frequency band and the vibration intensity, and broadband noise is suppressed; the asymmetric differential transmission eliminates common-mode interference through dynamic phase compensation; the intelligent filtering module adaptively adjusts parameters of a band elimination filter based on a deep learning model, and accurately suppresses time-varying interference; the carbon nanotube composite electric brush stabilizes contact impedance through a pressure feedback mechanism. The system is obviously superior to a traditional static shielding and fixed filtering scheme, and reliable communication requirements are guaranteed.

The invention relates to the technical field of servers, and discloses a conflict processing method and device. The method comprises the following steps: acquiring a state value of a first register from a bus state management chip under the condition that a first computing node determines that an access request needs to be sent to a bus arbitration chip; when the access request is a super control right access request and the state value of the first register is a second state value, a control request is sent to a bus state management chip, and the control request is used for requesting to use a bus super control right; and after the state value of the first register is updated to the first state value from the second state value and the state value of a second register corresponding to the first computing node is updated to the first state value, sending the access request to a bus arbitration chip. Therefore, effective management of the bus control authority is realized, and access conflicts are avoided.

An apparatus and a method for performing an authenticated encryption with associated data (AEAD) operation of an encrypted instruction and a golden tag stored in a memory device in an event of a cache miss are provided. The apparatus includes a bus control circuit, a block buffer, a tag buffer and an AEAD circuit. The bus control circuit receives a read address from a cache for reading the encrypted instruction and the golden tag from the memory device. The block buffer receives and stores the encrypted instruction from the bus control circuit, wherein a size of the block buffer is preset to be N times a size of one cache line. The tag buffer receives and stores the golden tag from the bus control circuit. The AEAD circuit performs the AEAD operation upon the encrypted instruction and the golden tag to check whether the encrypted instruction is tampered or not.

The invention discloses a 1553B bus test experiment method and system, and relates to the technical field of data processing, and the system comprises a 1553B communication medium replacement test module which evaluates the influence of a medium on the communication quality through the comparison of signal waveforms and data transmission performance under different media; the 1553B hardware cognitive test module is used for sending an instruction and acquiring feedback data of the steering engine and the sensitive equipment, and is used for evaluating the control precision and the response speed; the 1553B transmission protocol test module simulates and captures a differential signal of a 1553B bus, and verifies whether a data frame format and a command field accord with a protocol standard; the inter-node communication test module is used for analyzing the communication performance of the nodes by recording the data transmission quantity, the error rate and the like between the nodes; and the 1553B bus control and data acquisition test module is used for acquiring feedback of the steering engine and the sensitive equipment and calculating the motion precision and the accuracy of attitude feedback.

The invention discloses a data output method of a distributed control system and a related device, and relates to the field of industrial control, and the method comprises the steps: setting data areas with different output periods in a shared memory, configuring different spin locks for the different data areas, processing obtained target output data by a first core, and outputting the target output data to a second core; and obtaining the spin lock of the target output data area in the shared memory. And writing the target output data into a target output data area, and releasing the spin lock. And an output data notification is sent to the second core, and the second core responds to the notification to obtain the spin lock of the target output data area, reads the data in the target output data area and sends the data to the corresponding IO module through the CAN bus controller. Therefore, according to the scheme, the output data of different periods in the shared memory are protected through different spin locks, the waiting time for obtaining the spin locks is avoided, and the real-time performance of data output is improved. Meanwhile, the utilization rate of SoC resources is improved.

The invention relates to the technical field of bus control, in particular to a method and system for controlling and monitoring landing light based on a CAN bus. The method comprises the following steps: setting a light control node in an aircraft landing light system, and performing control network connection and landing light local response control on the light control node and a central control unit by using a CAN bus protocol to generate a landing light local response control instruction; starting corresponding landing light in an aircraft landing light system according to the landing light local response control instruction, performing light condition real-time monitoring and judgment analysis, and if the landing light is determined to be in an on-light state, performing brightness non-uniformity control management so as to execute on-state brightness non-uniformity control work; and if it is determined that the landing light working state is a closed state, light operation fault control management is carried out to execute closed state fault adjustment control work. The intelligent level of the landing light control system can be improved.

The embodiment of the invention discloses a thermal runaway early warning method, electronic equipment and a storage medium. The thermal runaway early warning method comprises the steps that all operation parameter signals in a battery management system are detected; when it is monitored that the operation parameter signal is a preset wake-up signal, pressure information, voltage information and temperature information of a battery pack and the communication condition of a bus controller in a battery management system are obtained; controlling a target component of the battery management system based on the pressure information, the voltage information and the communication condition; based on the pressure information, the voltage information, the temperature information and the communication condition, warning information of the battery management system is generated, and according to the scheme, thermal runaway early warning can be conducted on the battery pack timely and accurately.

The invention relates to a single-machine obstacle avoidance method and system based on a millimeter wave radar and a camera, and the method comprises the steps: transmitting a frequency modulation continuous wave signal through the millimeter wave radar, collecting and preprocessing environment original data, and outputting a target list; based on the target list, when the target meets a preset signal-to-noise ratio condition and the speed exceeds a preset speed threshold value, triggering a camera to collect an image, performing real-time classification on the image through a lightweight convolutional neural network model, and outputting a classification result and a bounding box; performing space-time alignment on a target list and a classification result, dynamically allocating weights of radar data and visual data by adopting a confidence weighted fusion algorithm, associating the same target through distance calculation, and outputting a fused target attribute; based on the fused target attributes, constructing a three-dimensional decision matrix, and generating an obstacle avoidance strategy according to a preset priority rule; and converting the obstacle avoidance strategy into a bus control instruction, and controlling the vehicle to execute a corresponding alarm or brake response action.

The invention discloses a reliability test verification method for a CAN bus control module in an MCU, and relates to the field of chip test verification, and the method comprises the following steps: a CAN bus controller is integrated into the MCU through a bus interconnection mode, and the method is mainly divided into an interface management logic part, a state control logic part, an error detection logic part and an information buffer part; an MCU integrated with a CAN control module is used as a single node, a double-node frame information transmitting and receiving mode is adopted to build a test platform, a signal control module is added to apply interference to different positions where the nodes transmit the frame information, the error condition in real use is simulated, and the test efficiency is improved for different tests. And the correctness of the verification result of the CAN control module is determined by detecting the output signal of the MCU and the signal on the bus.

The invention discloses an IoT (Internet of Things) device control method and system based on a distributed soft bus, and the method comprises the steps: carrying out the device discovery and searching in a preset local area network according to a device networking instruction when the device networking instruction is received, and determining a plurality of target discovery devices; acquiring a distributed soft bus, and performing networking connection on the source device and the plurality of target discovery devices according to the distributed soft bus to obtain a soft bus control network; the method comprises the following steps: acquiring equipment log information of each networking equipment in a soft bus control network in real time, and if the networking equipment is judged to be in an equipment abnormal state according to the equipment log information, carrying out equipment node adjustment processing on the soft bus control network so as to realize normal operation between IoT (Internet of Things) equipment. According to the invention, wireless networking between devices of different communication protocols can be realized by adopting the distributed soft bus, the state of the networking device is monitored and controlled in real time, and the transmission efficiency between IoT devices can be effectively improved.

The invention relates to a shared bus type distributed MBIST system, and belongs to the technical field of MBIST architecture. According to the shared bus type distributed MBIST architecture, a Memory Interface module in a Tesent MBIST architecture is removed, an MBIST controller is reserved, and a shared bus controller is additionally arranged in the MBIST controller, so that a data path and a control path are built between the MBIST controller and Memory, and the data path and the control path comprise an address bus, a data bus, a read-write enable, a chip selection enable and other control buses which can be reused and are used for accessing the Memory. According to the shared bus type distributed MBIST architecture, a Memory Interface module is not needed, the problems that the chip area and power consumption are large due to the fact that multiple Memory Interfaces need to be adopted at present are solved, logic resources can be reduced to the maximum extent, the logic complexity can be reduced, and testing of Memory in a chip is achieved.

The invention belongs to the technical field of new energy power, and particularly relates to an unmanned aerial vehicle hydrogen fuel cell hybrid power system and a control method thereof. The system comprises a fuel cell stack which is used for providing a reference power supply and has adjustable power output; the super capacitor bank is used for outputting peak current when transient high power is needed, and has the characteristics of high power density and quick response; the lithium iron phosphate battery pack is used for providing an emergency power supply when the fuel cell fails; the dynamic bus controller integrates the voltage hysteresis comparator and the CAN bus communication module and is used for controlling energy output of the fuel cell stack, the super capacitor bank and the lithium iron phosphate battery pack; the LSTM neural network prediction module is used for predicting a future power demand according to the flight attitude, the meteorological data and a historical load curve and triggering power climbing of the fuel cell in advance; and the Buck-Boost circuit is used for the fuel cell to directly charge the super capacitor bank, so that the dynamic response speed and the system stability of the unmanned aerial vehicle in a violent maneuvering state are remarkably improved.

The embodiment of the invention provides an equipment management method, device and system based on a bus technology, a bus controller does not need to initiate, bus equipment can actively send own equipment information to the bus controller after being powered on, and the bus controller sends the equipment information of the bus equipment to the bus controller after receiving the equipment information of the bus equipment. The address space of the bus is allocated to the bus equipment according to the equipment information of the bus equipment, so that the time delay of finding the bus equipment by the bus controller is reduced, and the efficiency of managing a bus network by the bus controller is improved.

Provided in the present disclosure is a connector port multiplexing apparatus, comprising: a latch reset circuit, which is electrically connected to a first voltage source and a power terminal of a universal serial bus connector, and is configured to output a control signal on the basis of a first voltage that is output by the first voltage source and a second voltage from the universal serial bus connector; and an analog switch circuit, a control terminal of which is electrically connected to an output terminal of the latch reset circuit, a first terminal of which is electrically connected to a first signal transmission terminal of a universal serial bus controller, a second terminal of which is electrically connected to a second signal transmission terminal of the universal serial bus controller, and a third terminal of which is electrically connected to a multiplexing signal transmission terminal of the universal serial bus connector, wherein the analog switch circuit is configured to establish, on the basis of the control signal, a connection path between the first terminal and the third terminal of the analog switch circuit or a connection path between the second terminal and the third terminal of the analog switch circuit.

A bus connection in which bus elements (3000) are operably connected to each other in a computing device according to the present invention may comprise: a bus master (3100) in charge of controlling the bus (3010) by a predetermined implementation or communication method; a bus slave (3200) controlled by the bus (3010) by means of the predetermined implementation or communication method; and an internal bus (3010) that physically implements between the bus elements. In addition, the present invention comprises an internal physical bus address unit (3320) that divides slaves (3200) of the internal bus (3010) in a physical form in the bus master (3100) that physically controls the internal bus (3010), and another arbitrary virtual bus address unit (3310), and may comprise a bus address page table (3300) which can be recorded or set (5000) so as to enable mapping or address conversion (4000) and helps the address conversion (4000) operation of the bus master (3100). In addition, the predetermined internal bus (3010) implementation and communication method may be a method based on a bus physical protocol such as AXI / AHB or UPI / QPI. The bus master (3100) and the bus address page table (3300) according to the present invention may comprise a chiplet connection (3020) that connect chips which are other computing devices as well as an operation in a chip (200) which is the computing device; and a chiplet connection (3020), and the chiplet connection (3020) is connected between the bus masters (3100) and may include an address conversion (4000), or a mapping and setting method (5000) by being organically coupled to the bus address page table (3300) even between the plurality of computing devices through a bus address conversion (4000) of the bus address page table (3300) or mapping operation. In addition, the predetermined chiplet connection (3020) communication method may be a method based on a chiplet connection physical protocol such as UCIe. In addition, the predetermined chiplet connection (3020) communication method may be a method based on a conventional bus physical protocol such as AXI / AHB or a non-standard bus physical protocol such as UPI / QPI. A method for implementing the predetermined chiplet connection (3020) may be a method of implementing a serial bus structure, a parallel bus structure, and a tree bus structure that applies same in various ways, and may be a method including various implementation methods such as a typical ring bus structure. In a method for implementing the bus master (3100) in the present invention, an interconnect link unit (400) is included; and the present invention can have an organic operation with a bus address page table (3300) through a predetermined interconnect link (400) implementation or a communication method without directly passing through the bus (3010) or the chiplet connection (3020) structure, and may be a method for having limited mapping coherence between computing devices and organically combining the virtual bus address unit (3310) inside the bus address page table (3300) partially through the interconnect link (400) through an operation of remote bus interception (7000) between computing devices. In addition, the communication method of the predetermined interconnect may be a method based on a PCle / CXL physical protocol.

The invention discloses a high-fault-tolerance double-line bus control system based on hot backup and self-adaptive diagnosis, and relates to the technical field of double-line bus control, sequence simulation analysis is carried out on single data through a server I, so that incremental backup is carried out on part of the single data, global backup is carried out on the remaining part of the single data, and thus the reliability of the single data is improved. The backup data is stored in the distributed storage unit, the recovery speed and the size of the memory value occupied by the backup data can be considered in the backup mode, and a balance degree is taken from the recovery speed and the size of the memory value occupied by the backup data for operation; meanwhile, by means of analysis on the backup data, the size of the backup data can be further compressed, and the backup data can be recovered as soon as possible when needing to be recovered.

The invention discloses a communication link automatic selection and concurrent transmission method under a helicopter limit condition, and relates to the technical field of aerospace. Comprising the following steps: firstly combing airborne communication link information, retaining four types of links including a satellite, an ultra-short wave, a short wave and a data transfer radio, and collecting parameters by means of a bus controller; filtering the data by using a Kalman filtering algorithm, and removing abnormal data through threshold verification; and finally outputting stabilized data. Determining a task scene and an environment scene based on the stabilization data in combination with airborne control screen task selection and environment sensor data; according to the technical key points, a fault precursor monitoring technology is adopted, a standby link pre-activation technology is combined, a seamless switching mechanism is matched, the defect that an existing system depends on manual switching is overcome, the automatic switching time of the link is shortened to be within 0.5 second, the communication interruption rate under the limiting condition is reduced to be lower than 5% from 30% or above, the real-time communication requirements of rescue, patrol and the like are met, and the real-time communication efficiency is improved. Good use prospects are realized.

The invention discloses a communication conflict detection control method and device, equipment and a storage medium. The method comprises the following steps: controlling a bus slave station module to send a request signal containing a unique feature identifier to a bus; the control bus master station module monitors the bus in real time; controlling the bus master station module to identify the bus slave station modules participating in the conflict; controlling the bus master station module to distribute different sending time slots for the identified conflicting bus slave station modules; the control bus master station module broadcasts a control frame comprising a conflict slave station module list and a corresponding sending time slot; controlling each conflict slave station module to perform local clock synchronization according to the distributed sending time slot after receiving the control frame; controlling each conflict slave station module to send data to the bus in the synchronized sending time slot; and the control bus master station module enters the next round of monitoring period after each conflict slave station module completes data transmission. According to the invention, accurate positioning and identification of bus communication conflicts can be realized, communication resource allocation is optimized, and communication efficiency is improved.

The invention belongs to the technical field of vehicle control, and discloses a networked automobile CAN bus control method and system, and the method comprises the steps: analyzing multi-source data of a networked automobile, constructing a multi-level control architecture based on an analysis result, setting a condition threshold value between control levels, and employing a genetic algorithm to dynamically optimize the condition threshold value as a control threshold value; constructing a threshold prediction model by using a time sequence prediction algorithm, predicting the state and operation scene change of an electronic control unit in the networked automobile by combining the obtained historical multi-source data, and generating a control prediction threshold; and in combination with the control threshold value and the control prediction threshold value, generating a cooperative control value through a cooperative recommendation strategy, and formulating a corresponding control strategy. According to the invention, a multi-level control architecture is constructed through multi-source data analysis, a communication threshold is dynamically optimized in combination with a genetic algorithm, the CAN bus load is reduced, the communication efficiency and real-time performance are improved, key message delay is avoided, and the stability and resource utilization capability of a vehicle-mounted network are enhanced.

The present invention discloses an electric-controlled dry dust collector control system and method based on bus control technology, which relates to the technical field of mine health protection equipment, including: a dry dust collector body and an electric control system; a plurality of filter cartridges are evenly distributed and fixed on the filter cartridge frame, and a plurality of cleaning pipelines are connected to the cleaning air bag, and each cleaning pipeline is placed above the filter cartridge; a pneumatic pulse valve is arranged on the cleaning pipeline, and a pneumatic solenoid valve is connected in parallel on the control air path of the pneumatic pulse valve, and the pneumatic solenoid valve is connected to the solenoid valve controller; a differential pressure gauge is arranged on the dust collector frame housing, and the solenoid valve controller is connected to the dry dust collector control box via a CAN bus. The cleaning method of the present invention is more efficient, and the service life of the filter cartridge is increased. The automatic cleaning and linkage dust removal functions reduce the workload of coal miners and improve the level of occupational health.

The invention belongs to the field of EtherCAT bus control, and discloses a cross coupling multi-axis synchronous control method based on EtherCAT, which directly reduces the contour error through a cross coupling method, and also can calculate the deviation between the expected feeding speed and the actual speed of each axis so as to improve the accuracy of the cross coupling multi-axis synchronous control. And finally, calculating the total speed deviation of each shaft as an input signal to be input into each slave station so as to improve the synchronization performance of each shaft of the system.

The invention discloses an efficient serial bus communication method, and relates to the field of communication, and the efficient serial bus communication method comprises the following steps: 1, all nodes to send data compete, the node with the highest priority is competed through the respective bus priority sequence, the node with the highest priority obtains the bus control right, and the node with the highest priority obtains the bus control right; compared with the prior art, the method has the beneficial effects that each bus node is allowed to initiate active communication at the same time on the bus through a logic mechanism, the bus is scrambled through respective priorities, the nodes with high priorities can continuously send all data in a lossless manner, and the nodes with failed scrambling automatically exit and initiate when the bus is idle; compared with the traditional master-slave communication, the communication efficiency of the serial bus is higher; according to the method, the availability is improved by using the algorithm, frame loss communication errors possibly occur within 1000V without using an anti-interference filtering algorithm, and 4000V zero frame loss is realized by using the anti-interference filtering algorithm.