666 results about "BIOS" patented technology

The invention belongs to the technical field of computer trusted computing, and particularly relates to a method and system for constructing a TPCM trusted root based on a multi-core BMC, and the method comprises the steps: selecting the multi-core BMC, configuring one core as a trusted core, and achieving the physical and logic isolation with other cores; tPCM related codes are integrated in the trusted core, and a TCM module is combined to provide a running environment for the TPCM; when the system is started, the TPCM performs measurement check on the BMC code and the BIOS code, and if the BMC code and the BIOS code are abnormal, a security policy is started In the system operation process, the TPCM monitors hardware, firmware and software of a calculation part in real time, and discovers abnormal behaviors to block and give an alarm; and meanwhile, the management interface is connected with a trusted management center, so that remote configuration and monitoring are realized. A multi-core BMC is used as a protection component, a server host side is used as a calculation component, and a trust chain model of a star-shaped trusted topological structure is constructed. According to the method, the TPCM trusted root is constructed by using the existing resources of the multi-core BMC, so that the hardware cost is reduced, the real-time performance of trusted measurement and the monitoring comprehensiveness are improved, and the running safety and credibility of the server are improved.

The invention relates to the technical field of electronic systems of spacecrafts, and discloses a fault-tolerant method for non-redundant fault reconstruction of a spaceborne computer, which comprises the following steps of: 1, accessing a hardware state manager by a BIOS (Basic Input / Output System) after the system is started; obtaining health state data recording the health state of the local storage device, a current starting target ID used for indicating a current starting target, and a retry count value associated with the current starting target ID; a BIOS (Basic Input Output System) accesses a hardware state manager to obtain health state data and a retry count value of local storage equipment, so that normal equipment is autonomously selected for starting, and the fault-tolerant effect of dynamically avoiding a fault starting path is achieved; compared with the technical scheme in the prior art that the computer starting process highly depends on a solidified single physical storage device, the single-point fault risk of permanent paralysis of the computing system caused by damage of the single storage device is solved.

The invention discloses a basic input and output system firmware upgrading method and electronic equipment, and relates to the technical field of servers, and the method comprises the following steps: obtaining current configuration data of basic input and output system firmware, and carrying out structured conversion on the current configuration data to obtain a first configuration file; obtaining upgrading configuration data of standard upgrading firmware of the basic input and output system to obtain a second configuration file; comparing the configuration parameter of the first configuration file with the configuration parameter of the second configuration file, and determining a difference configuration item; and processing the difference configuration item according to the difference processing rule to obtain a target configuration file, and upgrading the firmware of the basic input / output system according to the target configuration file, thereby solving the technical problem of firmware upgrading compatibility in related technologies, and achieving the purposes of reserving user configuration as much as possible and improving the user experience. The method has the advantages that upgrading failure or starting failure caused by configuration conflicts is avoided, firmware upgrading is efficiently completed, and the accuracy rate and the automation rate are increased.

The invention discloses a trusted startup design method of a server, and belongs to the technical field of information security and trusted computing, after the server is powered up, a trusted root CPU core is started preferentially, a trusted startup program is operated, and a security environment is initialized; integrity measurement and verification are conducted on the BIOS, and after verification is passed, other CPU cores are released, and the BIOS is operated; the service CPU core loads a bootstrap program GRUB and submits the bootstrap program GRUB to the trusted root CPU core for verification; then loading an operating system kernel image and executing hash measurement, and calculating a path entropy value in combination with control flow information in a kernel initialization stage; performing segmentation comparison on the memory image and the disk mirror image, and calculating a mapping consistency coefficient; if the verification is passed, continuing to start the operating system; according to the method, the tampered component in the system startup chain can be effectively prevented from being loaded and operated, and the startup safety and the overall credibility of the server are enhanced.

The invention discloses a system quick recovery method and system based on system mirror image management, and the method comprises the steps: initializing a boot partition of a functional blade in a heterogeneous cluster system and a boot flag bit of the boot partition, the boot flag bit being used for BIOS reading to select a corresponding boot partition when the functional blade is started; the method comprises the following steps: triggering a job operating system or a boot operating system of a target function blade to restart through a soft shutdown interface, and modifying a start boot flag bit in a BMC (Baseboard Management Controller) of the target function blade, so that the target function blade is sequentially restarted and switched into the boot operating system from the job operating system; and executing system quick recovery or backup for the target system partition under the boot operating system, and then restarting and switching to run under the specified job operating system so as to complete system quick recovery or backup. According to the method, the characteristics of the heterogeneous cluster system are combined, and automatic and flexible system mirror image fast rollback recovery is achieved when the heterogeneous cluster system has a serious fault.

Embodiments of the present disclosure provide a method and apparatus for reporting asset information, a non-transitory computer readable storage medium, and an electronic device. The method for reporting asset information includes: reading, in a case where a target device supports memory expansion, Serial Presence Detect (SPD) information of a designated memory bank mounted to the target device from a configuration space register of a Memory Expander Controller (MXC) of the target device by means of a Basic Input Output System (BIOS), wherein the target device is a device that supports a Computer Express Link (CXL) protocol, which is an open interconnection standard; and reporting, in a case where target SPD information has been read, the target SPD information to a Central Processing Unit (CPU) of the target device as system asset information by means of the BIOS.

The invention provides a data transmission method and a data receiving method, which can be applied to the technical field of servers. The data transmission method comprises the following steps: in response to a received asynchronous interrupt signal sent by a basic input / output system, analyzing an asynchronous request frame from a shared memory which is commonly accessed by the basic input / output system and a management controller through a memory mapping management controller interface; according to a data request type indicated by the asynchronous request frame, accessing a preset cache partition in a management controller to obtain target data; wherein historical data transmitted in the data interaction process through the memory mapping management controller interface is stored in the preset cache partition; and writing the target data into the shared memory through the memory mapping management controller interface, and triggering a response event through the interrupt controller, so that the basic input / output system reads the target data by querying the response event under the condition that a preset triggering condition is met.

The invention discloses a time acquisition method and device for a clock module based on a processor, and relates to the technical field of processors, and the method comprises the steps: supplying power to an external clock through an external battery when the processor is replaced, solving the problem that the default value of the option of a basic input / output system is recovered due to the power-off of a built-in clock, and improving the user experience. The technical effects of reducing the time cost of maintaining the server by the user and improving the perception degree of the user are achieved; furthermore, when it is detected that the processor is powered on, the first time information and the second time information of the built-in clock are read through the processor, and the second time information is synchronized to the built-in clock under the condition that the first time information and the second time information are compared to be inconsistent, so that the problem that the time is inaccurate after the built-in clock is replaced is solved; the technical effect of ensuring the time consistency of the built-in clock and the external clock is achieved.

The invention discloses an equipment information management method and an equipment information management device, and relates to the technical field of server hardware management, and the method comprises the steps that VPD information is read in a manner of enumerating PCIe equipment through a BIOS, the VPD information is an inherent attribute of the equipment and is extracted by the BIOS at the beginning, comprehensive coverage of basic information of the equipment is guaranteed, and the equipment information is stored in the BIOS; the BMC reads FRU information of equipment by using an I2C bus and an SMBus, covers function information of the equipment, reads data through the BMC, makes up for the defects of VPD information in function description and state monitoring, combines the VPD information obtained by the BIOS and the FRU information obtained by the BMC to form a target information set, the target information set comprises equipment manufacturing information and function information, and the equipment manufacturing information and the function information are stored in the BMC. Omnibearing information coverage of the PCIe equipment is realized, and the technical problem that the coverage range of information acquired by the PCIe equipment in the prior art is not comprehensive is solved.

The embodiment of the invention provides a memory slot testing method and a server. In the embodiment of the invention, the CPLD is indicated to control the power supply chip to supply power to the target memory slot to be tested at present and prohibit power supply to the non-target memory slot in a manner of running the automatic script for testing and sending the IPMI command to the CPLD through the BMC of the server, so that different memory slot insertion methods are dynamically simulated for testing. By checking whether actual memory configuration obtained when the BIOS executes memory initialization in the restarting process of the server is matched with the current memory slot insertion method or not, testing of the current memory slot insertion method is achieved. According to the method, different memory slot insertion methods are automatically tested, so that the problems of high labor cost, low test efficiency and the like in the existing manual test can be avoided, the test efficiency is improved, and the problem that the memory slots are damaged due to frequent manual insertion and extraction of the memory bank can be avoided.

Systems and methods for injecting an overlay into a video framebuffer memory by a Basic Input / Output System (BIOS) without triggering a host Operating System (OS) error. An Information Handling System (IHS) includes a processor and a memory coupled to the processor. The memory stores program instructions that, upon execution, cause the processor to receive a command from an Embedded Controller (EC) and create an Advanced Configuration and Power Interface (ACPI) table with a video framebuffer memory location usable to store an overlay. The EC issues the command in response to the IHS returning from a selected power state or determining that the IHS is in a selected posture. The overlay may include a software keyboard icon or an Original Equipment Manufacturer (OEM) splash screen. The host OS checks the ACPI table during boot and allows the BIOS to write to the video framebuffer memory location without triggering an error.

The present application relates to the technical field of computers. Provided are methods and apparatuses for handling a non-recoverable system fault, and an electronic device and a non-transitory readable storage medium. A method is applied to a BMC, and comprises: collecting register data of a processor after a fault check signal is detected, wherein the fault check signal is sent to a BMC by an on-chip controller upon detecting that a flag bit of a fault isolation register is set; analyzing the register data to obtain positioning information of a faulty device; and triggering a warm reboot of a system, wherein during the warm reboot of the system, the positioning information is used for instructing a host BIOS to disable the corresponding faulty device on the basis of the positioning information. In the present application, after a non-recoverable system fault is detected, out-of-band collection and analysis are performed on the register data of the processor by means of the BMC, and the processes of data collection and analysis do not occupy processor resources, thereby greatly reducing the workload of the processor, ensuring the processing performance requirements of the processor for a real user service, and improving the stability of a server system.

The invention discloses a fault processing system, method and device and a storage medium, and relates to the technical field of servers, and the method comprises the steps: obtaining a configured fault processing strategy through a basic input and output system; in response to fault interruption triggered by a hardware fault occurring in the system, acquiring fault information corresponding to the hardware fault by using the basic input / output system; a target fault processing strategy of the fault information is determined based on the fault processing strategy through the basic input and output system, fault processing is carried out based on the target fault processing strategy, and fault processing information is generated; the method comprises the following steps: receiving fault processing information sent by a basic input / output system through a baseboard management controller, and analyzing the fault processing information to generate a corresponding event log; according to the invention, the fault processing difficulty is reduced, and the stability and reliability of a computer system are ensured.

Systems and methods for configuring a System-on-Chip (SoC) during boot of an Information Handling System (IHS). In an illustrative, non-limiting embodiment, an IHS may include a SoC and a memory coupled to the SoC, the memory having program instructions stored thereon that, upon execution, cause the IHS to: during pre-boot, select one or more elements of a Graphical User Interface (GUI) by a Basic Input Output System (BIOS) based, at least in part, upon an identifier of the SoC, where the one or more elements enable a user to change one or more settings of the SoC before any Operating System (OS) takes control of the IHS; and render the GUI to the user.

The invention provides an asset information acquisition method and device, a server, a controller and a medium, and relates to the technical field of servers, and the method comprises the steps: transmitting a command frame in a predetermined protocol format to a switch supporting a management endpoint function through a side link; wherein the command frame is used for indicating a lightweight proxy service module solidified in switch firmware to execute the following operations: analyzing the command frame, and directly accessing a configuration space of downstream target peripheral component interconnection high-speed equipment according to an analysis result to obtain original asset information, converting the original asset information into asset information conforming to a predetermined protocol format, packaging the asset information in the predetermined protocol format in a response frame, and returning the response frame to the baseboard management controller; and receiving a response frame returned by the lightweight proxy service module, wherein the response frame comprises the asset information in the predetermined protocol format. According to the method and the device, the asset information is independently obtained based on the substrate management controller, and the dependence on a BIOS (Basic Input / Output System) and burning is avoided.

Systems and methods for cross operating environment diagnostic operations with context resume. An Information Handling System (IHS) includes a processor and a memory coupled to the processor. The memory stores program instructions that, upon execution, cause the IHS to receive a command at a Basic Input / Output System (BIOS) from an Embedded Controller (EC) to perform a deep scan diagnostic operation. The command is received in response to a request by a host Operating System (OS) application. The BIOS executes the deep scan diagnostic operation and stores the result in an Advanced Configuration and Power Interface (ACPI) table. The host OS retrieves the result from the ACPI table and validates the result. The system enables comprehensive diagnostics by leveraging the BIOS environment, ensuring seamless context resume.

An information handling system may include at least one central processing unit (CPU); a Basic Input / Output System (BIOS); and an embedded controller (EC). The information handling system may be configured to: execute an operating system (OS) via the at least one CPU; execute an OS device driver for the EC, wherein the OS device driver is configured to provide non-blocking input / output (I / O) operations on the EC without the execution of a system management interrupt (SMI); and allow access to the EC from an application program via the device driver.

The invention discloses a riser card updating method and equipment, and relates to the technical field of data processing. According to the method, updating is initiated through the interface of the basic input and output system, and the first memory of the basic input and output system stores the first firmware file, so that updating depending on the management interface of the substrate management controller is avoided, and even if the substrate management controller fails, the basic input and output system can still be started up to complete updating; the first firmware file is stored in the first memory, so that the first firmware file can be prevented from being maliciously tampered. Besides, under the condition that the first check code is consistent with the second check code, the first firmware file is written into the corresponding adapter card, the integrity of the first firmware file written into the adapter card is ensured, and the problem that the adapter card fails due to firmware damage is completely eradicated.

Systems and methods for smart search of Basic Input / Output System (BIOS) settings. An Information Handling System (IHS) includes a processor and a memory coupled to the processor. The memory stores program instructions that, upon execution, cause the IHS to receive a Natural Language (NL) input from a user via a search field on a BIOS setup page in a pre-boot environment. The system processes the NL input through an Artificial Intelligence (AI) model configured to identify one or more BIOS settings relevant to the NL input. The identified BIOS settings are made available to the user as part of a search result, which may include one or more hyperlinks retrieved from a catalog of hyperlinks created based on an Internal Form Representation (IFR) binary file.

A BMC holds a host computer in a reset state by asserting a reset signal to the host computer. The BMC accesses at least a part of a BIOS image of the host computer from a storage device shared between the BMC and the host computer while the host computer is held in the reset state. The BIOS image is protected based on a private key of a public key / private key pair. The BMC validates at least the part of the BIOS image based on a public key of the public key / private key pair. The BMC releases the reset signal to enable the host computer to start a boot process upon successful validation of at least the part of the BIOS image.

The invention provides a system configuration method and device. The system configuration method comprises the steps of obtaining a configuration operation of a user on an extensible firmware interface configuration interface; according to a control instruction triggered by the user on a configuration file generation interface of a configuration tool, the configuration operation is recorded as a system configuration file, the system configuration file is a configuration file for parameter configuration of a guide system of the electronic equipment, and the configuration tool is a tool embedded in a basic input and output system; and carrying out system configuration on the boot system of the electronic equipment based on the system configuration file.

Systems and methods for handling processor and memory diagnostics by a Basic Input / Output System (BIOS) in an Information Handling System (IHS) are described. An IHS includes a processor and a memory coupled to the processor. The memory stores program instructions that, upon execution, cause the IHS to transmit a first request for a processor or memory diagnostic to a BIOS protocol driver. The BIOS protocol driver transforms the request into a second request and communicates the second request to the processor or memory. The IHS then receives a response to the second request. The BIOS protocol driver may select the second request based on a Look-Up Table (LUT) or a policy, which may include rules based on context information such as location, user identity, entitlement, or license.

Systems and methods for providing a secure motherboard replacement are described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions that, upon execution, cause the IHS to, when a replacement motherboard is booted for the first time, attach to a device that stores one or more BIOS entitlements associated with the IHS, configure a BIOS on the replacement motherboard with the BIOS entitlements, and complete booting of the IHS into a normal mode of operation.

The invention discloses a high-speed peripheral component interconnection bandwidth allocation system, method and device, a medium and a product, and relates to the technical field of computers. The system comprises an adapter card, an impedance circuit and a basic input and output system. The impedance circuit is integrated on the adapter card, when adapter cards of different specifications are inserted, output of different impedance signals can be achieved through the state change of the impedance circuit on the adapter card, and in the power-on self-test stage, the impedance signal output can be achieved. And the basic input and output system determines the bandwidth of each high-speed peripheral component interconnection channel according to the impedance value and a preset impedance bandwidth mapping table. Therefore, when the adapter card is replaced, operations such as circuit redesign and impedance matching element adjustment do not need to be carried out on the mainboard, and the universality of high-speed peripheral component interconnection bandwidth allocation is improved. Besides, the basic input and output system automatically obtains the impedance value and determines the bandwidth through the power-on self-test stage, firmware configuration parameters do not need to be modified manually, and the flexibility of server hardware configuration is enhanced.

The invention discloses a target system information processing method of a server and electronic equipment, and relates to the technical field of computers, and the method comprises the steps that in the starting process of the server, a target management controller starts timing for a certain duration after receiving a timer starting command sent by a basic input / output system, and the basic input / output system writes the log file into a target memory shared by the basic input / output system and the target management controller, so that the target management controller does not receive a timer closing command until timing is finished, reads the log file from the target memory, stores the log file and displays alarm information on a target page. The technical problems that an existing target system information processing mode cannot automatically record logs and the recorded logs are usually incomplete, so that the repairing efficiency and effect are poor are solved, and the technical effect that the complete logs are automatically recorded to shorten the subsequent repairing time is achieved.

The invention relates to the technical field of computers, and belongs to a BIOS (Basic Input / Output System) and BMC (Baseboard Management Controller)-based GPU (Graphics Processing Unit) resource intelligent dynamic optimization method and system. A four-layer collaborative architecture of a firmware layer (BIOS), a management controller layer (BMC), a system layer (operating system kernel) and a hardware layer (GPU equipment) is adopted, and the architecture is a cross-layer closed-loop optimization architecture. An optimization decision function is decoupled from an operating system kernel and is deployed in an independent hardware management unit, namely a baseboard management controller (BMC). The system collects GPU operation data in real time through an operation system kernel space and sends the GPU operation data to a BMC; an intelligent optimization engine deployed in the BMC analyzes and calculates the data to generate an optimal GPU resource scheduling strategy; the strategy is returned to an operating system kernel and finally executed by a hardware layer, and intelligent dynamic optimization of GPU resources is achieved through cross-level interaction. Therefore, a continuous intelligent closed-loop optimization link of'deployment-data acquisition-intelligent decision-making-strategy execution 'is formed.

Systems and methods for handling platform-agnostic pre-boot health information in an Information Handling System (IHS) are described. In an illustrative, non-limiting embodiment, an IHS may include a processor; and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: create an Advanced Configuration and Power Interface (ACPI) table, by a Basic Input / Output System (BIOS) during boot of the IHS, wherein the ACPI table comprises telemetry data and an identifier; and provide the ACPI table to an Operating System (OS) application, wherein the host OS application is configured to select one of a plurality of parsers to process the ACPI table based, at least in part, upon the identifier.

Systems and methods for providing a Basic Input / Output System (BIOS) password retention system that may be used for motherboard replacement are disclosed. According to one embodiment, an Information Handling System (IHS) includes computer-executable instructions to, when a replacement motherboard is booted on the HIS, obtain An encrypted BIOS password associated with a previous motherboard that has been removed from the IHS, configure the BIOS password on the replacement motherboard without providing a clear text version of the BIOS pw, and complete booting of the IHS into a normal mode of operation.

The invention relates to a management method and device for server GPU (Graphic Processing Unit) equipment, and the method comprises the following steps: after a server is started, a basic input / output system BIOS writes GPU static asset information through an H2B PCIE (Peripheral Component Interface Express) shared memory; the baseboard management controller BMC obtains GPU static asset information and extended static asset information of the GPU devices through the H2B PCIE shared memory, and polls all the GPU devices; and if the remote client initiates an information acquisition request of the GPU equipment, the northbound interface of the server acquires and feeds back the GPU equipment information through the callback function. According to the method, the basic input and output system BIOS directly and preferentially transmits the GPU equipment information to the shared memory of the GPU equipment information area predefined by the BMC in the starting stage, and the time from starting of the basic input and output system BIOS to obtaining of the basic information of the GPU equipment by the BMC is shortened.

Systems and methods for providing a bios entitlement retention system that may be used for motherboard replacement using system devices are disclosed. According to one embodiment, an Information Handling System (IHS) includes computer-executable instructions to, when a replacement motherboard is booted for the first time, attach to a system device that stores one or more Basic Input / Output System (BIOS) entitlements associated with the IHS, configure a BIOS on the replacement motherboard using the BIOS entitlements, and complete booting of the IHS into a normal mode of operation.