140 results about "Reboot" patented technology

One or more computer systems switch a representation of a first content item at a docked position in an environment with a representation of a second content item in the environment in response to input, switch from displaying a first environment to displaying a second environment in response to input while displaying a representation of a first content item at a docked position, detect and respond to events corresponding to requests to move virtual content in an environment, detect and respond to events corresponding to requests to transition a mode of display of virtual content in the environment, display a first framing element concurrently with a representation of a content item having different degrees of transparency in response to detecting an input, and / or facilitate docking of a content item in an environment based on an input, and / or determine clusters of virtual objects and restore virtual objects after a reboot event.

One or more computer systems switch a representation of a first content item at a docked position in an environment with a representation of a second content item in the environment in response to input, switch from displaying a first environment to displaying a second environment in response to input while displaying a representation of a first content item at a docked position, detect and respond to events corresponding to requests to move virtual content in an environment, detect and respond to events corresponding to requests to transition a mode of display of virtual content in the environment, display a first framing element concurrently with a representation of a content item having different degrees of transparency in response to detecting an input, and / or facilitate docking of a content item in an environment based on an input, and / or determine clusters of virtual objects and restore virtual objects after a reboot event.

One or more computer systems switch a representation of a first content item at a docked position in an environment with a representation of a second content item in the environment in response to input, switch from displaying a first environment to displaying a second environment in response to input while displaying a representation of a first content item at a docked position, detect and respond to events corresponding to requests to move virtual content in an environment, detect and respond to events corresponding to requests to transition a mode of display of virtual content in the environment, display a first framing element concurrently with a representation of a content item having different degrees of transparency in response to detecting an input, and / or facilitate docking of a content item in an environment based on an input, and / or determine clusters of virtual objects and restore virtual objects after a reboot event.

The invention relates to a Zynq chip FSBL program fault-tolerant starting method based on check and self-check, which comprises the following steps of: partitioning a Flash physical space into at least two independent starting mirror image regions, at least two application program regions and an independent state management region; the two independent starting mirror image areas are backups for each other, and the two application program areas are backups for each other; compiling, synthesizing and burning the mirror image file; when the FSBL program is started and runs, the FSBL program firstly judges the validity of a mirror image, and if the mirror image is invalid, a fault-tolerant switching mechanism is triggered; and if the mirror image is valid, executing a self-checking process, if the self-checking is passed, continuing to normally start the process, and if the self-checking fails, immediately triggering a fault-tolerant switching mechanism, and restarting from a standby start mirror image area. According to the method, the problem that the Zynq series chip cannot be started due to the fact that the FSBL program in the starting mirror image stored in the Flash is partially damaged is solved, and the purpose of improving the system reliability is achieved.

The present application relates to the technical field of computers. Provided are methods and apparatuses for handling a non-recoverable system fault, and an electronic device and a non-transitory readable storage medium. A method is applied to a BMC, and comprises: collecting register data of a processor after a fault check signal is detected, wherein the fault check signal is sent to a BMC by an on-chip controller upon detecting that a flag bit of a fault isolation register is set; analyzing the register data to obtain positioning information of a faulty device; and triggering a warm reboot of a system, wherein during the warm reboot of the system, the positioning information is used for instructing a host BIOS to disable the corresponding faulty device on the basis of the positioning information. In the present application, after a non-recoverable system fault is detected, out-of-band collection and analysis are performed on the register data of the processor by means of the BMC, and the processes of data collection and analysis do not occupy processor resources, thereby greatly reducing the workload of the processor, ensuring the processing performance requirements of the processor for a real user service, and improving the stability of a server system.

A microprocessor includes a macro-op (MOP) cache (MOC) having MOC entries (MEs) holding MOPs. An instruction fetch circuit fetches from the MOC the MOPS of an ME for execution, and a back-end detects that a MOP of the ME is causing a need for an abort type within a predetermined subset of abort types. A control circuit uses a location within the ME of the abort-causing MOP to determine an abort point that separates the ME into a former portion and a latter portion, flushes the MOPs of the latter portion of the ME, and allows the MOPs of the former portion of the ME to execute. After the flush of the MOPs of the latter portion of the ME, the microprocessor re-fetches and executes the MOPs of the latter portion of the ME but does not re-execute the MOPs of the former portion of the ME.

A method, computer program product, and computing system for reducing communication session downtime includes transmitting first signals at a predetermined time interval of X seconds; upon initiation of a reboot operation of a first device associated with the processor, decreasing the predetermined time interval from X seconds to Y seconds; transmitting the first signals at the time interval of Y seconds; and once the reboot of the driver is complete, increasing the predetermined time interval from Y seconds to X seconds.

Systems and methods include an Information Handling System (IHS) that is adapted to provide diagnostic boot cycles. Once an IHS is powered, a boot sequence is initiated. During or after booting of the IHS, a request is detected for a diagnostic boot cycle by a requestor, such as by the operating system of the IHS. When a diagnostic boot cycle has been requested, an EC (Embedded Controller) of the IHS is booted in a diagnostic mode to perform a diagnostic test on one or more hardware components of the IHS. The results of the diagnostic test are stored to the NVRAM (Non-Volatile Random-Access Memory) that stores the boot code and that is accessible to the requestor of the diagnostic test once the IHS has been rebooted to a non-diagnostic mode.

Systems and methods for rebootless injection of Basic / Input Output (BIOS) code in an Information Handling System (IHS). In an illustrative, non-limiting embodiment, an IHS may include: a processor; and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the processor to: receive, by a Basic Input / Output System (BIOS) via an Application Programming Interface (API), a payload from a host Operating System (OS); and inject the payload into a selected area of a flash memory where the BIOS resides without restarting, rebooting, or powering off the IHS.

A method, computer program product, and computing system for increasing communication session downtime. A first computing device of a plurality of computing devices transmits a handshake signal to a second computing device of the plurality of computing devices at a predetermined time interval and the second device receives the handshake signals. A communication session between the first computing device and the second computing device is ended when the second computing device does not receive a number X of expected consecutive handshake signals from the first computing device. Prior to a reboot of the first computing device, the number X of expected consecutive handshake signals is increased to a number Y of expected consecutive handshake signals, such that the communication session between the first computing device and the second computing device will be caused to end when the second device does not receive the number Y of expected consecutive handshake signals from the first computing device.

The invention discloses a method for multiplexing an upgrade link and controlling backup startup, a whole system in the invention comprises an upper computer and a target board card, and the target board card carries an FPGA (Field Programmable Gate Array) chip and an FT-M6678 chip. The FPGA is communicated with an upper computer through a path of interface, and on the basis of realizing an on-line upgrading function of the FPGA, a path of new serial port is led out to be connected with a serial port controller of FT-M6678 by virtue of unvarnished transmission operation of a serial port receiving signal and AND operation operation of a sending signal, so that upgrading file transmission is realized; the FPGA receives a backup start switching instruction sent by an upper computer, and switches a level and a reset logic connected with the FT-M6678, and then the FT-M6678 completes soft restart and reads the level in a bootloader stage so as to judge whether to jump to a backup program to execute an online upgrading function or to jump to an application program to execute a user function. The whole system has good stability, independence and universality.

At least one embodiment for reboot metric determination for access points includes in response to an access point completing a first reboot event: determining, by the access point, a first amount of time between completion of the first reboot event and completion of a prior reboot event; and transmitting, by the access point to one or more nodes of a mesh network, a reboot time metric based on the first amount of time.

Techniques are provided for basic input / output system (BIOS) protection using BIOS modification interception and approval. One method comprises, by an entity associated with an operating system of a device, obtaining a request to perform a reboot and / or a shutdown of the processing device; determining, prior to performing the reboot and / or the shutdown, whether an update of a BIOS of the device is pending; generating an approval request, responsive to determining that the update of the BIOS is pending and prior to performing the reboot and / or the shutdown; and initiating an automated action, responsive to a result of the approval request. In some embodiments, a BIOS update flag may be reset and / or a BIOS staging environment may be cleared following the updating of the image, responsive to a user not approving the update.

Methods and systems for managing a data processing system are disclosed. Uncorrected errors of a data processing system may be resolved by a management controller of the data processing system. The management controller may independently identify one or more peripheral devices of the data processing system associated with the uncorrected errors and cause the identified ones of the peripheral devices to be rebooted without rebooting an entirety of the data processing system.

The invention belongs to the technical field of power distribution, and particularly relates to a power distribution terminal power-on reset and watchdog function implementation system and method. According to the method, the FPGA sends the dog feeding signal during the period that the SoC is not started, the dog feeding main right is reasonably handed over according to the starting state of the SoC, meanwhile, a processing mechanism for the SoC starting abnormity is set, the situation that the watchdog is reset by mistake due to the fact that the SoC starting time is too long can be effectively avoided, the problem that the system is restarted repeatedly is solved, and the system reliability is improved. And stable operation of the power distribution terminal is ensured. The FPGA is not only responsible for maintaining a watchdog signal in the SoC starting stage, but also accurately monitoring and judging the starting state of the SoC. When the SoC is started abnormally, different recovery measures are taken according to the number of times of stopping feeding the dog, such as forcing the system-on-chip to restart or cutting off the SoC power supply and re-electrifying and resetting.

Various embodiments set forth a method comprising detecting, by an access point, that the access point has obtained network connectivity after a first reboot event; in response to detecting that the access point has obtained network connectivity after the first reboot event: determining, by the access point, a first amount of time between a first reboot time associated with the first reboot event and a second reboot time associated with a second reboot event that occurred prior to the first reboot event; updating, by the access point, a reboot time metric associated with the access point based on the first amount of time; and transmitting, by the access point, the reboot time metric to one or more nodes of a mesh network.

Examples of the present disclosure describe systems and methods for sharing memory using a multi-ring shared, traversable and dynamic database. In aspects, the database may be synchronized and shared between multiple processes and / or operation mode protection rings of a system. The database may also be persisted to enable the management of information between hardware reboots and application sessions. The information stored in the database may be view independent, traversable, and resizable from various component views of the database. In some aspects, an event processor is additionally described. The event processor may use the database to allocate memory chunks of a shared heap to components / processes in one or more protection modes of the operating system.

Managing updates to executable programming code on a computer system in a computer network. A maintenance service utility is configured to launch a maintenance procedure at a specified time during operation of the computer system. Operation of a maintenance timer utility is activated during startup of the computer system to track and monitor the amount of time the computer system has been operating since startup. The maintenance service utility determines if there any updates to the executable programming code that require installation. The maintenance procedure is launched after a specified time if there are updates to the executable programming code. The computer system is automatically rebooted to install the updates to the executable programming code. A maintenance service editor utility enables the maintenance service utility to be configured to launch the maintenance procedure after a specified time if there are updates to the executable programming code.

The invention discloses a safety protection method and device for an STR scene, equipment and a storage medium, and relates to the technical field of computer application, the method comprises the steps that after an AP and an SP receive a SUSPend command, keys and sensitive information in a memory are cleared, and meanwhile the Checksum value of program data in a DDR is randomly calculated and stored; and after the SP Resume and before the AP Resume, randomly calculating the Checksum value of the program data in the DDR again, and comparing the Checksum value with the stored Checksum value so as to determine the Resume or the Reboot. The program data comprises Code segment data, Data segment data and Bss segment data. The application can ensure that sensitive information is not leaked, ensure that the program is not tampered, and eliminate the possibility of being attacked by illegal persons.

The embodiment of the invention is applicable to the field of data processing, and provides an application program compiling method and electronic equipment, which can compile a target application program in advance in a restart stage of configuring a system version when the electronic equipment performs version switching, so that the situation that the target application program cannot be compiled in advance after a second operating system starts to run can be avoided. According to the present invention, the starting speed of the target application program can be improved and the user experience can be improved under the condition that the electronic device is started and then the target application program is compiled, and the method comprises the steps of downloading and installing the second operating system in the running first operating system, and compiling the target application program when the installation of the second operating system is completed and the electronic device is restarted. And then running the second operating system.

A method facilitating memory-aware input batch processing for large language models includes monitoring, by a system including at least one processor, an amount of memory, utilized by a process in execution by a language model in association with processing a first batch of prompts, relative to an available amount of memory for the process in execution; in response to determining that the amount of memory utilized by the process in execution is at least a threshold proportion of the available amount of memory, removing, by the system, at least one prompt from the first batch of prompts according to a priority criterion, resulting in a second batch of prompts; and facilitating, by the system in response to the removing, restarting the process in execution with the second batch of prompts instead of the first batch of prompts.

To reduce restart time in BIOS update.SOLUTION: An information processing apparatus comprises: a BIOS storage unit that stores at least a program for a BIOS; a main control unit that starts up an OS by executing the program for the BIOS; and a sub-control unit that manages a peripheral device and can access the BIOS storage unit. The BIOS storage unit has a first area in which the current program for the BIOS is stored, and a second area for storing an update program for the BIOS. The sub-control unit comprises a BIOS update unit that, in update processing of the BIOS, stores the update program for the BIOS acquired by the main control unit in the second area, executes restart, and makes effective the update program stored in the second area as the program for the BIOS.SELECTED DRAWING: Figure 2

A method, computer program product, and computing system for reducing communication session downtime includes transmitting first signals at a predetermined time interval of X seconds; upon initiation of a reboot operation of a first device associated with the processor, decreasing the predetermined time interval from X seconds to Y seconds; transmitting the first signals at the time interval of Y seconds; and once the reboot of the driver is complete, increasing the predetermined time interval from Y seconds to X seconds.

The application discloses an MCU controller violence cracking prevention system and method, comprising: a storage module which stores and updates a check failure count value in the non-volatile memory of the MCU; a response control module which returns a diagnosis negative feedback and triggers a delay timer to start according to the count value; a delay management module which sets a delay waiting time when the count value reaches a preset upper limit, and allows the request again after the timing ends; and a restart processing module which restarts the delay timer when the MCU is powered on or restarted and the count value is over the standard. The application solves the problem that the MCU is cracked by violence because the failure count is reset to zero due to the restart or session switching, and effectively improves the access security through the non-volatile storage and delay mechanism.

A method for reducing power in a system is provided according to aspects of the present disclosure. The system includes a chip, and a volatile memory. The method includes entering a sleep state, and exiting the sleep state. Entering the sleep state includes placing the volatile memory in a self-refresh mode, wherein the volatile memory stores one or more binary images and the volatile memory is powered in the sleep state, and collapsing multiple power supply rails on the chip. Exiting the sleep state includes restoring power to the multiple power supply rails on the chip, taking the volatile memory out of the self-refresh mode, and running the one or more binary images on one or more sub-systems on the chip.

The invention relates to the technical field of firmware updating, in particular to an embedded firmware compilation-free updating method which comprises the following steps: S1, firmware is divided into a plurality of independent function modules through a link script, and each function module is allocated to an independent memory address interval and recorded in a section table; s2, in response to the module replacement instruction, reading an identifier and a version number of a target function module; s3, positioning a target memory address of the target function module according to the section table, and executing compatibility check; s4, if the compatibility check is passed, writing binary data atoms of the new function module into a target memory address interval under the protection of a memory barrier; and S5, updating a module version mark in the section table, and triggering soft restart to enable the new function module to take effect. The firmware is divided into independent modules, the updating efficiency and flexibility of the firmware are improved, real-time loading and replacement of the firmware modules are supported, the flexibility and response speed of the system are improved, an automatic rollback mechanism is introduced, and the stability and safety of the system are guaranteed.

The present disclosure relates to provable PCR extensions. Processors, systems, methods, and computer program products for detecting unauthorized modifications to security information in a security device. In at least one embodiment, a processor includes one or more circuits that use information stored in one or more storage locations of one or more security devices to detect whether the security devices have been restarted.

The application provides a reliability restart test method, comprising: collecting hardware parameters on a server through multiple rounds of restarts and performing a repair check on abnormal parameters in each round of restarts; and determining a server state of the server after multiple rounds of restarts based on the hardware parameters. The application provides a reliability restart test method, which compares parameters obtained in each round of restart test in server test with standard parameters, and initiates a repair check to detect hardware parameters of corresponding hardware again when the comparison result is different, so as to correct data abnormalities caused by bugs or abnormalities on a software layer such as an operating system or a driver on the server due to multiple restarts. The application effectively improves the accuracy and reliability of data collection in the server restart test process.

This invention provides an embedded boot method for dynamically configuring screen orientation. The method includes: S1, setting a screen orientation parameter storage area in a non-volatile NV partition; S2, during the U-Boot boot phase, reading the screen orientation parameters from the NV partition; S3, determining whether the parameters in the NV partition are valid user configurations; S4, U-Boot appending the selected screen orientation parameters to the bootcmd command; S5, during kernel boot, parsing the screen orientation parameters in the bootcmd command using the early_param mechanism; S6, initializing the corresponding screen orientation based on the parsed parameters; and S7, the user configuration interface. This invention achieves dynamic screen orientation configuration, improving system flexibility; it allows changing the screen orientation without modifying the kernel or recompiling the firmware, simplifying system maintenance; it is compatible with existing default configuration mechanisms, ensuring system stability and reliability; and by storing user configurations in the NV partition, it ensures that the configuration remains valid after a device reboot.

The invention relates to a method for safely restarting a DSP (Digital Signal Processor) for multiple times by utilizing a software mode, and belongs to the field of embedded technologies. In order to remotely or automatically reset an abnormal DSP unit under the condition that a main power supply is not cut off, furthest reserve a data processing context before the abnormal DSP unit is abnormal and reduce a service interruption event, the DSP is safely restarted for multiple times in a software mode, and the method is simple and convenient to operate on the premise that the main power supply of equipment does not need to be cut off. Software resetting is carried out by writing a specific preset restart instruction into the receiving end of the DSP or triggering interruption, reliable resetting of the running state of the DSP is achieved, and the function of the DSP can be rapidly recovered under the condition that interference on an upper-layer application and peripheral equipment is minimum. And temporary data and task states stored in the chip are prevented from being lost due to power failure, so that the continuous operation reliability and maintainability of a complex electronic system are greatly improved.