1results about How to "Reduce hardware overhead" patented technology

This invention discloses a switchless redundant fault-tolerant memristor cross array circuit for resolving bridging faults, comprising a main array, two redundant word lines, two redundant bit lines, and a controller. The main array consists of N word lines, M bit lines, and cross-point memristor cells. The redundant word lines cross with all bit lines, and the redundant bit lines cross with all word lines. The controller is directly connected to all word lines, redundant word lines, bit lines, and redundant bit lines. This circuit does not contain any physical switches for fault isolation, has a simple structure, low hardware overhead, and is easy to integrate.