28 results about "Low overhead" patented technology

A data compression method and a related device, used for reducing I / O overhead. The data compression method comprises: acquiring attribute information of a logic block, wherein the logic block comprises a plurality of data pages, and the attribute information indicates data sizes of data contained in the plurality of data pages across a plurality of time periods; if the attribute information indicates that the total data size of the data contained in the plurality of data pages during a target time period is greater than or equal to a first threshold, compressing the data contained in the logic block, and storing the result obtained by compression, wherein the target time period includes at least time period among the plurality of time periods, and the time interval between the target time period and the current moment is greater than or equal to a time threshold; and if the attribute information indicates that the total data size of the data contained in the plurality of data pages during the target time period is less than the first threshold, determining not to compress the data contained in the logic block.

This application provides a distributed wireless resource scheduling method and electronic device, relating to the field of wireless communication network technology. In this method, the coordinator and computing nodes only need one round of information exchange, avoiding the huge signaling overhead and accumulated latency caused by multiple rounds of iterative negotiation. Time-consuming optimization calculations are offloaded to multiple computing units for parallel execution, achieving a linear reduction in overall computation time. Furthermore, it leverages the approximate achievable rate to provide theoretical feasibility for distributed solutions, while global coordination by edge devices ensures the performance of critical users, allowing the performance of the distributed solution to approach that of centralized algorithms, which serve as the performance ceiling. Because the coordination overhead is constant and minimal, and the computational load is effectively distributed, the system performance is far less affected by network size growth than centralized solutions. This makes it highly suitable for deployment in future network scenarios such as ultra-dense networking and large-scale carrier aggregation, enabling high-performance, low-overhead, and scalable distributed resource allocation under an O-RAN architecture.

This invention discloses a method for optimizing multicast paths in a specified source multicast SSM environment under IPv6, relating to the field of IPv6 multicast transmission technology. The method includes acquiring real-time network node status information and establishing a network performance model, quantifying the transmission cost and potential bottlenecks of each link in the path, and calculating the comprehensive transmission overhead estimate of the initial multicast forwarding path. A path evolution engine searches for a set of alternative forwarding paths in the network topology, calculates the comprehensive transmission overhead estimate of each alternative path, filters out a set of candidate optimized paths with lower overhead than the initial path, selects the path with the lowest overhead as the optimized multicast forwarding path, and forwards the multicast data to the receiver along this path. This invention can achieve accurate quantification of link-level transmission performance, adapt to real-time network status, determine the optimal path through two-level filtering, avoid link bottlenecks, reduce multicast transmission overhead, and improve the adaptability and transmission efficiency of IPv6 SSM multicast transmission.

A memory system with content-addressable entries supporting scalable, low overhead, in-fight establishment and retirement of resource-based linked lists, and related methods of operation and computer-readable media. The memory system can be used to track and establish an ordering of in-flight instances of access to a resource through a linked-list of content-addressable entries established in the memory system corresponding to such resource. Entries in the memory system that represent instances of access to a given resource can each be established as part of a linked list associated for the given resource to track a priority order for multiple instances of access the resource and then retired when an instance of access has been completed as part of a tracking system, such as to avoid hazards. The memory system provides a way to establish entries in a linked list for in flight instances of access to a resource for ordering and tracking.

Error-corrected quantum computation using transversal gates and correlated decoding is provided. A first and second logical qubit is encoded into physical qubits according to a quantum error correcting code. Based on the quantum error correcting code, a bipartite decoding graph is constructed corresponding to the first and the second logical qubits, the bipartite decoding graph comprising a plurality of detector nodes and a plurality of error nodes, each error node corresponding to an error mechanism. A transversal gate is applied to the first and the second logical qubits. Syndrome measurement of the first and the second logical qubits is performed. For each of the plurality of detector nodes affected by the corresponding error mechanism of one of the plurality of error nodes, an edge is generated on the bipartite decoding graph therebetween. A physical error configuration is determined from the bipartite decoding graph.

Techniques are provided for atomic writes for persistent memory. In response to receiving a write operation, a new per-page structure with a new page block number is allocated. New data of the write operation is persisted to a new page of the persistent memory having the new page block number, and the new per-page structure is persisted to the persistent memory. If the write operation targets a hole after the new data and the new per-page structure have been persisted, then a new per-page structure identifier of the new per-page structure is inserted into a parent indirect page of a page comprising the new data. If the write operation targets old data after the new data and the new per-page structure have been persisted, then an old per-page structure of the old data is updated with the new page block number.

This invention relates to a user-mode thread scheduling method, apparatus, and storage medium based on behavior prediction. A short-term behavior predictor calculates prediction results using a hybrid model. A scheduling decision engine receives these prediction results, calculates a comprehensive benefit score based on the prediction results, and generates scheduling and migration decisions. A core affinity and migration controller executes migration decisions, controls the computation core to run CPU-intensive tasks, controls the I / O core to bind I / O interrupts and run I / O-intensive tasks, and controls the scheduling core to select user-mode thread tasks from a multi-level run queue and allocate them to the computation core or I / O core for execution. The scheduling and migration decisions involve resource allocation and priority adjustment. A lightweight behavior collector can collect the operational characteristics of user-mode threads with low overhead. While maintaining low overhead, a hybrid model is used to dynamically model thread behavior characteristics, predict short-term thread operational trends, and perform resource allocation and priority adjustment accordingly, thereby improving the overall system throughput.

This invention belongs to the field of computer technology, specifically relating to a wear-aware space allocation method based on a persistent memory file system. The method includes: dividing the PM space into blocks composed of several consecutive physical pages; dividing all blocks into G groups based on block size; organizing all blocks within the same group into singly linked lists and storing the head nodes of the G linked lists in an array; setting a write counter for each page to record page write activity and storing all write counters in an array; when an I / O request arrives, allocating candidate blocks directly from the corresponding groups using a multi-level allocation mechanism based on the I / O request size, and reclaiming free blocks using a wear-aware reclamation mechanism. This invention achieves low-overhead, high-precision wear leveling by using a multi-level allocation mechanism to directly allocate candidate blocks from the corresponding groups and a wear-aware reclamation mechanism to reclaim free blocks, significantly improving system performance.

A network perception method, distributed device, equipment and computer readable storage medium. In the device forwarding layer, the message is not encapsulated, the device bandwidth during forwarding is guaranteed, and the device bandwidth utilization is improved; real-time detection and flow sampling reporting are performed to guarantee data accuracy and low overhead of the control layer; the control layer sends information of the control layer state table according to a sending weight, so that the management layer can receive important network state information more preferentially, and the overall overhead of the management layer is reduced; compared with the existing network perception technology based on in-band measurement, by maintaining the forwarding layer state table, the perception level is adjusted from a data packet to a data flow level, the consumption of network bandwidth resources is reduced, and the processing complexity and the consumption of computing resources of the management layer are also reduced.

This application provides a method and system for detecting anomalies in Linux kernel I / O event handling. The method includes: collecting the I / O request dwell time without locks through percpu variables at preset I / O blocking nodes in the Linux kernel storage stack bio and request stages; creating file nodes in debugfs to summarize and output the time-consuming data in response to user-space read requests; and creating an I / O tracking structure for each I / O stage of each block device to manage the entry and exit of instances in the I / O request stage. It can also track the I / O context by registering hooks in the Device Mapper framework, and achieve asynchronous data interaction between the kernel and user space using a lock-free circular buffer and the io_uring interface. This application achieves layered observation of the entire I / O chain, low-overhead lock-free operation, and can locate abnormal I / O in seconds, balancing observation accuracy and business I / O performance, without affecting business operations.

The application discloses a low-overhead configurable hardware encoding and decoding processing system compatible with ML-DSA and ML-KEM algorithms, and belongs to the field of integrated circuit design and hardware security. The system receives control information through an instruction interface, and dynamically configures a data processing path according to an algorithm type, a security level and an operation mode. The core of the system comprises a configurable bit width conversion unit, supports flow conversion between various bit widths of 6-64 bits, and integrates a special h encoding and decoding module for the ML-DSA algorithm. Through the design of constructing a unified flow data path, multiplexing hardware resources and hiding memory access delay, the application significantly reduces the area and time overhead of hardware implementation while ensuring the correctness and processing efficiency of the encoding and decoding functions, and provides key support for high-performance hardware implementation of post-quantum cryptographic algorithms in resource-constrained environments such as embedded devices.

Embodiments of the present application provide an end-side model inference dynamic optimization method, device, equipment and medium. The method surrounds the end-side single-flow CPU inference path, establishes a performance, energy consumption and thermal state measurement system covering the prompt processing stage and the self-recurrence generation stage, and adopts a fixed word window unified index statistics and configuration decision. The offline measurement is performed on the CPU frequency, thread number and affinity configuration space, the feasible boundary and preferred priori are refined, and a discrete neighborhood search dynamic optimization method under the offline priori constraint is proposed. Thus, taking a unified comprehensive cost function as an optimization target, the online search is limited in the feasible neighborhood obtained through offline screening under the first word delay, thermal safety and frequency accessibility constraint, and combined with the minimum residence, anti-shake, limited memory and controlled jump-out mechanism, the low-overhead joint adjustment of the CPU frequency and thread number is realized, while the adaptability to state changes is improved.

Error-corrected quantum computation using transversal gates and correlated decoding is provided. A first and second logical qubit is encoded into physical qubits according to a quantum error correcting code. Based on the quantum error correcting code, a bipartite decoding graph is constructed corresponding to the first and the second logical qubits, the bipartite decoding graph comprising a plurality of detector nodes and a plurality of error nodes, each error node corresponding to an error mechanism. A transversal gate is applied to the first and the second logical qubits. Syndrome measurement of the first and the second logical qubits is performed. For each of the plurality of detector nodes affected by the corresponding error mechanism of one of the plurality of error nodes, an edge is generated on the bipartite decoding graph therebetween. A physical error configuration is determined from the bipartite decoding graph.

The application relates to the computer technical field, and relates to a neural network layer boundary confusion method and system based on adaptive Tile division. The method comprises the following steps: receiving feature map parameters and weight parameters of a current neural network layer; taking a Tile of an NPU calculation unit as a division granularity, dynamically dividing the current layer into n virtual sublayers according to the feature map parameters and the weight parameters; sequentially scheduling and executing the calculation of each virtual sublayer; when the i-th sublayer is executed, pre-fetching and caching data required by the i+1-th sublayer to a sublayer buffer zone, so as to realize pipelining calculation; and dynamically generating non-continuous physical storage addresses for the output data of each virtual sublayer, and writing the output data into the corresponding addresses. The application realizes efficient and low-overhead layer boundary confusion, and provides a powerful guarantee for the safe calculation of an NPU.

The application relates to a multi-core server job quick scheduling and core allocation method and system, which comprises the following steps: step 1: a client sends a job request to a server, and the server receives and caches the job request; step 2: a scheduler takes out the job request and allocates a pre-created container pool to execute the job; step 3: a scheduling strategy is defined, and cores are dynamically allocated according to core load and the number of jobs; when the cores are transferred, the scheduler reallocates the cores; when the cores are preempted, a recovery mechanism is used to recover and execute the jobs, and the execution result is returned to the client. The application introduces an event-driven strategy customization interface, supports users to quickly define and apply personalized scheduling strategies, and designs a microsecond-level, low-overhead core preemption and reallocation mechanism, so that efficient dynamic adjustment of resources can be realized in multi-program parallel jobs, and therefore the system performance and resource utilization can be significantly improved.

The application relates to a multi-model fusion divide-and-conquer dual-target real-time decision system and method. The method comprises the following steps: obtaining a structured task feature vector; determining a task type of a to-be-processed task through an artificial neural network (ANN) task classification model; when the task type is a main scheduling task type, generating a candidate server node set through a node adaptation degree model; generating a first performance index and a second performance index of each candidate server node in the candidate server node set through a first performance prediction model and a second performance prediction model respectively; calculating a comprehensive scheduling score of each candidate server node; and determining a target server node according to the comprehensive scheduling score to schedule the to-be-processed task to the target server node for processing. The application realizes accurate node matching for different tasks, low-cost and high-efficiency divide-and-conquer scheduling, and thus the overall scheduling stability and the cluster processing capacity are significantly improved.

This invention discloses a multicast NoC routing system and its implementation method based on an adaptive routing algorithm, belonging to the field of Network-on-Chip (NoC) communication technology. The technical problem it addresses is that existing solutions, such as tree-structured virtual circuit multicast or parallel pipelines, fail to effectively balance dynamic obstacle avoidance and low-overhead requirements. The system includes an input control and routing arbitrator, used to receive data chips introduced by upstream nodes, extract the target address, compare the target address with the local address in X-Y dimension order, and generate direction selection signals Select1 / Select2 and a virtual circuit hold signal Keep_sel; a crossover selection switch, used to copy data packets according to the direction selection signals Select1 / Select2, filter irrelevant addresses, and distribute data in parallel to multiple directions; and an output buffer and controller, used to buffer data, handshake with downstream nodes, manage tail chip processing and virtual circuit release, and implement an anomaly recovery mechanism.

According to one embodiment, an operation method of user equipment (UE) may comprise: performing an attach procedure for an Evolved Packet System (EPS) service; transmitting information on a support of control plane Cellular Internet of Things (CIoT) EPS optimization with overhead reduction during the attach procedure or a tracking area update procedure; and if the UE is in a connected mode, for data transfer with reduced overhead over satellite access, initiating an EPS Mobility Management (EMM) data transport procedure. The EMM data transport procedure may include transmitting an EMM transport message. The EMM transport message may include a downlink data expected (DDX) information element (IE). The DDX IE may indicate that no further uplink and no further downlink data transmission subsequent to an uplink data transmission is expected or that only a single downlink data transmission and no further uplink data transmission subsequent to the uplink data transmission is expected.

The application discloses a kind of star group reconfiguration methods for giant satellite constellation burst mission planning, belong to satellite resource scheduling technical field, including: star area domain first acquisition burst task, according to its space-time characteristics and resource demand intelligent grouping is carried out to compress search range;Establish the optimization model including resource constraint and the weighted index function that fused star group elasticity and the coherence of re-scheduling;Double-layer optimization solution, the first layer is based on the algorithm of contract network of auction mechanism and is quickly handled resource conflict, the second layer is based on the algorithm of regret value game and is carried out fine scheduling to star group of unmet demand.The application is solved by intelligent grouping, the defect of slow response, model is not comprehensive and low efficiency of solution of existing technology, realizes the fast, reliable and low overhead dynamic re-scheduling of star group resource under emergency task through the modeling of elasticity and overhead collaborative optimization and the double-layer solution architecture of "first fast and then fine".

The application provides a divider processing method and system for specific divisors, and relates to the technical field of computer arithmetic and digital circuit design, wherein the dividend is expressed in binary form and divided into m n-bit grouped values; when the specific divisor is -1 or a factor of -1, or the divisor is +1 or a factor of +1, or the divisor is a factor of 2 raised to a power, or the divisor is a product between factors, a hardware circuit capable of realizing the division operation is constructed based on a multi-operand adder, an addition tree circuit, a shifter, a small parameter multiplier or a lookup table, so as to realize the complete divider calculation of the efficient, low-cost and synchronous output of the accurate division result for the specific divisor.

This application provides a communication method and a communication apparatus. The method includes: a first apparatus acquiring X MPC information items, where X is an integer greater than 1; the first apparatus determining Y MPC information items from the X MPC information items based on an MPC information reporting rule, and sending the Y MPC information items, where the Y MPC information items are used to determine channel information, and Y is an integer greater than or equal to 1 and less than or equal to X. In this way, on the one hand, channel information can be determined using MPC information with low overhead. On the other hand, by designing an MPC information reporting rule, when all MPC information is difficult to carry on the physical channel, or when reporting all MPC information incurs high overhead, the rule can be used to select some MPC information items for reporting; in other words, some MPC information items can be discarded to reduce the signaling overhead caused by reporting MPC information.

The application discloses a large model inference energy-saving method based on fine-grained DVFS, and relates to the technical field of artificial intelligence.The application proposes an inference energy-saving framework for high-energy-efficiency LLM services, performs iterative level and load-aware GPU frequency control, and guarantees delay service quality.The framework is composed of three modules: first, a frequency-delay predictor based on machine learning, which estimates the delay of each iteration at the candidate GPU frequency by using lightweight iteration features;second, an SLO-oriented frequency controller, which selects a feasible frequency within the candidate range guided by the sweet spot interval;third, a low-overhead runtime optimization layer, which reduces and hides the overhead of online control by combining adaptive decision caching and asynchronous execution.The application has clear energy-saving effect, good stability and scalability, is convenient for engineering landing, and is conducive to the construction of green data centers and computing power infrastructure.

The present disclosure provides a log collection method and device for GPU virtualization driver, and a medium, relating to the technical field of GPU virtualization. The method comprises: constructing an isolated and efficient log transmission channel by allocating an independent shared memory area for each guest virtual machine on the host side and completing address mapping; at the same time, starting an independent log reading thread and reading the log in the shared memory on demand based on a configurable log collection mode, while recording the log generated on the host side, realizing the synchronous collection of double-end logs, keeping the system at low overhead during normal operation, and obtaining complete context information when an exception occurs; by comprehensively analyzing the first driving operation log from the shared memory and the second driving operation log on the host side, the running behavior link across the host and the virtual machine can be associated and restored, the accuracy and efficiency of abnormal diagnosis are improved, and the resource occupation and maintenance complexity caused by additional components are reduced.

Systems and methods for selective User Plane protection in a 5G virtual RAN are provided. A method performed by a gNB Central Unit (gNB-CU) for communicating with a gNB-Distributed Unit (gNB-DU) includes determining whether to selectively encrypt a PDU to be sent to the gNB-DU if the PDU is not otherwise encrypted. In response to determining to selectively encrypt, the method includes encrypting the PDU to be sent to the gNB-DU. In response to determining to not selectively encrypt, the method includes passing the PDU to be sent to the gNB-DU. In this way, additional security is provided while performance impact is minimized. In some embodiments, this provides a lower overhead on the gNB-CU-UP side compared to applying a generic protection of all PDUs. Additionally, the latency overhead is limited since a secure session establishment and handshake is confined to the gNB-CU-UP-SEG domain instead of gNB-CU-UP to gNB-DU.

A system and method for performing a low overhead refresh management of a memory device. The method includes receiving, by a controller from a dynamic random access memory (DRAM) device via a feedback interface, a signal indicative of an occurrence of a row hammer event. The method includes determining, by the controller based on the signal, whether to schedule a refresh event. The method includes sending, by the controller responsive to determining whether to schedule the refresh event, a first command to the DRAM device to execute a refresh operation.