162 results about "Low overhead" patented technology

The invention discloses an inference task collaborative scheduling system and method oriented to multiple terminals of a swan gap. The inference task collaborative scheduling system comprises a communication module Broker, a system monitoring module SystemProfilter, a scheduling module Scheduler and an inference task execution module Worker. According to the method, a structured resource state vector is constructed based on an NDK native interface so as to comprehensively represent the real-time availability of equipment; a lightweight MQTT protocol is adopted to support low-overhead and high-robustness cross-terminal state synchronization and task distribution; a comprehensive load scoring mechanism fusing task priorities and dynamic weights is designed, a multi-objective optimization problem based on a non-dominated sorting genetic algorithm (NSGA-II) is introduced, task delay is minimized in a combined mode, terminal loads are balanced, and energy consumption is controlled; meanwhile, the execution time delay is efficiently estimated in combination with a proxy model based on linear regression, and the scheduling overhead caused by real reasoning and calling is avoided; the whole architecture is deeply adaptive to a swan-mong system, and is compatible with an Android platform through modular packaging and unified communication interface design, and efficient, self-adaptive and cross-platform collaborative scheduling oriented to a swan-mong multi-terminal reasoning task is realized for the first time.

The invention relates to efficient token pruning in a converter-based neural network. Key-value (KV) caching accelerates reasoning in large language models (LLMs) by allowing attention operations to extend linearly (rather than quadratically) with total sequence length. Due to the larger context length in modern LLM, the KV cache size may exceed the model size, which may negatively affect throughput. To solve this problem, a KVCrush is implemented that represents a key-value cache size reduction using head behavior similarity. KVCrush involves representing tokens using a binary vector, wherein the vector indicates which attention heads focus on tokens and which attention heads ignore tokens. Binary vectors are used in a hardware efficient low overhead process to generate representatives of unimportant tokens to be pruned without implementing k-means clustering techniques.

The invention belongs to the technical field of path planning, and particularly relates to an intelligent path planning method for a four-way shuttling robot, which comprises the following steps of: generating an initial path by adopting a JPS (JavaScript Pattern Scheduling) algorithm and extracting key anchor points; the system responds through an innovative hierarchical decision-making mechanism: firstly, the stability of anchor points behind conflict points is evaluated, and if the stability is high, a minimum repair window is adopted; and if the stability is uncertain or low, topological influence depth verification is started to dynamically define an optimal local repair window, finally, local path replanning is performed in the window, and a generated new path section is seamlessly spliced with an original path. According to the method, efficient and low-overhead path updating in a dynamic environment is realized through a self-adaptive local repair strategy, and the stability and efficiency of robot operation are ensured.

The invention discloses an Ethernet-based distributed cache coherence protocol, an implementation method, an implementation device and an implementation system. A plurality of computing nodes are connected through a packet switching network. Each computing node comprises a CPU / GPU (Central Processing Unit / Graphics Processing Unit) and a local cache thereof, and is provided with a cache agent. The far-end memory is organized in home nodes, and each home node manages a part of physical address space and is equipped with a directory controller. When the CPU of the computing node accesses a far-end memory address and does not hit in the local cache, the CA of the computing node replaces the far-end memory address and communicates with the DC managing the address through the network so as to maintain the cache consistency of the data among all the nodes. Based on a cache consistency protocol of a directory, the CXL.cache consistency of a plurality of independent computing nodes can be maintained in a low-overhead and high-reliability mode on a high-delay and lossy packet switching network, and broadcast storm caused by a monitoring protocol is avoided.

The invention discloses a data processing method and electronic equipment, relates to the technical field of computers, and aims to realize hot data preliminary screening through performance data, refine access features by compressing a heat map, dynamically update a heat score, and realize dynamic classification and hierarchical storage of data by comparing a target threshold with the heat score. According to the method and the device, the distribution of the data between the DRAM and the CXL memory is completed, and the technical effects of accurately identifying the hot data and optimizing the storage position are achieved on the premise of ensuring low overhead, so that the overall performance of the system is improved.

The invention relates to a multi-node memory synchronization method and device, equipment, a storage medium and a program product. The method comprises the following steps: establishing connection among nodes in a distributed system, configuring local / far-end queues for recording the busy degree of a thread for each node, creating a queue pair associated with a unique doorbell address for each node in combination, and optimizing a retention rule and an error reporting mechanism of a working queue element (WQE) in the queue pair, so that the busy degree of the thread is recorded; batch synchronization of multi-node memory data is achieved by adding an RDMA write operation WQE recording the busy state of a thread before a far-end mapping memory area is newly added and triggering hardware to execute RDMA write operations corresponding to all WQEs in a queue pair in sequence when the busy state of a local thread is updated. By the adoption of the method, the switching frequency of a CPU core between the synchronization task and the calculation task can be reduced, efficient, low-overhead and high-reliability multi-node memory synchronization is achieved, and the method meets the performance requirement of a large-scale distributed system.

The invention discloses a self-adaptive process scheduling method and system based on real-time state perception, and the method comprises the steps: firstly carrying out the low-overhead real-time monitoring of a system operation state through an extended Berkley data packet filter technology, and collecting multi-dimensional original data; secondly, identifying a current system load mode by using a pre-trained gradient boosting decision tree model, and performing stable prediction on a load mode of a next decision period in combination with a historical window mechanism based on time weighted voting so as to smooth instantaneous fluctuation; then, querying a'load mode-target scheduler 'mapping table which is constructed offline in advance according to a prediction result to determine a target scheduling strategy; and finally, dynamically and safely switching to a target scheduling strategy through the extensible scheduler class framework, and realizing self-adaptive adjustment of system scheduling. According to the method, macroscopic strategy selection and microcosmic scheduling decision are decoupled, high real-time inference overhead is avoided, safety and stability of the system are guaranteed by utilizing a kernel native mechanism, and the system operation efficiency under diversified loads is remarkably improved while low performance overhead, high safety and easy deployment are kept.

Embodiments of the present disclosure relate to methods, devices and computer readable media for communication. A terminal device receives, from a network device, a first timing value set associated with a first HARQ feedback with a first priority, a second timing value set associated with a second HARQ feedback with a second priority different from the first priority, and a TDRA list for the first and second HARQ feedbacks, determines a third timing value set from the first and second timing value sets, constructs a HARQ codebook comprising the first and second HARQ feedbacks at least based on the third timing value set and the TDRA list, and transmits the HARQ codebook to the network device on an uplink control channel. In this way, unnecessary redundancy in HARQ bits can be removed and UCI overhead can be reduced.

The invention relates to the technical field of automatic testing, discloses a fine-grained data change log management method and system for an automatic testing platform, and aims to realize high-precision, low-overhead and high-reliability log acquisition of business object field and set element change in a testing process on the premise of not modifying a testing code. The system comprises a declarative acquisition module for marking a to-be-monitored test object through declarative configuration and dynamically injecting log acquisition logic during test operation; the log processing engine is used for respectively acquiring state snapshots of the target business object before and after the test is executed, and identifying change information; the template factory component is used for packaging the identified change information, the context metadata and the timestamp according to a predefined structured data template to generate a standardized log record; and the log persistence module is used for writing log records into a lock-free annular buffer region realized based on atomic operation, and the log records are triggered by a batch coordinator of an independent thread to be asynchronously written into a main storage system in batches.

This invention belongs to the technical field of embedded artificial intelligence and real-time system scheduling, and more specifically, relates to an adaptive load resource scheduling method and apparatus for embedded GPUs. The method involves offline acquisition and modeling of the platform's thermal throttling behavior, constructing DNN variants with different computational loads and accuracies, and profiling them under multiple frequency and TPC configurations to obtain a latency-power mapping table. In the online phase, based on task deadline margins and current temperature / frequency states, the method looks up the variant with the highest accuracy and meeting the deadline under the current thermal conditions and selects the corresponding TPC configuration from the profiling table. If necessary, phased online pruning and low-overhead switching are implemented, and the method collaborates with system-level DVFS / task mapping to optimize energy efficiency. This method can still guarantee the real-time performance of inference tasks under passive frequency reduction conditions and significantly reduce performance fluctuations caused by thermal throttling.

A data compression method and a related device, used for reducing I / O overhead. The data compression method comprises: acquiring attribute information of a logic block, wherein the logic block comprises a plurality of data pages, and the attribute information indicates data sizes of data contained in the plurality of data pages across a plurality of time periods; if the attribute information indicates that the total data size of the data contained in the plurality of data pages during a target time period is greater than or equal to a first threshold, compressing the data contained in the logic block, and storing the result obtained by compression, wherein the target time period includes at least time period among the plurality of time periods, and the time interval between the target time period and the current moment is greater than or equal to a time threshold; and if the attribute information indicates that the total data size of the data contained in the plurality of data pages during the target time period is less than the first threshold, determining not to compress the data contained in the logic block.

One or more systems, devices, computer program products and / or computer-implemented methods of use provided herein relate to low-overhead fault-tolerant quantum computation by gauging logical operators. For example, a system can comprise a memory that can store computer executable components and a processor that can execute the computer executable components stored in the memory. The computer executable components can comprise a graph selection component that can select an auxiliary graph. The computer executable components can further comprise a measurement component that can measure a logical operator by executing, on a quantum system, a deformed quantum stabilizer code based on the auxiliary graph.

The invention relates to a dynamic self-adaptive communication, sensing and calculation integrated method for an air-space-ground integrated network. The method comprises the following steps: S1, constructing an air-space-ground integrated network model fusing a low earth orbit satellite, an unmanned aerial vehicle and ground users / edge nodes; s2, establishing a cross-layer communication-perception-calculation integrated joint optimization model, and respectively forming two modes of binary unloading and partial unloading according to whether a task can be segmented or not; s3, for a binary unloading mode, realizing distributed solution and generating an unloading decision and a beam / power / bandwidth / computing resource scheme by using a dynamic adaptive prediction alternating direction multiplier (DAP-ADMM); and S4, aiming at a partial unloading mode, adopting a weighted minimum mean square error alternative optimization method, introducing a receiving equalizer, error weight and other auxiliary variables, executing block coordinate descent iteration, and outputting an unloading proportion, power distribution and a beam forming result. According to the DA-ISCC architecture and the optimization algorithm thereof provided by the invention, cross-domain calculation unloading with low time delay, high throughput and low overhead can be realized in a high-dynamic space-air-ground integrated network environment, and the DA-ISCC architecture and the optimization algorithm thereof can be widely applied to emergency communication, low-altitude logistics, ocean monitoring and other scenes.

The invention relates to a low-overhead processor cache micro-architecture defense method and device and computer device.The low-overhead processor cache micro-architecture defense method comprises the steps that when a missing state keeping register module takes out a loading instruction waiting for data from a replay queue, a target branch mask of the loading instruction is obtained; the replay queue is used for storing an instruction which is stagnated due to miss of the cache; judging whether the loading instruction is in a speculative execution state or not according to the target branch mask; and when the loading instruction is in the speculative execution state, stopping a cache write-in operation corresponding to the loading instruction. Through the method and the device, the problem of sensitive information leakage caused by incapability of defending against the cache side channel attack is solved, defending against the cache side channel attack is realized, and sensitive information leakage is prevented.

This application provides a distributed wireless resource scheduling method and electronic device, relating to the field of wireless communication network technology. In this method, the coordinator and computing nodes only need one round of information exchange, avoiding the huge signaling overhead and accumulated latency caused by multiple rounds of iterative negotiation. Time-consuming optimization calculations are offloaded to multiple computing units for parallel execution, achieving a linear reduction in overall computation time. Furthermore, it leverages the approximate achievable rate to provide theoretical feasibility for distributed solutions, while global coordination by edge devices ensures the performance of critical users, allowing the performance of the distributed solution to approach that of centralized algorithms, which serve as the performance ceiling. Because the coordination overhead is constant and minimal, and the computational load is effectively distributed, the system performance is far less affected by network size growth than centralized solutions. This makes it highly suitable for deployment in future network scenarios such as ultra-dense networking and large-scale carrier aggregation, enabling high-performance, low-overhead, and scalable distributed resource allocation under an O-RAN architecture.

The invention relates to a low-overhead moving target defense method and device for false data injection attacks, and the method comprises the steps: constructing a topological structure of a power grid bus and branches based on actual intelligent power grid data, and associating the branches with an initial admittance value; establishing an initial measurement matrix based on the initial admittance value and the topological structure of the power grid bus and the branches, and constructing a moving target defense strategy based on the initial measurement matrix; based on an invalid branch identification criterion and a topological structure of a power grid bus and a branch, determining an invalid branch in the power grid; based on invalid branches and a greedy selection mechanism, traversing the bus to screen valid branches, and obtaining a modified branch set; and changing admittance values of branches in the branch set based on a moving target defense strategy, changing a measurement matrix, and realizing low-overhead moving target defense. Compared with the prior art, on the premise that the high detection probability is maintained, the number of branches needing to modify admittance and the calculation time are remarkably reduced, and therefore the system defense cost is reduced.

Enhanced security for Zero Trust networks is provided by SSH-customized tunnel clients / tunnel servers, a catalog service, and loopback address DNS mechanisms. Systems and methods provide Policy Enforcement Point (PEP) layer enhancements, strategically positioning the PEP between the user and the network resource. It manages network traffic flows and provides moderate control granularity, near-real-time enforcement decisions, low overheads, and broad applicability to TCP / IP traffic through modified tunneling implementations of Secure Shell (SSH). Unique use of SSH tunneling is utilized and adapted to selectively filter tunnel requests based on user entitlements, ensuring secure and authorized access to network resources. This method entails detailed assessment of tunneling requests, DNS manipulation, and the use of loopback address space for traffic redirection, all without requiring modifications to client-side applications. The approach significantly enhances network security by controlling access based on continuous verification of user entitlements, addressing the shortcomings of traditional network security models.

The disclosure describes a method of evaluating performance of a two-sided model used for performing CSI compression. The method includes receiving, by a network, from a UE, a compressed channel Ht, a second eigenvector EVt+1 corresponding to a channel Ht+1, and a first similarity score determined between a first eigenvector EVt and the second eigenvector EVt+1. A channel Ht is reconstructed by processing the compressed channel Ht using a decoder part of the two-sided AI / ML model. Eigen decomposition of the channel Ht is performed to obtain an eigenvector (EV)t. A second similarity score is determined between the eigenvectors (EV)t and EVt+1. Alternatively, the first similarity score is determined between an estimated channel H and a codebook based precoder W, and a second similarity score is determined between a reconstructed channel H and the codebook based precoder W.

The invention discloses a lightweight embedded serial input conversion unit, which is used for designing an in-memory calculation circuit supporting lower-overhead floating-point number reference shift. The invention provides a lightweight input counter-pointing shift architecture, which comprises the following steps: firstly, calculating the exponent sum of a group of inputs and weights in parallel, finding out the maximum value, subtracting 1 from the maximum value per cycle, observing whether the maximum value is equal to other exponent sum values or not, and generating mantissa serial shift control signals of corresponding inputs, thereby realizing global counter-pointing shift. Compared with a traditional floating point alignment shifting scheme, the floating point alignment shifting method has the advantages that a barrel-shaped shifter, a subtracter and a parallel-to-serial circuit which are large in area are prevented from being used, and the floating point calculation function is achieved with smaller hardware expenditure.

The embodiment of the invention provides a communication method, an electronic device, a program product and a storage medium, and aims at enabling a terminal device to communicate with a network device in an OCC scene and having the advantage of low overhead. The application provides a communication method applied to a first terminal device, the method comprising: receiving first information and second information from a network device, the first information being used for indicating orthogonal cover code (OCC) configuration information commonly used by the first terminal device and a second terminal device, the second information being used for indicating orthogonal cover code (OCC) configuration information commonly used by the first terminal device and the second terminal device; the second information is used for scheduling a first data channel corresponding to the first terminal equipment; and sending the first data channel based on the OCC configuration information.

The invention discloses a method and a system for efficiently establishing a controlled interception area based on location information perception, and the method abandons the traditional flooding indifference forwarding logic, takes node location information as a core judgment basis for controlling message forwarding, and achieves the directional propagation of a control message by constructing a perception boundary. A source node broadcasts an RTS frame containing a position and an included angle threshold value, a receiving node calculates an included angle between a connecting line of the receiving node and a sending node and a connecting line of a sending-destination node, and forwarding is carried out only when the included angle is smaller than the threshold value, so that directional propagation of a control message in the source-destination direction is realized. And after receiving the RTS, the destination node broadcasts a CTS frame, and the node judges a relay or a blocking node according to hop count information to complete region establishment. According to the method, the broadcast range is judged and limited through the position included angle, redundant messages are reduced, broadcast storm is inhibited, overhead is reduced, and establishment efficiency is improved.

This invention discloses a method for optimizing multicast paths in a specified source multicast SSM environment under IPv6, relating to the field of IPv6 multicast transmission technology. The method includes acquiring real-time network node status information and establishing a network performance model, quantifying the transmission cost and potential bottlenecks of each link in the path, and calculating the comprehensive transmission overhead estimate of the initial multicast forwarding path. A path evolution engine searches for a set of alternative forwarding paths in the network topology, calculates the comprehensive transmission overhead estimate of each alternative path, filters out a set of candidate optimized paths with lower overhead than the initial path, selects the path with the lowest overhead as the optimized multicast forwarding path, and forwards the multicast data to the receiver along this path. This invention can achieve accurate quantification of link-level transmission performance, adapt to real-time network status, determine the optimal path through two-level filtering, avoid link bottlenecks, reduce multicast transmission overhead, and improve the adaptability and transmission efficiency of IPv6 SSM multicast transmission.

The invention discloses a data redundancy method and device for distributed key value storage based on a block data copy, and belongs to the technical field of computer storage. The data redundancy method comprises the following steps: receiving a key value request of a user, calculating a hash value of a key corresponding to the key value request, determining a corresponding primary copy key value storage instance according to the hash value, and forwarding the key value request to the corresponding primary copy key value storage instance; calling a key value index interface through the key value storage instance, and converting the key value request into a block device read-write request; submitting the block device read-write request to a block device driving engine, and judging whether the block device read-write request is a write request or a read request; if the request is the write request, generating a copy and writing the copy into local and remote copy disks; and if the request is a read request, reading corresponding block data from a local or remote copy disk. The beneficial effects of reducing CPU overhead and improving system performance and maintainability are achieved.

A memory system with content-addressable entries supporting scalable, low overhead, in-fight establishment and retirement of resource-based linked lists, and related methods of operation and computer-readable media. The memory system can be used to track and establish an ordering of in-flight instances of access to a resource through a linked-list of content-addressable entries established in the memory system corresponding to such resource. Entries in the memory system that represent instances of access to a given resource can each be established as part of a linked list associated for the given resource to track a priority order for multiple instances of access the resource and then retired when an instance of access has been completed as part of a tracking system, such as to avoid hazards. The memory system provides a way to establish entries in a linked list for in flight instances of access to a resource for ordering and tracking.

The invention discloses a federated learning acceleration method and system based on pipeline in-batch real-time data sampling and training. According to the method, in-batch data sampling is provided on the algorithm level aiming at the problems that computing resources of edge equipment are limited and importance is outdated and gradient deviation is caused by existing static sampling: the importance of samples in a fixed mini-batch is evaluated in real time by utilizing a latest model in each round of iteration, and a dynamic micro-batch is constructed; and through a gradient correction coefficient based on a sampling probability reciprocal, distribution deviation is eliminated, and unbiased training is realized. On the system level, an assembly line parallel mechanism based on a CPU-GPU heterogeneous architecture is designed, overlapping execution of sampling and training is achieved through a double-thread-double-flow concurrent model, data competition is solved through an annular buffer area and an event synchronization mechanism, and overhead is reduced in cooperation with mixing precision reasoning. According to the method, the hardware utilization rate can be remarkably improved, the model convergence precision is improved while the training time is greatly shortened, and the method is suitable for various edge computing scenes.

The invention provides an anti-collusion low-overhead two-way verification privacy protection federated learning method, which specifically comprises the following steps: S1, a trusted third party initializes system parameters, and a server initializes a global model and distributes the global model to a client; s2, the client uses local data to train a global model and carries out compression encryption, signature and share division on an output calculation result; s3, the server reconstructs the client ciphertext by integrating the share shared by the client and verifies the correctness of the reconstruction result; s4, aggregating the ciphertext by the server; and S5, the client decrypts and decompresses the aggregated ciphertext and verifies an aggregation result. The invention provides an anti-collusion low-overhead two-way verification privacy protection federated learning method. According to the method, while bidirectional verification between the client and the server is realized, a scheme is constructed by using a super-incremental sequence and lightweight cryptographic primitive secret sharing, so that the computing load of the system is effectively reduced, and the tolerance of the system to collusion of the client and the server is improved.

When a state machine of the time sequence circuit is influenced by a single event upset (SEU) effect, a state code of the state machine is very easy to change, so that the state machine is in an invalid or error state and cannot be recovered, and the function of the time sequence circuit is failed. Aiming at a state machine based on Hamming distance-3 coding, the invention provides the low-overhead error detection circuit for the Hamming distance-3 five-bit state code, and the resource overhead in the error detection process is greatly reduced by simplifying the judgment logic of a detection unit.

The invention belongs to the technical field of integrated circuits, and particularly relates to a high-precision low-overhead runtime on-chip digital power meter. The power meter comprises a bit-level agent flipping detection module, a lifting binary tree prediction module, a weight score read-write module, a weight score accumulation module and an average power consumption calculation module. By detecting the activity of the proxy net in the deployed target design, the method adopts binarized input characteristics and a lightweight nonlinear prediction model, and can avoid high-precision redundant calculation while keeping high-precision prediction of dynamic power consumption, thereby accelerating the calculation period and reducing the area overhead. The method has the characteristics of high precision and low overhead, and can monitor the on-chip real-time dynamic power consumption by using efficient hardware resources.

The invention relates to the field of memory management, in particular to a concurrent management method of a multi-thread memory pool. A plurality of independent memory pools are maintained, each memory pool corresponds to a preset memory block size, an idle linked list composed of idle memory blocks is maintained in each memory pool, and each idle linked list is provided with a head pointer used for memory block allocation and capacity expansion and a tail pointer used for memory block recovery. Memory block allocation is realized only by operating a head pointer from the head of an idle linked list, and memory block recovery is realized only by inserting the tail of the idle linked list, so that memory block allocation and recovery operations are executed concurrently under a lock-free condition; and setting a first mutual exclusion lock and a second mutual exclusion lock which are separated for each memory pool, wherein the first mutual exclusion lock and the second mutual exclusion lock respectively protect concurrent modification of the head pointer and the tail pointer. The method is simple in structure and low in cost, the number of times of lock competition and the memory fragmentation rate are remarkably reduced, and the memory allocation efficiency and the system throughput under the multi-thread environment are improved.

The embodiment of the invention discloses a network slice migration method and device, electronic equipment, a storage medium and a product. The method comprises the following steps: a 5G-A network base station forwards first configuration information of the 5G-A network base station to a 6G network base station, and the 6G network base station forwards second configuration information of the 6G network base station to the 5G-A network base station; the 6G network base station cooperates with each first network node of the 6G network base station to send the target configuration information to the 5G-A network base station; and the 5G-A network base station determines a target network slice based on the target configuration information, splices the second configuration information forwarded by the 6G network base station and the target configuration information to generate spliced configuration information, and forwards the target network slice and the spliced configuration information to the 6G network base station in cooperation with each second network node of the 5G-A network base station. According to the scheme, low-overhead, low-delay and high-concurrency network slice migration is realized.