234 results about "Low overhead" patented technology

The embodiment of the invention provides a model reasoning method, a computer program product and a chip. In the model reasoning process, the hidden state of each lexical element in each layer can be stored, and when the key value cache of the lexical elements needs to be used, the key value cache of each lexical element in each layer of the model can be recovered based on the hidden state and the key value projection weight matrix. According to the key value cache recovery scheme provided by the embodiment of the invention, the key value cache recovery can be realized by using the computing resource and the data transmission bandwidth resource of the chip at the same time at relatively low overhead instead of singly using one resource, so that the key value cache recovery efficiency can be greatly improved, and further, the model reasoning efficiency is improved.

The invention discloses an inference task collaborative scheduling system and method oriented to multiple terminals of a swan gap. The inference task collaborative scheduling system comprises a communication module Broker, a system monitoring module SystemProfilter, a scheduling module Scheduler and an inference task execution module Worker. According to the method, a structured resource state vector is constructed based on an NDK native interface so as to comprehensively represent the real-time availability of equipment; a lightweight MQTT protocol is adopted to support low-overhead and high-robustness cross-terminal state synchronization and task distribution; a comprehensive load scoring mechanism fusing task priorities and dynamic weights is designed, a multi-objective optimization problem based on a non-dominated sorting genetic algorithm (NSGA-II) is introduced, task delay is minimized in a combined mode, terminal loads are balanced, and energy consumption is controlled; meanwhile, the execution time delay is efficiently estimated in combination with a proxy model based on linear regression, and the scheduling overhead caused by real reasoning and calling is avoided; the whole architecture is deeply adaptive to a swan-mong system, and is compatible with an Android platform through modular packaging and unified communication interface design, and efficient, self-adaptive and cross-platform collaborative scheduling oriented to a swan-mong multi-terminal reasoning task is realized for the first time.

In an implementation, a memory subsystem may include input / output (I / O) circuitry having a data signal (DQ) group, the DQ group having multiple DQ lanes and a read data strobe, and one or more controllers coupled to the I / O circuitry, the one or more controllers being configured to assign, respectively to multiple DQ lanes of the DQ group, multiple read test delays that monotonically increase with respect to a read eye edge, read a read test value one time, using the DQ group, with the multiple read test delays respectively for each DQ lane in the DQ group, and update the read eye edge by adding a first read test delay, corresponding to a first DQ lane of the DQ lanes from the read test value that does not match a read eye training pattern, to the read eye edge to calculate a trained read eye edge.

Enhanced security for Zero Trust networks is provided by SSH-customized tunnel clients / tunnel servers, a catalog service, and loopback address DNS mechanisms. Systems and methods provide Policy Enforcement Point (PEP) layer enhancements, strategically positioning the PEP between the user and the network resource. It manages network traffic flows and provides moderate control granularity, near-real-time enforcement decisions, low overheads, and broad applicability to TCP / IP traffic through modified tunneling implementations of Secure Shell (SSH). Unique use of SSH tunneling is utilized and adapted to selectively filter tunnel requests based on user entitlements, ensuring secure and authorized access to network resources. This method entails detailed assessment of tunneling requests, DNS manipulation, and the use of loopback address space for traffic redirection, all without requiring modifications to client-side applications. The approach significantly enhances network security by controlling access based on continuous verification of user entitlements, addressing the shortcomings of traditional network security models.

The invention discloses a repeated data deletion method and system based on ZNS SSD, and belongs to the field of repeated data deletion.The method comprises the steps that a fingerprint index table and a fingerprint updating cache are maintained, three-time opportunity repeated data deletion is achieved, and repeated data search is conducted in the fingerprint index table, the fingerprint updating cache and an address mapping table respectively; an address mapping table, an address reverse mapping table and a reference counting table are maintained, physical space garbage collection / defragmentation and write request merging are achieved, the address mapping table, the address reverse mapping table and the reference counting table conduct garbage collection with partition as granularity when free space is insufficient, and a fingerprint index table is not updated after garbage collection data migration; and instead, the mapping of fingerprints to migration-in physical pages is stored in a fingerprint updating cache, the physical pages are sequentially distributed in partitions by the fingerprint updating cache, normal data write requests and garbage collection data migration write requests are respectively cached, and the write requests which are continuous in sequence are merged and then issued. According to the method, the high-performance and low-cost efficient storage system can be constructed on the basis of the ZNS SSD at relatively low overhead.

An integrated circuit includes a serializer configured to receive first test data in n-bit words and to generate a single bit data stream by serializing the test data in accordance with a first clock signal. The integrated circuit includes testing circuitry configured to test the serializer without utilizing a deserializer.

The invention discloses a communication trace data compression and storage method and system based on parallel program characteristics. The method comprises the steps that MPI calling is intercepted through a reloading MPI function for a target parallel program, and communication trace data is collected; for each piece of communication trace data, if the data is the communication trace data during first calling, recording the data into a data head by adopting a first data structure body, and if the data is the communication trace data generated during repeated calling, recording the data into a data body by adopting a second data structure body, the numerical field in the second data structure body is less than the numerical field of the first data structure body; and storing the communication trace data recorded in the data head and the data body. The invention aims to realize communication trace data compression and storage, the data scale is obviously reduced on the premise of ensuring the trace data to be complete and rich in content, and low-overhead data support is provided for users to analyze bottleneck problems related to large-scale parallel program communication.

The invention relates to efficient token pruning in a converter-based neural network. Key-value (KV) caching accelerates reasoning in large language models (LLMs) by allowing attention operations to extend linearly (rather than quadratically) with total sequence length. Due to the larger context length in modern LLM, the KV cache size may exceed the model size, which may negatively affect throughput. To solve this problem, a KVCrush is implemented that represents a key-value cache size reduction using head behavior similarity. KVCrush involves representing tokens using a binary vector, wherein the vector indicates which attention heads focus on tokens and which attention heads ignore tokens. Binary vectors are used in a hardware efficient low overhead process to generate representatives of unimportant tokens to be pruned without implementing k-means clustering techniques.

The invention relates to the technical field of industrial control automation, in particular to an SOE event writing method based on an off-chip nonvolatile memory, which comprises the following steps: S1, after a PLC (Programmable Logic Controller) is powered on, a processor reads a pointer stored in the off-chip nonvolatile memory and performs diagnosis processing on the pointer to complete power-on self-test; s2, after an event is triggered, a processor collects event information to generate an SOE event; and S3, the processor obtains the pointer from the off-chip nonvolatile memory, judges the state of the pointer, forms a new pointer value, stores the SOE event into the off-chip nonvolatile memory, and executes a new pointer write-back operation, so that the SOE event is written into the off-chip nonvolatile memory. According to the method, an SOE server does not need to participate in maintenance, so that the overhead is reduced, and the problems of repeated reading and record loss are prevented; and storage pointer errors caused by power failure faults are avoided, the storage pointers are diagnosed and recovered, and the recording reliability is improved.

The invention discloses a dependent task unloading method, a terminal device and a storage medium, and provides a multi-dependent task double-path dynamic unloading and scheduling scheme with two state embedding layers based on the dependent task unloading method, and characteristic vectors of a plurality of dependent tasks are captured by using a double-path GRU, so that the dynamic unloading and scheduling of the dependent tasks is realized. Remodeling the dependency task into a directed acyclic graph according to the feature vector, performing feature fusion of the multi-heterogeneous dependency task to obtain an optimal scheduling path of the multi-heterogeneous dependency task, training an unloading model according to the obtained optimal scheduling path, and making an optimal unloading decision; in consideration of the limitation of local edge model training, a new edge-cloud cooperative unloading framework is provided, and a trained unloading scheduling model in a heterogeneous edge server is uploaded to a cloud for weighted aggregation updating so as to improve the generalization ability of the model. The method has the characteristics of improving the calculation efficiency to more accurately and quickly process tasks and multi-task low-overhead processing.

The invention belongs to the technical field of path planning, and particularly relates to an intelligent path planning method for a four-way shuttling robot, which comprises the following steps of: generating an initial path by adopting a JPS (JavaScript Pattern Scheduling) algorithm and extracting key anchor points; the system responds through an innovative hierarchical decision-making mechanism: firstly, the stability of anchor points behind conflict points is evaluated, and if the stability is high, a minimum repair window is adopted; and if the stability is uncertain or low, topological influence depth verification is started to dynamically define an optimal local repair window, finally, local path replanning is performed in the window, and a generated new path section is seamlessly spliced with an original path. According to the method, efficient and low-overhead path updating in a dynamic environment is realized through a self-adaptive local repair strategy, and the stability and efficiency of robot operation are ensured.

The invention provides a distributed database system migration method and device supporting online migration of active transactions. The method and device are suitable for a distributed database to complete dynamic migration of fragmented or tenant-level data and transactions under the condition that services are not interrupted. The method comprises the following steps: generating a consistency snapshot of a source node and transmitting the consistency snapshot to a target node; capturing an incremental transaction log after snapshot in real time; a log is efficiently synchronized to a target node through a remote direct memory access (RDMA) mechanism; the logs are played back in parallel at the target node to construct a complete data state; identifying active transactions in the source node and migrating their context; the target node continues to execute the transaction until submission is completed; and finally updating system routing information to complete migration takeover. According to the method, migration delay is effectively reduced, online transaction migration is realized, and the method has the advantages of high availability, low overhead, high adaptability and the like, and is suitable for database scenes such as elastic capacity expansion and contraction, load balancing and the like.

The invention discloses an Ethernet-based distributed cache coherence protocol, an implementation method, an implementation device and an implementation system. A plurality of computing nodes are connected through a packet switching network. Each computing node comprises a CPU / GPU (Central Processing Unit / Graphics Processing Unit) and a local cache thereof, and is provided with a cache agent. The far-end memory is organized in home nodes, and each home node manages a part of physical address space and is equipped with a directory controller. When the CPU of the computing node accesses a far-end memory address and does not hit in the local cache, the CA of the computing node replaces the far-end memory address and communicates with the DC managing the address through the network so as to maintain the cache consistency of the data among all the nodes. Based on a cache consistency protocol of a directory, the CXL.cache consistency of a plurality of independent computing nodes can be maintained in a low-overhead and high-reliability mode on a high-delay and lossy packet switching network, and broadcast storm caused by a monitoring protocol is avoided.

The invention discloses a data processing method and electronic equipment, relates to the technical field of computers, and aims to realize hot data preliminary screening through performance data, refine access features by compressing a heat map, dynamically update a heat score, and realize dynamic classification and hierarchical storage of data by comparing a target threshold with the heat score. According to the method and the device, the distribution of the data between the DRAM and the CXL memory is completed, and the technical effects of accurately identifying the hot data and optimizing the storage position are achieved on the premise of ensuring low overhead, so that the overall performance of the system is improved.

The invention discloses a static and dynamic fusion low-overhead multi-thread optimal configuration prediction method and system. The method comprises the steps that key instruction counts are extracted from program intermediate representation of a target multi-thread program and normalized to form a static feature # imgabs0 #; sampling performance and energy consumption of a target multi-thread program when the target multi-thread program is executed in a small problem scale under default configuration and different key configurations on a target platform to form a dynamic characteristic # imgabs1 #; and the # imgabs2 # and the # imgabs3 # are spliced to form a static and dynamic fusion feature vector # imgabs4 #, and then a cross-scale optimal configuration prediction model is utilized to obtain prediction optimal configuration executed on a target platform by a target multi-thread program in a large problem scale. The method aims at solving the problems that an existing optimization method is high in high-dimensional configuration space exploration cost and heavy in large-problem-scale execution sampling burden, the aim of efficiently predicting optimal configuration in a cross-problem-scale mode is achieved, and meanwhile resource consumption and time cost in the optimization process are remarkably reduced.

The present application relates to a security audit method for a distributed database and a related device. The method comprises: acquiring a security audit request which is sent by a user terminal and carries an audit strategy identifier; acquiring, from a system database, a security audit strategy corresponding to the audit strategy identifier; acquiring a system load condition; determining whether the system load condition meets a dynamic degradation triggering condition; if the system load condition meets the dynamic degradation triggering condition, executing an adjustment strategy to perform a dynamic degradation operation; and if the system load condition does not meet the dynamic degradation triggering condition, outputting a load normal signal. In the present application, on the basis of the concept of audit dynamic degradation, during audit strategy configuration, a user can set a degradation triggering condition and a degradation operation on the basis of a system load condition, and when the degradation condition is met due to a high system load, dynamic degradation to low-overhead auditing or no auditing is triggered, thereby reducing the impact of auditing on the distributed database and an application.

The invention relates to a multi-node memory synchronization method and device, equipment, a storage medium and a program product. The method comprises the following steps: establishing connection among nodes in a distributed system, configuring local / far-end queues for recording the busy degree of a thread for each node, creating a queue pair associated with a unique doorbell address for each node in combination, and optimizing a retention rule and an error reporting mechanism of a working queue element (WQE) in the queue pair, so that the busy degree of the thread is recorded; batch synchronization of multi-node memory data is achieved by adding an RDMA write operation WQE recording the busy state of a thread before a far-end mapping memory area is newly added and triggering hardware to execute RDMA write operations corresponding to all WQEs in a queue pair in sequence when the busy state of a local thread is updated. By the adoption of the method, the switching frequency of a CPU core between the synchronization task and the calculation task can be reduced, efficient, low-overhead and high-reliability multi-node memory synchronization is achieved, and the method meets the performance requirement of a large-scale distributed system.

The invention discloses a self-adaptive process scheduling method and system based on real-time state perception, and the method comprises the steps: firstly carrying out the low-overhead real-time monitoring of a system operation state through an extended Berkley data packet filter technology, and collecting multi-dimensional original data; secondly, identifying a current system load mode by using a pre-trained gradient boosting decision tree model, and performing stable prediction on a load mode of a next decision period in combination with a historical window mechanism based on time weighted voting so as to smooth instantaneous fluctuation; then, querying a'load mode-target scheduler 'mapping table which is constructed offline in advance according to a prediction result to determine a target scheduling strategy; and finally, dynamically and safely switching to a target scheduling strategy through the extensible scheduler class framework, and realizing self-adaptive adjustment of system scheduling. According to the method, macroscopic strategy selection and microcosmic scheduling decision are decoupled, high real-time inference overhead is avoided, safety and stability of the system are guaranteed by utilizing a kernel native mechanism, and the system operation efficiency under diversified loads is remarkably improved while low performance overhead, high safety and easy deployment are kept.

The disclosure describes a method of evaluating performance of a two-sided model used for performing CSI compression. The method includes receiving, by a network, from a UE, a compressed channel Ht, a second eigenvector EVt+1 corresponding to a channel Ht+1, and a first similarity score determined between a first eigenvector EVt and the second eigenvector EVt+1. A channel Ht is reconstructed by processing the compressed channel Ht using a decoder part of the two-sided AI / ML model. Eigen decomposition of the channel Ht is performed to obtain an eigenvector (EV)t. A second similarity score is determined between the eigenvectors (EV)t and EVt+1. Alternatively, the first similarity score is determined between an estimated channel H and a codebook based precoder W, and a second similarity score is determined between a reconstructed channel H and the codebook based precoder W.

Various aspects of the present disclosure generally relate to reducing overhead and / or user equipment (UE) complexity when performing independent spatial domain (SD) basis selection in a channel state information (CSI) codebook. For example, a UE may select any SD basis in a codebook for a first layer, and may SD bases selected for additional layers may be restricted to SD bases that are orthogonal to the first SD basis. Furthermore, SD bases that are selected for a layer may be excluded from SD basis selections for subsequent layers, ensuring that different SD bases are selected for each layer. Accordingly, because SD basis selections for multiple layers are not reused and guaranteed to be orthogonal, a common or shared co-phase coefficient may be used for each SD basis selection to reduce a per-layer co-phase reporting overhead and / or UE complexity by avoiding a need to independently select co-phases for multiple layers.

Embodiments of the present disclosure relate to methods, devices and computer readable media for communication. A terminal device receives, from a network device, a first timing value set associated with a first HARQ feedback with a first priority, a second timing value set associated with a second HARQ feedback with a second priority different from the first priority, and a TDRA list for the first and second HARQ feedbacks, determines a third timing value set from the first and second timing value sets, constructs a HARQ codebook comprising the first and second HARQ feedbacks at least based on the third timing value set and the TDRA list, and transmits the HARQ codebook to the network device on an uplink control channel. In this way, unnecessary redundancy in HARQ bits can be removed and UCI overhead can be reduced.

The invention relates to the technical field of automatic testing, discloses a fine-grained data change log management method and system for an automatic testing platform, and aims to realize high-precision, low-overhead and high-reliability log acquisition of business object field and set element change in a testing process on the premise of not modifying a testing code. The system comprises a declarative acquisition module for marking a to-be-monitored test object through declarative configuration and dynamically injecting log acquisition logic during test operation; the log processing engine is used for respectively acquiring state snapshots of the target business object before and after the test is executed, and identifying change information; the template factory component is used for packaging the identified change information, the context metadata and the timestamp according to a predefined structured data template to generate a standardized log record; and the log persistence module is used for writing log records into a lock-free annular buffer region realized based on atomic operation, and the log records are triggered by a batch coordinator of an independent thread to be asynchronously written into a main storage system in batches.

This invention belongs to the technical field of embedded artificial intelligence and real-time system scheduling, and more specifically, relates to an adaptive load resource scheduling method and apparatus for embedded GPUs. The method involves offline acquisition and modeling of the platform's thermal throttling behavior, constructing DNN variants with different computational loads and accuracies, and profiling them under multiple frequency and TPC configurations to obtain a latency-power mapping table. In the online phase, based on task deadline margins and current temperature / frequency states, the method looks up the variant with the highest accuracy and meeting the deadline under the current thermal conditions and selects the corresponding TPC configuration from the profiling table. If necessary, phased online pruning and low-overhead switching are implemented, and the method collaborates with system-level DVFS / task mapping to optimize energy efficiency. This method can still guarantee the real-time performance of inference tasks under passive frequency reduction conditions and significantly reduce performance fluctuations caused by thermal throttling.

The invention provides a training method of a write memory allocation model and a write memory allocation method and system.The training method is achieved based on reinforcement learning, and in Nth training, the current state and the current action are obtained in response to the fact that all obtained query requests meet preset requirements, the current state represents the write memory size corresponding to each log structure merging tree at present, and the current action represents the write memory adjustment allocation information corresponding to each log structure merging tree at present, and determining a current reward corresponding to the execution of the current action, the current reward represents performance change information before and after write memory adjustment corresponding to each log structure merging tree based on the write memory adjustment allocation information, a current sample including the current state, the current action, the current reward and the determined next state is constructed, and the current sample is used for updating to obtain a write memory allocation model. Dynamic write memory allocation is realized, the overhead is reduced, and the memory utilization rate and the overall throughput are improved.

A data compression method and a related device, used for reducing I / O overhead. The data compression method comprises: acquiring attribute information of a logic block, wherein the logic block comprises a plurality of data pages, and the attribute information indicates data sizes of data contained in the plurality of data pages across a plurality of time periods; if the attribute information indicates that the total data size of the data contained in the plurality of data pages during a target time period is greater than or equal to a first threshold, compressing the data contained in the logic block, and storing the result obtained by compression, wherein the target time period includes at least time period among the plurality of time periods, and the time interval between the target time period and the current moment is greater than or equal to a time threshold; and if the attribute information indicates that the total data size of the data contained in the plurality of data pages during the target time period is less than the first threshold, determining not to compress the data contained in the logic block.

One or more systems, devices, computer program products and / or computer-implemented methods of use provided herein relate to low-overhead fault-tolerant quantum computation by gauging logical operators. For example, a system can comprise a memory that can store computer executable components and a processor that can execute the computer executable components stored in the memory. The computer executable components can comprise a graph selection component that can select an auxiliary graph. The computer executable components can further comprise a measurement component that can measure a logical operator by executing, on a quantum system, a deformed quantum stabilizer code based on the auxiliary graph.

The invention relates to a dynamic self-adaptive communication, sensing and calculation integrated method for an air-space-ground integrated network. The method comprises the following steps: S1, constructing an air-space-ground integrated network model fusing a low earth orbit satellite, an unmanned aerial vehicle and ground users / edge nodes; s2, establishing a cross-layer communication-perception-calculation integrated joint optimization model, and respectively forming two modes of binary unloading and partial unloading according to whether a task can be segmented or not; s3, for a binary unloading mode, realizing distributed solution and generating an unloading decision and a beam / power / bandwidth / computing resource scheme by using a dynamic adaptive prediction alternating direction multiplier (DAP-ADMM); and S4, aiming at a partial unloading mode, adopting a weighted minimum mean square error alternative optimization method, introducing a receiving equalizer, error weight and other auxiliary variables, executing block coordinate descent iteration, and outputting an unloading proportion, power distribution and a beam forming result. According to the DA-ISCC architecture and the optimization algorithm thereof provided by the invention, cross-domain calculation unloading with low time delay, high throughput and low overhead can be realized in a high-dynamic space-air-ground integrated network environment, and the DA-ISCC architecture and the optimization algorithm thereof can be widely applied to emergency communication, low-altitude logistics, ocean monitoring and other scenes.

The invention relates to a low-overhead processor cache micro-architecture defense method and device and computer device.The low-overhead processor cache micro-architecture defense method comprises the steps that when a missing state keeping register module takes out a loading instruction waiting for data from a replay queue, a target branch mask of the loading instruction is obtained; the replay queue is used for storing an instruction which is stagnated due to miss of the cache; judging whether the loading instruction is in a speculative execution state or not according to the target branch mask; and when the loading instruction is in the speculative execution state, stopping a cache write-in operation corresponding to the loading instruction. Through the method and the device, the problem of sensitive information leakage caused by incapability of defending against the cache side channel attack is solved, defending against the cache side channel attack is realized, and sensitive information leakage is prevented.

This application provides a distributed wireless resource scheduling method and electronic device, relating to the field of wireless communication network technology. In this method, the coordinator and computing nodes only need one round of information exchange, avoiding the huge signaling overhead and accumulated latency caused by multiple rounds of iterative negotiation. Time-consuming optimization calculations are offloaded to multiple computing units for parallel execution, achieving a linear reduction in overall computation time. Furthermore, it leverages the approximate achievable rate to provide theoretical feasibility for distributed solutions, while global coordination by edge devices ensures the performance of critical users, allowing the performance of the distributed solution to approach that of centralized algorithms, which serve as the performance ceiling. Because the coordination overhead is constant and minimal, and the computational load is effectively distributed, the system performance is far less affected by network size growth than centralized solutions. This makes it highly suitable for deployment in future network scenarios such as ultra-dense networking and large-scale carrier aggregation, enabling high-performance, low-overhead, and scalable distributed resource allocation under an O-RAN architecture.

The invention relates to a low-overhead moving target defense method and device for false data injection attacks, and the method comprises the steps: constructing a topological structure of a power grid bus and branches based on actual intelligent power grid data, and associating the branches with an initial admittance value; establishing an initial measurement matrix based on the initial admittance value and the topological structure of the power grid bus and the branches, and constructing a moving target defense strategy based on the initial measurement matrix; based on an invalid branch identification criterion and a topological structure of a power grid bus and a branch, determining an invalid branch in the power grid; based on invalid branches and a greedy selection mechanism, traversing the bus to screen valid branches, and obtaining a modified branch set; and changing admittance values of branches in the branch set based on a moving target defense strategy, changing a measurement matrix, and realizing low-overhead moving target defense. Compared with the prior art, on the premise that the high detection probability is maintained, the number of branches needing to modify admittance and the calculation time are remarkably reduced, and therefore the system defense cost is reduced.