Stack cache memory applied for context switch and buffer storage method

A cache and cache technology, applied in the field of stack cache and buffer storage, can solve problems such as unsatisfactory effects, achieve the effects of simple control, low hardware overhead, and avoidance of complexity

Active Publication Date: 2007-05-16
LOONGSON TECH CORP
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Problems solved by technology

Therefore, a processor with a stack cache has good performance in a single-process application, but the effect is no

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  • Stack cache memory applied for context switch and buffer storage method
  • Stack cache memory applied for context switch and buffer storage method

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[0037] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments:

[0038] In FIG. 2, the number 10 represents a specific embodiment of a stack cache suitable for context switching according to the present invention. In this embodiment, the stack cache suitable for context switching consists of two stack cache blocks, one OR circuit 11 and one selector 12. The input of this embodiment is the address 13 of the access stack cache and the process address space identifier 14 of the access instruction, and the output is the hit or miss signal and the hit data. The data in each stack cache block is continuous, similar to a traditional stack cache.

[0039] The two stack cache blocks have the same structure, and are called first and second stack cache blocks for ease of expression. The first stack cache block includes three parts: a flag part 15, a data part 16, and a control unit 17. The flag portion 15 of the ...

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Abstract

This invention discloses one shed high buffer memory and its buffer memory method suitable for upper and down text switch, which comprises at least two shed high speed buffer blocks; one or gate circuit, one selector, wherein, the shed buffer memory block is composed of label part, data part and control part; the said shed high speed buffer block is composed of at least three comparing circuits and one and gate circuit. The method comprises the following steps: a, initiating shed; b, aligning shed space; c, recycling shed space; comparing label to determine whether to shot of shed high buffer.

Description

technical field [0001] The invention relates to the technical field of microprocessor architecture, in particular to a stack cache memory and a buffer storage method suitable for context switching. Background technique [0002] With the rapid development of microprocessor design and production technology, the gap between memory access speed and processor operation speed is becoming more and more significant. Moreover, the gap between the access speed of the memory and the operation speed of the processor increases at a rate of 50% every year, making the memory access speed more and more a bottleneck for improving the performance of the processor. Utilizing the principle of locality, using one or more levels of cache memory (Cache, referred to as "cache") is one of the effective means to improve the performance of the storage system. A cache is a small, fast special memory that holds instructions and data recently used by the processor. When the processor is running, if the...

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Application Information

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IPC IPC(8): G06F12/08G06F12/0877G06F12/0895
Inventor 郇丹丹胡伟武李祖松
Owner LOONGSON TECH CORP
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