17 results about "Error correcting" patented technology

The invention relates to a robust watermarking method of a diffusion model based on an error correction code, which belongs to the technical field of large model watermarking, and comprises the following steps of: encoding a watermark message by using a Reed-Solomon error correction code to generate a code word containing redundancy check information; carrying out randomization processing on the code word to generate a pseudo-random bit stream; embedding the pseudo-random bit stream into a variable of an initial Gaussian potential space of a diffusion model by adopting a distribution preserving sampling technology; and finally, generating an image with a watermark through a denoising process of the diffusion model. When the watermark is extracted, reverse diffusion processing is carried out on an image which is possibly damaged to recover an approximate value of a potential space variable, a code word which is possibly damaged is extracted from the approximate value, and original watermark information is recovered by utilizing the error correction capability of a Reed-Solomon decoder. On the premise of keeping the generation performance, the robustness of the watermark to compression, noise, cutting and other potential tampering attacks is enhanced.

Disclosed herein are systems and methods for improving the auto-generation of pipelined search query statements by a large language model (LLM) through a post processing. In some examples, such a method includes operations of receiving, by a post processing engine, a response to an auto-generated prompt from the LLM that includes programming code generated by the LLM, performing a post processing of a response from the LLM that includes the programming code generated by the LLM including performing an error correction process when a term of the programming code generated by the LLM is inconsistent with terms of a schema of the user, and generating a graphical user interface (GUI) that displays the response to the auto-generated prompt when the terms of the programming code generated by the LLM including any replacement terms are consistent with the terms of the schema.

A computer is operable to store a set of encoded data slices of a data segment, where each encoded data slice includes a corresponding checksum of a plurality of checksums. Based on ones of the plurality of checksums corresponding to the set of encoded data slices, it is determined when the set of encoded data slices includes at least one corrupted encoded data slice. At least a threshold number of encoded data slices of the set of encoded data slices are retrieved, and a reconstructed data segment is generated using the at least the number of encoded data slices of the set of encoded data slices. At least one at least one reconstructed encoded data slice is formed utilizing the error correcting information dispersal algorithm on the reconstructed data segment, and the at least one corrupted encoded data slice is replaced with the at least one reconstructed encoded data slice.

A method, computer program product, and computing system for generating first encoded data by performing a first encoding of data included within each of a plurality of memory dies of a memory module using an exclusive-or (XOR) encoding process. Second encoded data is generated by performing a second encoding of the data included within each of the plurality of memory dies of the memory module and the first encoded data using a cyclic code encoding process. Error correction is performed on the data included within each of the plurality of memory dies of the memory module using the first encoded data, the second encoded data, an XOR decoding process, and a cyclic code error correction process.

A system includes a memory controller, multiple memories coupled to the memory controller, and multiple controlling components coupled to the memory controller. The memory controller calculates an error correction code (ECC) syndrome of a first type for a segment of data; stores the segment of data and the ECC syndrome of the first type in a first memory of the multiple memories; receives a request from a controlling component of the multiple controlling components directed to the segment of data, the controlling component implementing an ECC syndrome of a second type; transforms the ECC syndrome of the first type for the segment of data to the ECC syndrome of the second type; detects a number of errors, if any, present in the segment of data; and takes further action depending on how many errors are detected.

This application is directed to protecting a data item by storing data bits with integrity bits. The data bits are assigned into a second number of data sets. Data bits of each data set are combined to determine a third number of respective coding bits based on a respective coding pattern. The integrity bits include a set of single-bit error correcting (SEC) code bits and a set of parity bits. Each SEC code bit is a combination of a respective bit of the third number of respective coding bits of each of the second number of data sets, and each parity bit is a combination of a respective subset of SEC code bits and data bits in a respective one of the second number of data sets. These integrity bits are stored with the first number of data bits in a memory for protecting the data item.

A method and device for decoding error correcting code (ECC) are provided. The method includes obtaining a received word generated based on a transmitted code word, obtaining a reliability vector of the received word and a syndrome vector of the received word, updating at least one of the reliability vector of the received word and the syndrome vector of the received word at least once based on a plurality of cross-attentions based on the reliability vector and the syndrome vector, and outputting an estimate of the transmitted code word based on a result of the update.

An example system includes a memory and a controller. In operation, the controller calculates a first type of error correcting code (ECC) protection for a portion of data; stores the portion of data and the first type of ECC protection associated with the portion of data in the memory; receives a request, directed to the portion of data, from a requestor that implements a second type of ECC protection; transforms the protection for the portion of data from the first type of ECC protection to the second type of ECC protection; and sends to the requestor a response based on the transformed protection.

A method and device for decoding error correcting code (ECC) are provided. The method includes obtaining a received word generated based on a transmitted code word, obtaining a reliability vector of the received word and a syndrome vector of the received word, updating at least one of the reliability vector of the received word and the syndrome vector of the received word at least once based on a plurality of cross-attentions based on the reliability vector and the syndrome vector, and outputting an estimate of the transmitted code word based on a result of the update.

A quantum system for hosting logical qubits protected by an error correcting code comprises: * a command circuit (4) for selectively applying radiation, * a superconducting quantum circuit (6) comprising - a plurality of data resonators (8), each data resonator (8) being coupled to said command circuit (4) for stabilizing a respective data cat qubit, - a plurality of ancilla resonators (10), each ancilla resonator being coupled to said command circuit (4) for stabilizing a respective ancilla qubit, - the data resonators (8) and the ancilla resonators (10) are arranged on said superconducting quantum circuit into lines (12) comprising alternating data resonators and ancilla resonators, - the lines not crossing one another and defining a first end line and a second end line, - each data resonator and each ancilla resonator (10) of a line being connected to its immediate neighbors within its line, and - for all but the second end line, the ancilla resonators are connected to a data resonator of an adjacent line in the direction going from the first end line to the second end line, such that all ancilla resonators are connected to at least two and at most to three data resonators, the command circuit (4) being further arranged to operate a quantum gate between two data cat qubits connected by an ancilla qubit only using operations involving two or three resonators chosen among the group comprising said the data resonators hosting the data qubits and the ancilla resonator, with the data resonators being always involved.

Introduced here is a technique to detect and / or correct errors in computation. The ability to correct errors in computation can increase the speed of the processor, reduce the power consumption of the processor, and reduce the distance between the transistors within the processor because the errors thus generated can be detected and corrected. In one embodiment, an error correcting module, running either in software or in hardware, can detect an error in matrix multiplication, by calculating an expected sum of all elements in the resulting matrix, and an actual sum of all elements in the resulting matrix. When there is a difference between the expected sum and the resulting sum, the error correcting module detects an error. In another embodiment, in addition to detecting the error, the error correcting module can determine the location and the magnitude of the error, thus correcting the erroneous computation.

Systems and methods are provided for concatenated error-correcting coding. An apparatus may include a Low-Density Parity-Check (LDPC) decoder configured to perform an iterative LDPC decoding process on bits of an LDPC codeword, a Bose-Chaudhuri-Hocquenghem (BCH) decoder coupled to the LDPC decoder and a BCH scheduler coupled to the LDPC decoder and the BCH decoder. The LDPC codeword may be generated by LDPC encoding a Bose-Chaudhuri-Hocquenghem (BCH) codeword and the BCH codeword may be generated by BCH encoding a data unit. The BCH scheduler may be configured to determine whether a triggering condition for the BCH decoder is met after each iteration of the iterative LDPC decoding process and activate the BCH decoder to operate on an intermediate decoding result of the LDPC decoder if the triggering condition for the BCH decoder is met.

Systems, methods, and apparatus related to a multi-level error correction architecture used for copying data in memory devices. In one approach, user data is stored in the first partition of a non-volatile memory. First error correction code data is generated for the user data and stored with the user data in the first partition. Second error correction code data is generated for the user data and stored outside the first partition. The second error correction code data provides an increased error correcting capability that is compatible with the error correction algorithm used with the first error correction code data. A copyback operation is used to copy the user data and the first error correction code, but not the second error correction code, to a second partition of the non-volatile memory. The second error correction code can be selectively used if there is a need to recover portions of the user data stored in the first partition.

A method, computer program product, and computing system for generating first encoded data by performing a first encoding of data included within each of a plurality of memory dies of a memory module using an exclusive-or (XOR) encoding process. Second encoded data is generated by performing a second encoding of the data included within each of the plurality of memory dies of the memory module and the first encoded data using a cyclic code encoding process. Error correction is performed on the data included within each of the plurality of memory dies of the memory module using the first encoded data, the second encoded data, an XOR decoding process, and a cyclic code error correction process.

To easily achieve quantum error correction in a squeezed cat code.SOLUTION: An error correction device according to an aspect of the present disclosure achieves quantum error correction using a squeezed cat code, and the error correction device has a control unit that, by using a quantum processor having mounted thereon a quantum circuit including a quantum gate for achieving a dissipation operator built from a stabilizer operator in a momentum direction in a squeezed cat state in the squeezed cat code, causes the quantum circuit to repeatedly execute quantum information processing on a quantum state represented by error correction code quantum bits and auxiliary quantum bits, to correct a quantum error in the error correction code quantum bits.SELECTED DRAWING: Figure 6

A first communication node (12-1) transmits to a second communication node (12-2), or receives from the second communication node (12-2), a code definition (20D) for an error correcting code (20). In some embodiments, the code definition (20D) explicitly indicates one or more values (20V) of a mathematical or graphical representation (20R) of the error correcting code (20). In other embodiments, the code definition (20D) indicates an algorithm (20A) for how to calculate a mathematical or graphical representation (20R) of the error correcting code (20), and indicates one or more values (20N) of one or more inputs to that algorithm (20A). The first communication node (12-1) also, after transmitting or receiving the code definition (20D), transmits and / or receives data (18) to and / or from the second communication node (12-2) using the error correcting code (20).

A system and a method are disclosed for encoding data including receiving at least one block of data; encoding the at least one block of data by generating a two-dimensional (2D) table having a plurality of rows and a plurality of columns, wherein one or more bits included in the at least one block is formed as a first row included in the plurality of rows, an odd parity bit is appended to each of the plurality of rows, and an error correction code is formed for each of the plurality of columns; and transmitting the encoded at least one block of data row by row over a serial link.