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Apparatus, system, and method for providing error correction

Inactive Publication Date: 2011-12-15
SANDISK TECH LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0026]Furthermore, the described features, advantages, and characteristics of the invention may be combined in any suitable manner in one or more embodiments. One skilled in the relevant art will recognize that the invention may be practiced without one or more of the specific features or advantages of a particular embodiment. In other instances, addi

Problems solved by technology

Solid-state storage devices use solid-state media that inherently fails to store and retain data for a sufficient period of time without introducing bit errors.
As the bit density of the solid-state memory media increases, the number of bit errors per amount of data stored and read can increase.
Due to increasing bit densities, changes in manufacturing and fabrication techniques, and other technical advances, the volume and type of data errors can change between data storage device product cycles.
These changes can make otherwise compatible data storage devices incompatible with existing drivers or other software.
Similarly, over the lifetime of a single data storage device, the volume and type of data errors can also change with age or with use conditions.

Method used

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  • Apparatus, system, and method for providing error correction

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Experimental program
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embodiment 300

[0099]FIG. 3 is a schematic block diagram illustrating one embodiment 300 of a solid-state storage controller 104 with a write data pipeline 106 and a read data pipeline 108 in a solid-state storage device 102 in accordance with the present invention. The embodiment 300 includes a data bus 204, a local bus 206, and buffer control 208, which are substantially similar to those described in relation to the solid-state storage device controller 202 of FIG. 2. The write data pipeline 106 includes a packetizer 302 and a hardware ECC encoder 304. In other embodiments, the write data pipeline 106 includes an input buffer 306, a write synchronization buffer 308, a write program module 310, a compression module 312, an encryption module 314, a garbage collector bypass 316 (with a portion within the read data pipeline 108), a media encryption module 318, and a write buffer 320. The read data pipeline 108 includes a read synchronization buffer 328, a hardware ECC decoder 322, a depacketizer 324...

embodiment 500

[0183]In the depicted embodiment 500, the storage client 504 is in communication with the ECC module 116 through the block I / O emulation layer 506 and / or the direct interface 508. In one embodiment, at least a portion of the block I / O emulation layer 506, the direct interface 508, and / or the ECC module 116 are part of a software driver of the host device 114, such as a device driver for the data storage device 102 or the like. In a further embodiment, at least a portion of the block I / O emulation layer 506, the direct interface 508, and / or the ECC module 116 are part of the storage controller 104 or other hardware of the data storage device 102.

[0184]In one embodiment, the storage client 504 communicates with the data storage device 102 through the block I / O emulation layer 506 and / or the direct interface layer 508. Certain conventional block storage devices divide the storage media into volumes or partitions. Each volume or partition may include a plurality of sectors. One or more ...

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PUM

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Abstract

An apparatus, system, and method are disclosed for providing error correction for a data storage device. A determination module determines a set of error-correcting code (“ECC”) characteristics for a data storage device. The set of ECC characteristics includes at least one attribute selected from a plurality of supported attributes. A decoder configuration module configures an ECC decoder to operate in compliance with the set of ECC characteristics. An ECC module validates requested data read from the data storage device using the ECC decoder.

Description

CROSS-REFERENCES TO RELATED APPLICATIONS[0001]This application claims priority to U.S. Provisional Patent Application No. 61 / 355,105 entitled “APPARATUS, SYSTEM, AND METHOD FOR PROVIDING ERROR CORRECTION” and filed on Jun. 15, 2010 for Jeremy Fillingim, which is incorporated herein by reference.FIELD OF THE INVENTION[0002]This invention relates to error-correcting codes and more particularly relates to error-correcting codes and data storage devices.BACKGROUNDDescription of the Related Art[0003]Solid-state storage devices use solid-state media that inherently fails to store and retain data for a sufficient period of time without introducing bit errors. As the bit density of the solid-state memory media increases, the number of bit errors per amount of data stored and read can increase. The bit density for other types of data storage media, such as magnetic and optical storage media, is also increasing.[0004]Due to increasing bit densities, changes in manufacturing and fabrication te...

Claims

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Application Information

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IPC IPC(8): G06F11/08
CPCG06F11/1048
Inventor FILLINGIM, JEREMY
Owner SANDISK TECH LLC
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