438results about "Coding details" patented technology

Methods and apparatus for leveraging transfer learning of one Wireless Transmit / Receive Unit (WTRU) to benefit another WTRU are provided. One method may include the WTRU receiving AI / ML model configuration information indicating one or more AI / ML models available from the network node, a profile associated with the AI / ML models, and a training convergence threshold. Based at least on the profile(s), the WTRU determining that the one or more AI / ML models are not suitable for use by the WTRU, and sending first information indicating that the one or more AI / ML models are not suitable for the WTRU and / or that the WTRU will be training a local AI / ML model. The method may then include training the local AI / ML model according to the convergence threshold, receiving a request to transfer AI / ML model parameters, and sending an indication of the AI / ML model parameters associated with the trained local AI / ML model to the network node.

Techniques are disclosed for reducing overhead during hybrid automatic repeat request (HARQ) operations performed by a user equipment (UE) during wireless communication. The UE receives a message over the wireless network and obtains a parity check matrix (PCM) associated with a received message. Rows of the PCM are assigned to respective groups of a plurality of groups, where the respective groups have corresponding one or more parity checks as determined by the PCM. The UE generates a feedback message including a plurality of bits, wherein an individual bit of the plurality of bits indicates whether a corresponding respective group of the plurality of groups include one or more unsatisfied parity checks. The UE then transmits the feedback message to a base station of the wireless network.

The invention provides a decoder, a decoding method, a memory system, an operation method of the memory system and a controller. The decoder comprises a first processing circuit, a second processing circuit, a processor and a bit flipping circuit, the first processing circuit is configured to obtain a check formula and a check formula weight based on a to-be-decoded code word and a check matrix in a current iteration; the second processing circuit is configured to obtain the energy of the to-be-decoded codeword in the current iteration based on the check matrix, the check formula and the overturning state of the to-be-decoded codeword in the current iteration; the processor is configured to: determine a flipping threshold in a current iteration based on a change state of the checkout weight; and the bit flipping circuit is configured to output the to-be-decoded code word in the next round of iteration based on a comparison result of the energy of the to-be-decoded code word in the current iteration and the flipping threshold value in the current iteration determined by the processor.

A method for decoding a memory system, the method may include establishing a plurality of check nodes and a plurality of variable nodes corresponding to the plurality of check nodes of a codeword; setting a preliminary operation speed based on a progress rate of a preliminary operation for generating predictive error information of each of the plurality of the variable nodes; performing the preliminary operation according to the preliminary operation speed; and performing a main decoding operation for error correction on at least a part of the plurality of the variable nodes based on the predictive error information.

The embodiment of the invention discloses a communication method and a communication device, relates to the technical field of communication, and is used for meeting the transmission requirement of a high throughput scene. The method comprises the following steps: determining a physical channel of a first scene, wherein the throughput of the first scene is greater than a preset threshold; and under the condition that the transmission layer number of the physical channel is greater than the preset layer number, transmitting data in a single code word form.

A memory may include: a memory core; an error correction code (ECC) engine configured to generate an error correction code to be stored in the memory core together with write data by using the write data during an encoding operation, and to correct an error of read data read from the memory core using the error correction code read from the memory core during a decoding operation; and an error determination circuit configured to determine that during the encoding operation, a 1-bit error exists when upper index portions of syndromes generated by the ECC engine have odd weights, and to determine that a correctable 2-bit error exists when the upper index portions of the syndromes are one of predetermined even weight patterns.

In the matrix computing method, block division is performed by row on input data of a to-be-multiplied first matrix at a granularity of a subblock whose scale is M×N, to obtain at least one first subblock; and block division is performed by column on input data of a to-be-multiplied second matrix at a granularity of a subblock whose scale is N×R, to obtain at least one second subblock. One or more target subblock combinations are determined, where each target subblock combination includes one first subblock and one second subblock, and at least one element in the first subblock and at least one element in the second subblock in each target subblock combination are to-be-multiplied elements. Each of the one or more target subblock combinations is used as input data of a matrix computing apparatus, to obtain a product result of the first matrix and the second matrix.

This disclosure provides methods, components, devices, and systems for ultra-high reliability (UHR) signaling design. Some aspects more specifically relate to an access point (AP) transmitting a frame including a user info field to a wireless station (STA), where the user info field supports UHR parameters. The user info field may include a subfield indicating a coding scheme for communications, where the subfield includes at least two bits to support at least three coding scheme options. Additionally, or alternatively, the AP may transmit a trigger frame indicating for one or more STAs to communicate via distributed resource units (RUs). The AP may arrange the user info fields in the trigger frame to implicitly indicate respective global cyclic shift delay (CSD) indexes to the STAs. A STA receiving the trigger frame may determine a global CSD index corresponding to the STA according to the order of the user info fields.

A method of encoding data includes determining, by an encoder, a first data instance by corrupting the data with Gaussian noise. The method also includes determining, by the encoder, information representative of one or more conditional distributions. The method additionally includes determining, by the encoder, an index of a corrupted data instance of the sequence of progressively less corrupted data instances. The index corresponds with a conditional distribution of the one or more conditional distributions which causes the corrupted data instance to have a desired bit-rate. The method further includes transmitting, from the encoder to a decoder, the first data instance and the information representative of the one or more conditional distributions to enable the decoder to recover the corrupted data instance having the desired bit-rate and use the corrupted data instance to generate output data representative of the data.

The present invention relates to communication system and method for error-proportional energy-saving in encoding and decoding in Body Area Networks (BAN) using Human Body Communication (HBC). The method includes receiving message signal from data sources. Further, the method includes encoding data symbols using encoding algorithms. Furthermore, the method includes calculating syndrome values for the encoded data symbols. Furthermore, the method includes generating an error signal when the calculated syndrome values corresponds to a non-zero value. Furthermore, the method includes receiving the error signal from the syndrome module. Furthermore, the method includes activating an Error Location Polynomial (ELP) module when the syndrome values corresponds to a non-zero value. Subsequently, the method includes generating an error indication signal. Consequently, the method includes activating an Error Magnitude Polynomial (EMP) solver module and a chien search module. Finally, the method includes decoding the encoded data symbols.

A memory device includes a memory cell array that includes a plurality of memory cells disposed in a plurality of rows, an eraser detector that stores vulnerable row data including a location of an estimation error corresponding to a vulnerable row among the plurality of rows, an error correction code (ECC) engine that decodes first data read from the memory cell array based on the vulnerable row data to generate information on a first error included in the first data in response to a read command and corrects the first error to generate second data, and a flag generator that generates a decoding flag indicating a decoding state of the ECC engine based on the vulnerable row data, the information on the first error, and the second data.

The present invention is related to a quantum computing arrangement comprising a plurality of qubits, to a quantum computing system comprising a plurality of said quantum computing arrangements, to a method of implementing, on a quantum computing system, a quantum error correction code, said quantum computing system comprising the quantum computing arrangement, and to the use of a quantum computing system or a quantum computing arrangement for implementing a quantum error correction code.

In some implementations, a memory system may obtain, from a host system, a command to read data. The memory system may retrieve a codeword associated with the data. The memory system may generate, based on the codeword, a syndrome. The memory system may generate one or more decoding values based on the syndrome and using one or more combinational circuits. The memory system may correct one or more errors in the codeword using the one or more decoding values. The memory system may provide the data to the host system.

An example nonvolatile memory device includes page buffer circuits, compression engines, local clock controllers, a data input / output (I / O) circuit, and a control circuit. Each compression engines is connected with a respective page buffer circuit through respective local data lines. The control circuit controls each compression engine to perform an encoding operation based on receiving soft decision data from target cache latches corresponding to an output address, based on compressing the received soft decision data, and based on overwriting the compressed soft decision data in the target cache latches based on an input address, The control circuit controls one or more page buffer circuits among the plurality of page buffer circuits to perform an output operation based on outputting the compressed soft decision data through the data I / O circuit, the output operation performed in parallel with the encoding operation or independently from the encoding operation.

According to disclosed embodiments, methods and systems of data transmission are provided. An aspect of the present disclosure is a method comprising receiving an audio stream, parsing the audio stream into packets, encoding each packet using Alphabet Linear Network Coding (ALNC), and transmitting the encoded packets.

An example nonvolatile memory device includes page buffer circuits, compression engines, local clock controllers, a data input / output (I / O) circuit, and a control circuit. Each compression engine is connected with a respective page buffer circuit through respective local data lines. The control circuit controls each compression engine to perform an encoding operation based on receiving soft decision data from target cache latches corresponding to an output address, based on compressing the received soft decision data, and based on overwriting the compressed soft decision data in the target cache latches based on an input address. The control circuit controls one or more page buffer circuits among the plurality of page buffer circuits to perform an output operation based on outputting the compressed soft decision data through the data I / O circuit, the output operation performed in parallel with the encoding operation or independently from the encoding operation.

A memory device and method for a partial checksum calculation using a sub-matrix with flexible media coverage inside of a memory device (i.e., NAND) of a memory system. The memory device includes: a plurality of memory cells; a control circuit configured to read a codeword sequence from the plurality of memory cells, and determine a sub-matrix including multiple non-zero circulants selected from particular matrix rows of a parity check matrix used in a controller of the memory system, the multiple non-zero circulants including non-zero row circulants for each matrix row; and a partial checksum calculator configured to perform a partial checksum calculation on a syndrome sequence based on the codeword sequence and the sub-matrix.

Various aspects of the present disclosure generally relate to wireless communication. Some aspects more specifically provide procedures and configurations used to perform, at a transmitter, probabilistic amplitude shaping (PAS) of quadrature amplitude modulation (QAM) communications using non-binary polar coding (NBPC). NBPC differs from binary polar coding (BPC) in that BPC uses a binary-input channel whereas NBPC uses a non-binary input channel. For example, while BPC uses a log likelihood ratio (LLR) with a single value corresponding to a given bit to be shaped, NBPC may use a probability mass function (PMF) to define or represent amplitude shaping target values. As another example, aspects use non-binary transformations, which reduce the number of passes to shape q bits from q passes (for BPC) to 1 pass (for NBPC).

The invention provides a decoder, a decoding method, a memory system and a controller. The decoder comprises a first processing circuit, a second processing circuit, a processor and a bit flipping circuit, wherein the first processing circuit is configured to obtain a check formula and a check formula weight based on a to-be-decoded code word and a check matrix in current iteration; the second processing circuit is configured to obtain the energy of the to-be-decoded codeword in the current iteration based on the check formula, the check matrix and the overturning state of the to-be-decoded codeword in the current iteration; the processor is configured to select a preset threshold sequence from a plurality of preset threshold sequences as an initial threshold sequence based on the checkout weight in the initial iteration; distributing one flipping threshold in the initial threshold sequence to a bit flipping circuit; and the bit flipping circuit is configured to output the to-be-decoded code word in the next iteration based on the comparison result of the energy of the to-be-decoded code word in the current iteration and the flipping threshold value allocated by the processor.

According to an aspect of an embodiment, an optical network unit (ONU) in a passive optical network (PON) may comprise a physical media dependent (PMD) receiver, a detector, and a processing device. The PMD receiver may be configured to receive a downstream signal from an optical line terminal (OLT). The detector may be configured to measure a link quality parameter in the downstream signal. The processing device may be configured to identify a link quality parameter target, wherein the link quality parameter target is a value that achieves a target error probability. The processing device may be configured to compute a link quality parameter margin between the measured link quality parameter and the link quality parameter target, and adjust a transmission parameter based on the link quality parameter margin.

Methods, systems, and devices for wireless communications are described. An encoding device (e.g., a network entity or user equipment (UE)) can communicate an indication of an encoding symbol identifier (ESI), a source block number (SBN), or both, to a decoding device in downlink control information (DCI). By way of example, the indication of the SBN and / or ESI can be transmitted using either an unused field or a repurposed field in the downlink control information (DCI) that schedules a transmission including the encoding symbols, or in a new DCI piggybacked on a downlink shared channel transmission including the encoding symbols. Additionally or alternatively, in a first option, the ESI can be explicitly indicated by the DCI. In another option, the network entity can indicate (e.g., via radio resource control messaging) a configuration for implicitly determining the ESI based on information conveyed in the DCI.

The embodiments of the present application relates to the technical field of wireless communications. Provided are an encoding method, a decoding method, and an apparatus, which are used for reducing the complexity of decoding. The encoding method comprises: a first communication device acquiring a first sequence, wherein the first sequence is a bit sequence to be encoded, and the first sequence comprises K information bits; and the first communication device encoding the first sequence. If K is less than (or equal to) K1, the first sequence is encoded on the basis of a basic sequence. Alternatively, if K is greater than (or equal to) K1, polar encoding is performed on the first sequence. K1 is a positive integer less than 11. On the basis of the solution, when the number K of information bits is larger (for example, greater than K1), if a basic sequence is used for performing encoding, the complexity of decoding is also larger due to the larger number of mask sequences, and if polarization encoding is used, the complexity of decoding can be reduced.

Various aspects of the present disclosure generally relate to wireless communications. In some aspects, a wireless communication device (WCD) may send an indication of supporting a plurality of parity mapping schemes for communication. The WCD may receive a communication having a first parity mapping scheme and a second parity mapping scheme, the first parity mapping scheme being different from the second parity mapping scheme. Numerous other aspects are described.

The present disclosure provides coding and decoding methods, a communication device, and a storage medium. The coding method, applied to a first transmission node, includes: determining a base matrix for low density parity check (LDPC) coding from a preset base matrix set; performing LDPC coding on original data according to the base matrix, so as to obtain coded data; transmitting the coded data to a second transmission node; wherein the base matrix includes two kinds of elements: an element indicating an all-zero square matrix, and an element indicating a cyclic shift of an identity matrix; the base matrix set includes at least two non-empty subsets of base matrices, and all base matrices in each subset of the at least two non-empty subsets of base matrices have a same coding rate.

A quantum computing device is provided, including a logical qubit encoding surface including a plurality of plaquettes. Each plaquette of the plurality of plaquettes may include a plurality of measurement-based qubits. The plurality of measurement-based qubits may include four data qubits and a first ancilla qubit. The first ancilla qubit may be electrically connected to the four data qubits and a second ancilla qubit included in the logical qubit encoding surface.

A modem chip receives a codeword including a transport block composed of a plurality of code blocks, and includes a hybrid automatic repeat request (HARQ) processing circuit configured to perform a HARQ-based processing operation with respect to the codeword, and an internal memory configured to store data generated by the HARQ processing circuit. The HARQ processing circuit includes a code block processing circuit configured to decode the plurality of code blocks in units of code blocks and perform a first cyclic redundancy check on each of the decoded plurality of code blocks, and a codeword processing circuit configured to perform a second cyclic redundancy check on a decoded transport block.

A matrix computing method and apparatus are provided. In the method, block division is performed by row on input data of a to-be-multiplied first matrix at a granularity of a subblock whose scale is M×N, to obtain at least one first subblock; and block division is performed by column on input data of a to-be-multiplied second matrix at a granularity of a subblock whose scale is N×R, to obtain at least one second subblock, where all M, N, and R are positive integers. One or more target subblock combinations are determined, where each target subblock combination includes one first subblock and one second subblock, and at least one element in the first subblock and at least one element in the second subblock in each target subblock combination are to-be-multiplied elements. Each of the one or more target subblock combinations is used as input data of a matrix computing apparatus, to obtain a product result of the first matrix and the second matrix that is output by the matrix computing apparatus.

The invention relates to the technical field of communication, and discloses a communication method and device, which can improve the flexibility and transmission performance of data transmission by performing UEP layered transmission on to-be-transmitted data, and support data UEP transmission in a non-MIMO scene. The method comprises the steps that layering processing is conducted on first data, N layers of data are obtained, and N is an integer larger than or equal to 2; receiving modulation and coding indication information from the second communication device, wherein the modulation and coding indication information is used for indicating MCS corresponding to each layer of data in the P-layer data, the P-layer data belongs to the N-layer data, the MCS corresponding to each layer of data in the P-layer data, and the modulation and coding indication information is determined according to the sequence of the information source contribution degree of the layer data in the P-layer data and a mapping strategy of the information source contribution degree sequence and the MCS; and according to the MCS corresponding to each layer of data in the P-layer data, coding modulation is carried out on the P-layer data.

One approach may include at least partially initializing the mesh of the SE engine based at least in part on predetermined state information about the communication channel associated with the incoming data stream; and processing the incoming data stream via the MLSE engine to further initialize the mesh and decode the incoming data stream.