523results about "Other decoding techniques" patented technology

The invention belongs to the technical field of communication, and particularly relates to a multiplication active code decoding method based on an SO-ORBGRAND decoder. The SO-ORBGRAND decoder outputs soft information by calculating a correct posterior probability of a conjecture code word sequence, and high-performance decoding is realized through soft information exchange and optimization processing between the row decoder and the column decoder. In the iteration process, a method for judging the validity of the code word through the check matrix is designed by utilizing the polarization characteristic of the multiplication active code, so that the iteration is supported to jump out in advance to reduce the complexity. The invention provides a multiplication active code decoding algorithm based on an SO-ORBGRAND decoder, and compared with various non-system multiplication active code decoding algorithms and the performance of traditional long-code polarization codes, the method has remarkable advantages in error correction performance; a method for judging the validity of the code word through the check matrix by utilizing the polarization characteristic design of the multiplication positive code is provided, the complexity is reduced while the judgment success rate is improved, and the implementation overhead is reduced.

This application provides a rate matching method and a communication apparatus. A transmit end punctures an LDPC codeword based on a priority order of check bits of a mother code of an LDPC code. The priority order of the check bits of the mother code indicates a priority order of puncturing the check bits in a rate matching process, and the priority order is related to confidences of the check bits. The confidences of the check bits indicate degrees to which the check bits are affected by noise in a channel transmission process. In addition, puncturing the check bits can ensure restorability of a system variable node, and a check bit with a higher confidence is more likely to be correctly restored, so that more valid information can be provided for another system variable node during decoding iteration.

Systems, apparatuses and methods may provide for memory controller technology including first logic to trigger, via an initial request, a hard-read and a soft-read, wherein the hard-read is to generate hard-bit information and the soft-read is to generate first soft-bit information and second soft-bit information, conduct a first error correction on the hard-bit information, and issue a subsequent request for at least the second soft-bit information if the first error correction is unsuccessful. Additionally, memory device technology may include a plurality of memory cells and second logic to conduct the hard-read and the soft-read from a memory cell in the plurality of memory cells in response to the initial request, send the hard-bit information to the controller, and withhold at least the second soft-bit information from the controller until the subsequent request is received.

Certain aspects of the present disclosure provide data compression and channel coding techniques for variable length payloads. A method performed at a wireless node may include obtaining a payload for transmission, compressing the payload using a variable length compression technique to obtain a compressed payload having compressed payload bits of a first length, adding padding bits to the compressed payload to obtain a padded compressed payload. The padded compressed payload comprises information bits including the compressed payload bits and the padding bits. The method further includes encoding the padded compressed payload and outputting the encoded padded compressed payload.

The invention provides a belief propagation LDPC decoding method and device based on deep learning, a medium and a program product. The method comprises the following steps: acquiring an LDPC code training sample set corresponding to a check matrix H; according to the check matrix H, determining a weight matrix and an activation function of each layer of a deep learning decoding model; based on the weight matrix and the activation function, using a belief propagation algorithm to establish a deep learning decoding model; training the deep learning decoding model by using the training sample set, and storing the trained deep learning decoding model as a decoder; and sending the LDPC code soft information which is corresponding to the check matrix H and needs to be decoded into the decoder to complete LDPC decoding. According to the method, iterative operation is completed by using deep learning in the error correction decoding process, the number of decoding iterations is reduced, and the sequence sent by the sending end is restored from the sequence containing noise and interference, so that the problem of decoding error codes caused by noise and other interference factors is solved.

Techniques for decoding a low-density parity check (LDPC) can include determining an asymmetric ratio of bit errors read as logic zero to bit errors read as logic one. The energy of each variable node of the LDPC codeword can be computed. For each variable node having an energy greater than a threshold energy, the variable node can be added to a collection of candidate bits for bit flipping. The asymmetric ratio can then be applied to flip bits in the collection of candidate bits to decode the LDPC codeword.

The invention discloses a soft decoding method and device, a medium and a product, and relates to the technical field of error correction coding, and the method is applied to a low-density parity check code, and comprises the steps: obtaining a target low-density parity check code with an information node and a check node containing an erasure bit; and allocating a preset non-zero log-likelihood ratio to the erasure bit on the check node, and executing first soft decoding. And if the first soft decoding fails, judging whether to carry out second soft decoding or not based on the weight of the syndrome generated by the first soft decoding and the number of the erasure bits on the information node. If it is judged that the second soft decoding needs to be carried out, a preset non-zero log likelihood ratio is distributed to the erasure bit located on the information node, and the second soft decoding is carried out. According to the method and the device, the erasing bits on different nodes are conditionally processed in stages, so that the success rate and the efficiency of decoding are effectively improved.

The invention relates to the technical field of communication and computer instruction execution and processing, in particular to a polar code encoding and decoding algorithm-oriented special instruction set processor and an implementation method, and a vector processor has efficient parallel computing capability. A coding and decoding algorithm of a polar code relates to parallel computing of a large number of log-likelihood ratios, a vector processor of a special instruction set can process a plurality of LLR values at the same time through a parallel processing unit, and the throughput rate is remarkably improved; special instructions such as polarization shuffling and vector G operation instructions are designed for polarization code encoding and decoding and are used for accelerating algorithm operation. The method can achieve the balance among the performance, the energy efficiency and the flexibility, can adapt to the continuous iteration upgrading of the algorithm due to the programmable and reusable characteristics, and has a good application prospect.

A method according to one embodiment of the present specification comprises the steps of: generating a signal on the basis of a cyclic redundancy check (CRC); and transmitting the signal. The plurality of chips related to the signal include i) chips related to the CRC and ii) one or more chips related to padding.

Methods, systems, and devices for wireless communications are described. In some cases, a first wireless device may communicate, with a second wireless device, a control signal indicating a systematic polar code configuration, the systematic polar code configuration indicating for the first wireless device to perform systematic polar encoding on a first set of bits associated with a non-uniform bit distribution. As such, the first wireless device may apply a systematic polar code to the first set of bits to generate a systematic polar codeword based on the systematic polar code configuration. In such cases, the systematic polar codeword may include a set of parity bits and a set of systematic bits. Thus, the first wireless device may transmit at least the set of parity bits of the systematic polar code.

Provided is a memory system comprising a plurality of memory components. The ECC decoding is configured to construct first and second codewords from a single set of data within the plurality of memory components and perform error correction code (ECC) decoding on the first and second codewords received read from the plurality of memory components wherein the ECC decoding is configured to (i) detect random errors in the first received codeword and (ii) use data associated with the detected random errors to correct erasures in the second received codeword.

At least one example embodiment provides a radio access network element comprising at least one processor and at least one memory. The at least one memory stores instructions that, when executed by the at least one processor, cause the radio access network element to: extract sign information from a plurality of log-likelihood ratio (LLR) sample values included in LLR data in a resource block group (RBG); convert negative LLR sample values, from among the plurality of LLR sample values, into positive integer values to obtain converted LLR data; generate compressed LLR data based on the converted LLR data; and output the compressed LLR data.

A modem chip may include a turbo decoding circuit configured to receive a plurality of channel log likelihood ratios respectively corresponding to a plurality of bits included in a symbol, generate a plurality of first posteriori log likelihood ratios respectively corresponding to the plurality of bits in an Nth iterative loop based on the plurality of channel log likelihood ratios, wherein N is greater than or equals to 1, and generate a first input / output counting value by counting a number of first posteriori log likelihood ratios, among the plurality of first posteriori log likelihood ratios, that differ in sign from the corresponding channel log-likelihood ratios, and a decoding control circuit configured to stop decoding for the plurality of bits in the turbo decoding circuit based on the first input / output counting value being greater than or equal to a first threshold.

Methods and devices are provided in which a channel encoded with a polarization-adjusted convolutional (PAC) code is received. A decoded codeword is generated based at least in part on simplified successive cancellation list (SSCL) decoding performed on the channel via a decoding tree. The decoding tree includes a node that generates candidate codeword output based on predefined processing using convolutional code (CC) state input and channel vector input. A sub-tree of the node remains unprocessed.

A method for generating soft information for a digital signal decoder. The method includes receiving a first plurality of signals, each corresponding to a time index, each time index being associated with two states including state 1 and state 0. The method also includes processing the first plurality of signals to calculate path metric values of state 0 and 1 for generating each of a second plurality of most-likely symbols by hard decisions and intermediate information for a most-likely path and a second-likely path at each time index. The method includes computing a difference between the most-likely path and a second-likely path for a given one of the two states at each time index. The method also includes determining a soft information corresponding to either one of the two states at the time index per one of the second plurality of most-likely symbols.

Methods, systems, and devices for a memory device with an error correction memory device with fast data access are described. For example, during a read operation, a memory device may be configured to output the data indicated by the read operation concurrent with performing an error correction operation. If the memory device detects an error, the memory device may indicate the error to a host device and, in some cases, output the corrected data to the host device. During a write operation, the memory device may store error detection or correction information associated with data to be stored at the memory device. The memory device may, in some cases, store error detection or correction information generated by the host device.

This application discloses a decoding method applicable to multiple scenarios, including metropolitan area networks, backbone networks, and data center interconnections, to meet the needs of optical transmission. The method comprises: obtaining a syndrome corresponding to each of a plurality of codewords; grouping the obtained syndromes and prioritizing each syndrome group; and selecting a syndrome for decoding based on the priority ranking results of each syndrome group. Because this decoding method does not perform the same decoding process on every codeword, it avoids the problem of traditional static decoding schemes requiring the same number of decoding operations regardless of the correctness of the codeword itself. This method enables on-demand decoding, reducing the demand for decoding resources and power consumption.

We disclose a soft-detection variant of Guessing Random Additive Noise Decoding (GRAND) called discretized soft-information for GRAND (DSGRAND) that can efficiently decode any moderate redundancy block-code in an algorithm that is suitable for highly parallelized implementation in hardware. DSGRAND provides near maximum likelihood decoding performance when provided with five or more bits of soft information per received bit, by discretizing the soft information into noise effect sequences and allocating those sequences into bins according to weight. The use of these bins provides a separate, simplified manner of sequencing noise guessing.

A method may include generating a state signal indicating a state of error location polynomial (ELP) determination by an ELP determination circuit; and control the ELP determination by the ELP determination circuit in response, at least in part, to a value of the status signal.

Communication devices, systems and methods for performing multi-layer packet coding (MLPC) in a wireless system are provided. The MLPC includes segmenting a data stream into a plurality of data segments, encoding each of the plurality of data segments into a plurality of forward error correction (FEC) codewords, performing a first exclusive OR (XOR) operation on the plurality of FEC codewords to generate a plurality of first layer parity codewords, performing a second XOR operation on the plurality of first layer parity codewords to generate at least one second layer parity codeword, and transmitting at least one of: the plurality of FEC codewords, the plurality of first layer parity codewords, or the at least one second layer parity codeword.

A power-imbalanced multi-level decoding method for sparse code multiple access includes: encoded bits of all users are mapped to multi-dimensional sparse codewords through predetermined codebooks; a factor graph matrix is constructed using the predetermined codebooks, all users are classified according to the factor graph matrix under predetermined constraints to determine Z levels; based on a predetermined total transmission power, a progressive multi-level power optimization algorithm is employed to perform power-imbalanced allocation for all users according to the Z levels, thereby determining a locally optimal power vector; transmission signals corresponding to the multi-dimensional sparse codewords are transmitted according to the locally optimal power vector; SCMA detection and power-oriented decoding are sequentially performed for users each level, and outputs decoded bit sequences for the L levels.

The invention relates to the technical field of wireless communication, and discloses an adaptive LDPC code coding method, system and device based on evaporation waveguide field intensity distribution, and a medium, and the method comprises the steps: obtaining the evaporation waveguide field intensity distribution in real time, and generating a field intensity distribution diagram; calculating a channel state parameter, and dynamically selecting a low-density parity check code rate according to the channel state parameter information; dynamic low-density parity check coding is adopted, and a sparse structure is adjusted through a check matrix, so that real-time switching of multi-code-rate low-density parity check codes is carried out; and a receiving end carries out decoding by adopting an NW-RBP decoding algorithm, defines a node updating rule, and dynamically schedules a node updating sequence through a residual error. According to the method, the bit error rate under a complex channel is reduced, and meanwhile, the reliable transmission efficiency of system data is improved.

Systems and methods for error detection in quantum computing systems are provided. In one example, the method includes obtaining a multi-dimensional quantum error detection map. The multi-dimensional quantum error detection map represents one or more quantum error detection measurements over a period of time. The method includes determining a partitioning scheme and a fusion scheme for the multi-dimensional quantum error detection map based at least in part on the decoding delay and the fusion delay. The method includes partitioning the multi-dimensional quantum error detection map into a plurality of blocks based at least in part on the partitioning scheme. The method includes decoding each of the plurality of blocks. The method includes fusing the plurality of blocks into a decoded detection map based at least in part on the fusion scheme. The method includes operating a quantum computing system based at least in part on the decoded detection map.

Various aspects of the present disclosure relate to receiving (1502) a polar codeword comprising a set of bits and generating (1504) a permuted vector based at least in part on the polar codeword and a permutation matrix. Aspects of the disclosure may relate to determining (1506) a plurality of polar subcodes based on the permuted vector, and identifying (1508), for each polar subcode of the plurality of polar subcodes, a set of kernels, where each kernel of the set of kernels is associated with a bit pattern of a set of one or more bit patterns. Aspects of the disclosure may relate to decoding (1510) the plurality of polar subcodes using a plurality of parallel polar code component decoders, where each parallel polar code component decoder includes one or more fast decode modules to decode a corresponding kernel of the set of kernels.

System and machine-readable medium for enhanced decoding of demultiplexed data streams received from multiple transmitters. A receiver utilizes erasure decoding (220) when it is determined at a decoder selection means (210) that the number of unknown bits such as dissimilar transmitted bits, i.e. 1 from one transmitter and 0 from another transmitter, is below a threshold which may be the Hamming distance minus one, D -1, of an error and erasure correcting code such as a Reed-Solomon code. Otherwise, if the number of dissimilar transmitted bits is above the threshold, list decoding (230) is utilized. If list decoding does not produce a single result, but instead produces multiple possible results, selection logic (240) may be employed. The selection logic may utilize an errors and erasures decoding of the possible results or a media decoding of the possible results.

To provide a receiver and a reception method capable of improving reception performance with high layer separation accuracy, while reducing reception processing in a Layered Division Multiplexing (LDM) system.SOLUTION: A receiver 20 in an LDM system of the invention includes: an orthogonal demodulation part 22 for extracting an LDM symbol by receiving an LDM signal and performing orthogonal demodulation for it; an LLR calculation part 23 for UL for calculating a Log-likelihood ratio (LLR) with assuming the received LDM symbol as UL; an error correction decoding part 24 for UL for performing decoding processing for a UL signal indicating the LLR; a reference point determination part 25R for narrowing down reference points indicating possible symbol positions which can be taken by symbols for LL within the received LDM symbols based on decoding results of the UL signals; an LLR calculation part 27R for LL for calculating an LLR for the received LDM symbol corresponding to the UL signal based only on the reference point determined by the reference point determination part 25R; and an error correction decoding part 28 for LL for performing decoding processing for an LL signal indicating the LLR.SELECTED DRAWING: Figure 1

While the error correction capability can be altered by changing the redundancy level, requiring different error correction circuits to achieve this increases the circuit size. [Solution] The communication system according to the disclosed technology comprises a transmitting device having an error correction code generation unit and a receiving device having an error correction unit. The error correction code generation unit selects a k-bit data signal, generates an encoded signal by adding (mk) bits of fixed-value signals to the data signal, and generates an n-bit parity signal from the encoded signal. The transmitting device transmits the data signal and the parity signal to the receiving device. The receiving device receives a k-bit received data signal corresponding to the data signal and an n-bit received parity signal corresponding to the parity signal. The error correction unit performs error correction on the error-correction target signal, which consists of the received data signal, the (mk) bits of fixed-value signals, and the received parity signal.

Disclosed are a 64-bit LDPC decoding method and device for BeiDou-3 satellite signals. The implementation of each stage's operations is more rigorous and detailed, providing confidence vectors for check node updates and variable node updates, and the required finite field elements for final verification, making the decoding process easier to understand and implement. A permutation process is added before check node updates, a depermutation process is added before variable node updates, and a posteriori confidence calculation is performed before final verification. The posteriori LLR is calculated by adding the LLRs of two non-zero confidence vectors in the same column to the original LLRs and sorting them. The corresponding finite field element of the minimum LLR is the calculation result. The finite field element obtained from the posterior confidence calculation is finite field multiplied with the check matrix for verification.

Leveraging stochastic physical characteristics of resistive switching devices to generate data having very low cross correlation among bits of that data is disclosed. Data generated from stochastic physical characteristics can also be referred to as physical unclonable feature—or function—(PUF) data. Additionally, error correction functions for PUF data generated from resistive switching memory cells are provided. The error correction functions facilitate additional redundancy and longevity of PUF data, among other benefits. Different embodiments include addressing arrangements to incorporate ECC parity bits among generated PUF data bits, even for differential PUF bits respectively defined by multiple memory cells in different portions of a resistive memory array.