154 results about "Hardware complexity" patented technology

The invention discloses a narrow pulse generation system and method of an FPGA integrated fiber laser, and belongs to the field of all-digital fiber laser control. The narrow pulse generation system comprises a multi-phase clock generation module, a dynamic delay chain module, a pulse width search module, a signal selection module, a logic operation module, a frequency control module, a self-calibration module and an LVDS driving module which are in synergistic effect. The multi-phase clock generation module is used for realizing rough delay adjustment of nanosecond stepping; the dynamic delay chain module is used for realizing fine delay adjustment of picosecond stepping; therefore, based on the FPGA integrated design, an external delay chip and a high-frequency peripheral circuit are not needed, the hardware complexity and cost are reduced, and the anti-interference capability is high; picosecond-level stepping pulse width adjustment is realized through a two-level structure of nanosecond-level coarse adjustment and picosecond-level fine adjustment, and the limitation of a traditional FPGA (Field Programmable Gate Array) integration scheme is broken through; time delay deviation caused by environment change and hardware drift is considered, temperature compensation and TDC calibration are carried out, and the stability of pulse width is ensured.

The invention discloses a cooperative control system for an input-series output-parallel dual-active-bridge inverter, and relates to the technical field of power electronic converter control, an input voltage equalizing control IVSC loop is set for m-1 DAB sub-modules, and input voltage equalization of the DAB sub-modules is realized by adjusting phase shift angles of the sub-modules; an output voltage control OVC loop is set for the output DC bus voltage of the whole ISOP-DAB system to stabilize the DC bus voltage, a PIR controller is adopted in the OVC loop, and the resonant frequency is set to be twice of the fundamental frequency of the AC side, so that selective high gain is provided at the position, the frequency doubling fluctuation of the DC bus voltage is inhibited, and the frequency doubling fluctuation of the DC bus voltage is inhibited. According to the method and the device, the regulation quantity of the IVSC loop and the regulation quantity of the OVC loop are superposed to carry out cooperative control, so that the effective suppression of the frequency doubling fluctuation of the DC bus voltage and the automatic equalization of the power of each module are accurately realized on the premise of not increasing the hardware complexity.

The invention discloses a carrier tracking method suitable for a multi-bit spread spectrum signal, and relates to the technical field of multi-bit spread spectrum, the carrier tracking method comprises the steps of coarse frequency offset correction, multi-bit spread spectrum, average phase estimation and delay phase correction.The carrier tracking method comprises the steps that firstly, a sliding DFT algorithm is adopted to estimate frequency offset, and a coarse frequency offset available correction signal is obtained; secondly, adaptively selecting the number of available windows according to historical data corresponding to the current signal-to-noise ratio; the method comprises the following steps: firstly obtaining a window intermediate point spread spectrum period, then extracting a carrier phase estimation value of the window intermediate point spread spectrum period, finally delaying a correlation value by the spread spectrum period to realize time sequence alignment and eliminate phase deviation, and finally obtaining information bits corresponding to each spread spectrum period by extracting and correcting a real part of the correlation value, matching a local sequence number and mapping. According to the method, the phase estimation precision under the low signal-to-noise ratio can be improved, parameter self-adaption to high and low dynamic scenes of a satellite is realized, the coherent judgment performance is improved, and the hardware complexity is reduced.

The invention discloses an RTSP video stream AI processing method and system based on a tsn network, which realize end-to-end deterministic transmission and processing, guarantee low-delay and low-jitter transmission of a video stream from a source to an AI unit through a TSN, meet the industrial-grade real-time requirement and perform efficient edge AI processing. The problem that a traditional CPU is low in efficiency or a GPU is high in power consumption is solved, real-time analysis of the high energy efficiency ratio and high system integration are achieved, network transmission, video decoding, AI reasoning and result visualization are integrated into a single embedded platform, and hardware complexity and cost are reduced.

The invention relates to the technical field of steel wire rope state detection, in particular to a steel wire rope diameter measuring method and system based on event compensation correction. According to the technical scheme, the system comprises an imaging module, a boundary initial extraction module, a dynamic motion estimation module, a dynamic correction compensation module and a diameter calculation module. The imaging module comprises a traditional camera, an event camera, an optical component, a synchronous triggering device and a spectroscope. The traditional camera is used for collecting frame images of the steel wire rope. According to the method, on the basis of complementary advantages of an event camera and a traditional camera, systematic measurement deviation under the dynamic working condition is solved from the mechanism through an event-driven dynamic geometric compensation model, and quasi-static imaging dependence is broken through. The method does not need extra constraint or increase of frame rate, control cost and hardware complexity, avoids the problems of reduction of signal-to-noise ratio and the like, realizes high-precision stable measurement under high-speed and vibration working conditions, adapts to online monitoring of multiple industrial scenes, and is remarkable in practicability and application value.

The invention provides a master-slave device write operation communication method and communication system, and the method comprises the steps: a master device sends a shared address corresponding to a current write operation, so that a slave device confirms whether the current write operation is matched or not; and the master device sends a write operation command, the identifier set, the write address and the write data in sequence, so that the target slave devices whose own identifiers belong to the identifier set obtain the target data according to the identifier arrangement sequence in the identifier set and the target data length of each target slave device, and data write is completed. A plurality of slave devices share one address and are distinguished in combination with identifiers, so that address resource waste is avoided, and the upper limit of the number of deployable slave devices is improved. In the single I2C transaction, based on the identifier arrangement sequence and the target data length, write data partitioning processing is realized, the occupation and delay of a bus are reduced, and the communication efficiency is improved. The participation sequence and any combination of the slave devices can be dynamically specified, additional mechanisms such as mapping tables are not needed, and the hardware complexity and power consumption of the slave devices are prevented from being increased.

The invention provides a single-bit digital beam forming method and device, a terminal and a medium, and relates to the technical field of radar detection and wireless communication, and the method comprises the steps: constructing a target single-bit low-rank matrix recovery model of a uniform linear array comprising a plurality of sensors, and an optimization problem of the target single-bit low-rank matrix recovery model, and converting the target single-bit low-rank matrix recovery model into a processable problem, solving and determining a low-rank matrix by using a near-end block coordinate descent algorithm and a gradient descent algorithm, calculating an estimated covariance matrix of a target and an interference signal based on the matrix, performing eigendecomposition to calculate an interference subspace, and modeling a single-bit digital beam forming problem according to a base vector of the interference subspace to obtain a single-bit digital beam forming matrix. And calculating a closed-form solution based on the principle that the optimal solution is located in the orthogonal complement space of the interference subspace. According to the method, the resolution requirement of the analog-to-digital converter can be reduced by fully utilizing the single-bit quantization characteristic, and the beamforming performance of single-bit digital beamforming is close to that of high-bit digital beamforming when the hardware complexity and the power consumption are reduced.

The invention discloses a temperature drift dynamic compensation system and method for a Hall current sensor. The system comprises a thermistor assembly, a power supply module, an analog-to-digital conversion module, a processor module and a compensation algorithm module. The thermistor is directly coupled to the surface of the Hall element, and an improved Kalman filtering algorithm is combined, so that dynamic compensation in a wide temperature range is realized. According to the invention, the measurement precision and stability can be significantly improved, the hardware complexity and cost are reduced, the temperature drift and nonlinearity influence of other elements is reduced, and the method is suitable for a high-precision current detection scene.

The application provides a kind of intelligent metasurface assisted near-field time division integrated sensing method and system, it is related to wireless communication field.The application designs integrated sensing system by introducing RIS and single antenna receiver, avoids complex full-duplex base station and multi-antenna receiver, significantly reduces hardware complexity and implementation cost under the premise of ensuring high-quality communication and sensing performance;The adjustable frame structure designed separates the communication subframe and the sensing subframe completely, decouples the communication beam optimization and the sensing signal design, respectively realizes the communication and sensing functions in a purer signal environment;In the communication subframe, the communication and rate maximization are realized, and in the sensing subframe, the sensing capability is enhanced through the transmission beam pattern matching, which significantly improves the overall communication rate and sensing accuracy of the system;Finally, a virtual multi-dimensional receiving signal of multiple passive targets in the near field of RIS is constructed through repetition coding design, and then the 2D-MUSIC algorithm is used to estimate the target angle and distance parameters.

The invention relates to the technical field of sequential control, and discloses a sequential logic control circuit for a noise shaping SAR ADC (Synthetic Aperture Radar Analog to Digital Converter), which comprises an analog signal acquisition circuit for receiving and preprocessing an initial input signal; the noise shaping circuit is used for performing frequency spectrum shaping on quantization noise in the analog signal and generating the analog signal subjected to noise shaping; the successive approximation type analog-to-digital converter is used for performing bit-by-bit comparison with the analog signal subjected to noise shaping and gradually completing conversion from the analog signal to the digital signal from the highest bit to the lowest bit; and the clock control circuit is used for coordinating sequential logic among the analog signal acquisition circuit, the noise shaping circuit and the successive approximation type analog-to-digital converter. According to the method, frequency spectrum remodeling is carried out on the quantization noise in the signal, the signal-to-noise ratio of the signal is remarkably improved on the premise that the hardware complexity is not additionally increased, and then interference of the noise on follow-up analog-to-digital conversion is reduced.

The invention discloses a four-channel F-DFBS array parallel photon reserve pool optical fiber compensation method comprising the following steps: inputting a pre-processed damaged optical fiber signal into a trained optical fiber compensation model to obtain a compensation signal; wherein the optical fiber compensation model comprises a convolution preprocessing network and a four-channel F-DFBS array parallel photon time delay reserve pool network; the convolution preprocessing network is used for performing preliminary compensation on the normalized damaged optical fiber signal to obtain a preliminarily compensated damaged optical fiber signal; the four-channel F-DFBS array parallel photon time delay reserve pool network is used for carrying out secondary compensation to obtain a compensation signal; and obtaining an evaluation result of the compensation signal according to the mean square error and the error rate. According to the invention, optical fiber damage equalization can be carried out on four paths of signals in parallel, the signal recovery efficiency is obviously improved, a complex photon integrated structure is avoided, the hardware complexity and cost are greatly reduced, and a channel equalization solution which is efficient, practical and easy to deploy is provided.

The invention discloses a polar code coding method and device, relates to the technical field of communication, and aims at enabling different numbers of information bit sequences to construct polar codes based on the same reliability sequence and a first matrix, reducing the hardware complexity and improving the decoding performance. The method comprises the steps of mapping an information bit sequence with the length of k to k bits of a first sequence with the length of N according to a reliability sequence with the length of N to obtain a second sequence comprising k information bits, x PC bits and N-k-x frozen bits, multiplying the second sequence by a first matrix to obtain a third sequence, and performing polarization coding to obtain a fourth sequence. K < = K < = N, 1 < = x, K is the maximum value of the length of the information bit sequence, k, K, N and x are positive integers, all the parts below the diagonal lines of the first matrix are 0, all the diagonal lines are 1, the column weight of the column corresponding to the PC bit in the first matrix is greater than 1, the column weight of the column corresponding to the frozen bit or the information bit is equal to 1, and the number of the columns with the column weight greater than 1 is smaller than or equal to N-K.

The present application relates to steel wire rope state detection technical field, especially in kind based on event compensation correction steel wire rope diameter measurement method and system, its technical scheme includes imaging module, boundary initial extraction module, dynamic motion estimation module, dynamic correction compensation module and diameter calculation module, the imaging module includes traditional camera, event camera, optical component, synchronous trigger device and beam splitter, the traditional camera is used for collecting the frame image of steel wire rope, the present application relies on the complementary advantages of event camera and traditional camera, through event driven dynamic geometric compensation model, the systematic measurement deviation under dynamic working condition is solved from the mechanism, the breakthrough of quasi-static imaging dependence is broken through, without additional constraint or frame rate promotion, control cost and hardware complexity, avoid signal-to-noise ratio decline and other problems, realize high-precision stable measurement under high speed, vibration working condition, adapt to multi-industrial scene online monitoring, practicality and application value are remarkable.

The invention discloses an MEMS gravity sensor air pressure and temperature decoupling compensation method and system based on frequency response analysis. Placing the MEMS gravity sensor in a preset air pressure and temperature environment, obtaining a plurality of groups of corresponding resonant frequencies and quality factors Q, and constructing a mapping relation between the Q and the air pressure and the temperature; in the operation process of the sensor, the sum Q is measured in real time, and the variable quantity of the ambient air pressure and the temperature is obtained through inversion of the mapping relation; and introducing the variation of the ambient air pressure and the temperature into a compensation correction model, and decoupling and correcting the gravity output of the sensor. According to the method, an external sensor is not needed, inconsistency caused by space position difference is avoided, the system structure is more compact, hardware complexity and power consumption are lower, the long-term stability and measurement precision of the MEMS gravimeter in a complex environment can be remarkably improved, and miniaturization, low power consumption and array application are facilitated.

The utility model relates to the technical field of brushless motor drive circuits, in particular to a high-efficiency non-inductive brushless motor drive circuit structure, which comprises an STM32G030K6T6 micro-control unit and a position signal detection circuit, wherein the position signal detection circuit is used for acquiring position information of a BLDC (brushless direct current) motor and feeding back the position information to the STM32G030K6T6 micro-control unit; a first control end of the STM32G030K6T6 micro-control unit is connected with an inverter circuit through a power driving circuit, and a second control end of the STM32G030K6T6 micro-control unit realizes soft switching of the inverter circuit through a resonance circuit; a hardware protection circuit is arranged between the inverter circuit and the STM32G030K6T6 micro-control unit, and the inverter circuit is connected with the BLDC motor. In practical application, a Hall sensor is replaced by a high-frequency square wave injection method, accurate rotor position detection of the non-inductive BLDC motor is realized, system hardware cost and complexity are reduced, and system robustness is improved. The dependence on an external sensor is reduced by using the resonance circuit, the hardware complexity is reduced, and meanwhile, the switching loss is effectively reduced.

This invention relates to the field of pipeline inspection technology, specifically a stepping, encircling pipeline inspection robot and its inspection method; it includes end plates on both sides and a middle plate in the middle; the two end plates are connected by a connecting rod; the middle plate has a central hole through which the connecting rod passes; a gripper mechanism is connected to the right side of the middle plate and the left side of the end plate located to the right; end grooves are provided inside the end plates; end rope holes are provided through the end grooves on their adjacent sides; central rope holes are provided above and below the central hole, respectively, penetrating the left and right walls of the middle plate; this invention integrates a pipeline clamping mechanism design, which can adapt to various complex pipeline lines in coal mines and improve the obstacle-crossing ability of the pipeline inspection robot; secondly, the inspection robot uses an ultrasonic sensor to achieve efficient reuse of a single device and a single sensor in multiple tasks, reducing hardware complexity and cost, and improving overall operation efficiency through intelligent task switching.

The utility model belongs to the technical field of electronics, and particularly relates to a low-harmonic rectification control circuit which remarkably counteracts low-order harmonics such as five-order harmonics and seven-order harmonics through multi-phase superposition of a phase-shifting transformer, the total harmonic distortion (THD) is lower than 5%, the environmental protection requirement of high-power industrial equipment for a power grid is met, and a control cable has the advantages of low harmonic pollution, low cost and the like. The DSP main control chip is combined with the digital timer, and the serial-to-parallel circuit only needs one PWM pin and three GPIO pins, so that the DSP resource occupation is reduced; the gating circuit adopts a general multiplexer (74HC4051D), so that the hardware complexity is reduced; the drive circuit realizes strong and weak current isolation through the isolation transformer, prevents high-voltage interference from damaging a control chip, improves the system safety, and reduces the maintenance cost of the circuit.

The invention discloses a satellite communication antenna system and method for adaptive beam forming, and relates to the technical field of communication, and the system comprises a dynamic reconfigurable sub-array, a high-speed interconnection bus, a central digital beam forming processor and a beam health monitoring module. The method comprises the following steps: constructing a hybrid beam forming architecture in which a dynamic reconfigurable sub-array and a central processing unit cooperate; sensing a channel state and an interference direction in real time, and generating a composite channel state matrix; calculating and decomposing a global optimal beam weight based on a constraint minimum variance or maximum signal to interference plus noise ratio criterion; an adjustable phase shifter and an attenuator in the driving subarray realize millisecond-level beam pointing reconstruction and null generation; and executing multi-subarray collaborative synthesis and dynamic power distribution. According to the invention, closed-loop adaptive beam optimization can be realized, the power consumption and the hardware complexity are obviously reduced, the spectrum efficiency and the beam precision are improved, and the system robustness is enhanced at the same time.

This invention provides a high-precision calibration system and method for a multi-channel ADC, relating to the field of communication technology. The system includes a digital transmitter, a DAC module, a calibration loop, and a multi-channel ADC module connected sequentially. It also includes a correlation module, a parameter estimation module, and a compensation module. The correlation module is connected to both the digital transmitter and the multi-channel ADC module. The parameter estimation module is connected to both the correlation module and the compensation module. The compensation module is also connected to the multi-channel ADC module. The calibration loop connects the end of the transmit link and the beginning of the receive link. This invention combines the analog and digital domains through the calibration loop, achieving deviation compensation by performing a single cross-correlation operation and parameter estimation on the local reference signal and multiple sub-signals. This method eliminates the need to redesign analog circuits and does not rely on external instruments for calibration. It features low hardware complexity, high stability, and a short estimation cycle, without affecting normal service operation.

A numerical conversion method for a public key cryptography system includes accumulating a first value by using a first modular addition loop according to the first value for generating a second value after a first predetermined loop count is reached, accumulating the second value by using a second modular addition loop according to the second value for generating a third value after a second predetermined loop count is reached, inputting the third value to a Montgomery modular exponentiation function for generating a Montgomery conversion parameter, and converting a first conversion value in an integer domain into a second conversion value in a Montgomery domain.

The application discloses an optical matrix vector multiplier based on a unitary matrix-diagonal matrix decomposition. The multiplier comprises a Mach-Zehnder interferometer array for realizing a synthetic unitary matrix Omega and a modulation unit for realizing a corresponding diagonal matrix Sigma, wherein a target weight matrix M satisfies a decomposition form of M=ΩΣ. The method fuses two unitary matrices required for mapping in a traditional singular value decomposition into a single synthetic unitary matrix Omega, so that a unitary transformation can be completed by only one interferometer array of optical hardware, and a complete matrix multiplication is realized in cooperation with the modulation unit. Through algorithm-hardware collaborative design, the number of basic optical interference units required is significantly reduced, the hardware complexity, manufacturing cost and system power consumption of the optical neural network are greatly reduced while the computing performance is maintained, and an effective solution is provided for efficient optical computing acceleration of artificial intelligence.

The invention discloses a data communication method and device, a terminal and a computer readable storage medium. The hardware complexity of the terminal can be reduced, and the data communication performance can be improved. The method comprises the steps of determining a time domain resource set allocated to each piece of to-be-sent data and a frequency domain resource subset actually occupied by each piece of to-be-sent data under the condition that at least two pieces of to-be-sent data corresponding to at least two user identification cards exist in a terminal; under the condition that time domain resource overlapping exists between the at least two time domain resource sets, determining whether overlapping exists between at least two frequency domain resource subsets corresponding to the at least two to-be-sent data; and under the condition that the at least two frequency domain resource subsets do not overlap, combining the at least two time domain resource sets according to the frequency domain resource subset corresponding to each piece of data to be sent, and sending the data to be sent by using a shared transmission path corresponding to the at least two subscriber identity module cards. And sending the combined at least two to-be-sent data.

The invention discloses a three-path coprime spectrum driven broadband spectrum detection method and device, and belongs to the technical field of broadband electromagnetic spectrum sensing. The method comprises the following steps: carrying out undersampling on a real signal by adopting a three-path coprime sampling rate, and obtaining three paths of branch spectrums with different resolutions through multi-phase filtering, IDFT (Inverse Discrete Fourier Transform) and cross-correlation operation; and after the resolution is unified through up-sampling, adaptive merging judgment is carried out by using saliency measurement based on spectrum similarity, and a real spectrum peak and an aliasing false peak are effectively distinguished. The device core comprises a radio frequency front end, a three-channel low-speed ADC and a digital signal processing platform. According to the method, pseudo-peak-free panoramic spectrum sensing in the frequency band of 300MHz-10GHz under the under-sampling condition is realized, and the method has the advantages of low hardware complexity, high engineering feasibility, high robustness to dense signals and the like, and is particularly suitable for non-cooperative electronic reconnaissance scenes.

This invention discloses an FPGA implementation method for visual image processing of sound source identification, comprising: 1. Normalizing the sound intensity values ​​obtained from sound source identification and converting them into grayscale values; 2. Obtaining corresponding color pixel values ​​by performing three independent mappings on the grayscale values; 3. Upsampling the low-resolution color acoustic cloud map using an interpolation algorithm to improve the image resolution and form a visual acoustic cloud map that represents sound intensity in color. This invention enables the visual image processing of sound source identification to be implemented on an FPGA in the form of digital circuits, thereby improving the real-time performance of the entire sound source identification process, reducing the hardware complexity of the sound source identification platform, and saving time and hardware costs.

The invention relates to the technical field of dynamic and static tank monitoring, solves the technical defect that the prior art cannot adapt to dynamic change of working conditions and lacks differential monitoring logic of dynamic and static tanks, and particularly relates to a dynamic and static tank monitoring alarm function implementation method based on a DCS (Distributed Control System). A plurality of operation variables are set, a timing function module is initialized, the set values of the operation variables are associated, the current liquid level value in the storage tank is collected in real time and preprocessed, the current liquid level value is latched at a preset period node, the current monitoring reference value of the liquid level is dynamically calibrated, and the absolute deviation value of the liquid level is calculated. The limitation of a traditional independent monitoring framework can be broken through, the hardware complexity and deployment cost of the system can be greatly simplified, meanwhile, the requirements of two opposite working conditions can be flexibly met, the universality of the system in a multi-type storage tank scene is improved, real-time monitoring and abnormal alarm prompting of dynamic and static tank liquid level deviation of the storage tank are achieved, and safety accidents caused by human negligence are avoided; the safety index is improved.

Aspects of this technical solution can increase speed of processing and lower computational hardware complexity in motion detection, while maintaining integrity of motion detection across image frames. For example, in image-processing environments associated with autonomous or semi-autonomous navigation (e.g., driving, robotic navigation, etc.), a large volume of image data is to be rapidly and accurately processed to maintain reliable and up-to-date models of a physical environment. Thus, embodiments in accordance with this disclosure can provide high-speed and accurate motion detection of input frame data.

A reconfigurable configuration method, system and application based on waveform grouping belong to the technical field of satellite communication, and specifically comprises the following steps: dividing L groups according to waveform frequency domain characteristics, carrying out hardware unified design by taking a waveform with the maximum resource demand as a reference, ensuring that pins of each group are mapped consistently, and setting a unique ID (Identity); software is divided into a front-end public processing part and a rear-end demodulation decoding part, and a rear-end function module unified type is a configurable item; through independent configuration loading, software is dynamically loaded for each packet, and flexible reconstruction of a single packet waveform function is realized without influencing other packet services. Through the hardware modularization unification and software modularization reconfigurable design, the hardware complexity and the number of software configuration items of the multi-waveform system are reduced, and the flexibility and expandability of the system are remarkably improved under the condition that resources are limited.

The embodiment of the invention provides a data processing method and device, a storage medium and electronic equipment, and relates to the technical field of computers, and the method comprises the steps that a transmitting end obtains first I2S audio data, carries out the inter-frame splitting of the first I2S audio data, and obtains at least one first I2S data frame; encoding each first I2S data frame by using a Hamming code encoder to obtain an encoded second I2S data frame; the Hamming code encoder is used for encoding 4-bit data code words into 7-bit data code words, and data encoded by the Hamming code encoder is used for supporting error detection and error correction of the data; performing recombination according to the encoded second I2S data frame to obtain second I2S audio data; and sending the second I2S audio data to a receiving end based on an I2S protocol. Therefore, by grouping the frames and adopting (7, 4) Hamming codes for coding, the error correction capability is improved under the condition of increasing the minimum error correction bits, the reliable transmission of the I2S audio data is realized, and the hardware complexity is reduced.

The application discloses a kind of based on gradient descent method's uniform array ultra-wideband radar positioning imaging method, it is related to radar positioning technical field, the signal matrix model after matching filtering is constructed in the application, matrix decomposition is carried out by gradient descent method, joint direction matrix and joint electromagnetic guide vector matrix are obtained, then, two groups of two-dimensional angle estimation values with high resolution and no ambiguity are respectively obtained from the two matrices, accurate angle parameters are obtained by weighted fusion, and target three-dimensional coordinates are calculated accordingly, finally, radar image is generated by back projection algorithm, so that the number of array elements and hardware complexity are significantly reduced, the inherent angle ambiguity problem of array is overcome, the multi-target angle resolution and parameter estimation stability are improved, and the calculation efficiency and engineering realizability are also considered.

The invention discloses an IQ modulator bias control system and method with low resource requirements, and the method comprises the steps: abstracting fixed frequency disturbance signals loaded on an I arm, a Q arm and a P arm into a periodic code element form, and superposing the periodic code element form onto an original DC bias voltage, thereby forming square wave disturbance bias; according to the method, the automatic control of the bias voltage of each arm in the system can be realized by carrying out simple pilot signal acquisition operation on equipment with limited performance, and the requirements of computing resources and the hardware complexity are remarkably reduced. According to the method, resources for sending and collecting pilot frequencies and calculating harmonic components can be saved, the bias voltage is rapidly controlled to be near a target working point, and then the method is selected to be switched back to a traditional method for high-precision control.