212 results about "Hardware complexity" patented technology

The invention discloses a wavefront reconstruction method for improving the dynamic range of a Shack-Hartmann wavefront sensor. Belongs to the technical field of wavefront detection. According to the method, a new Shack-Hartmann wavefront detection method is needed, the effective dynamic range of a Shack-Hartmann sensor can be expanded on the premise that the hardware complexity is not remarkably increased, local mismatching accumulation can be avoided through a reasonable matching strategy, and the detection accuracy is improved. Therefore, high-precision and high-reliability wavefront reconstruction can be realized in a large-amplitude wavefront distortion scene. Comprising the following steps: S1, detecting by a Shack-Hartmann wavefront sensor to obtain a light spot distribution diagram H (x, y); s2, extracting a light spot centroid pixel-level position through a matched filtering algorithm; s3, calculating the sub-pixel-level position of the mass center of the light spot through Gaussian interpolation; s4, a mass center-subaperture matching relation is established through a Kuhn-Munkres algorithm; and S5, calculating the wavefront slope according to the corresponding relationship between the centroid and the sub-aperture, and then recovering the wavefront according to the wavefront slope.

The invention discloses an optical fiber vibration signal time identification and classification method, system and device based on a Mam-YOLOv10 neural network and a medium, and belongs to the technical field of optical fiber communication, and the method comprises the steps: obtaining OTDR signals of a plurality of targets based on an optical fiber vibration signal collection system, and carrying out the denoising of the OTDR signals; performing short-time Fourier transform on the de-noised OTDR signal to obtain a two-dimensional time-frequency diagram of the vibration signal; based on the two-dimensional time-frequency diagram, multi-scale features of the optical fiber vibration signals are extracted; and inputting the multi-scale features into a Mam-YOLOv10 neural network containing a Mama attention block to complete identification and classification of the optical fiber vibration signals. According to the method, the influence of interference fading on the pattern recognition accuracy is effectively reduced, meanwhile, the hardware complexity is reduced, the attention weight is automatically adjusted according to different fault scenes and data characteristics, and the accuracy of optical fiber fault recognition and classification is improved.

The invention discloses a narrow pulse generation system and method of an FPGA integrated fiber laser, and belongs to the field of all-digital fiber laser control. The narrow pulse generation system comprises a multi-phase clock generation module, a dynamic delay chain module, a pulse width search module, a signal selection module, a logic operation module, a frequency control module, a self-calibration module and an LVDS driving module which are in synergistic effect. The multi-phase clock generation module is used for realizing rough delay adjustment of nanosecond stepping; the dynamic delay chain module is used for realizing fine delay adjustment of picosecond stepping; therefore, based on the FPGA integrated design, an external delay chip and a high-frequency peripheral circuit are not needed, the hardware complexity and cost are reduced, and the anti-interference capability is high; picosecond-level stepping pulse width adjustment is realized through a two-level structure of nanosecond-level coarse adjustment and picosecond-level fine adjustment, and the limitation of a traditional FPGA (Field Programmable Gate Array) integration scheme is broken through; time delay deviation caused by environment change and hardware drift is considered, temperature compensation and TDC calibration are carried out, and the stability of pulse width is ensured.

The invention discloses a cooperative control system for an input-series output-parallel dual-active-bridge inverter, and relates to the technical field of power electronic converter control, an input voltage equalizing control IVSC loop is set for m-1 DAB sub-modules, and input voltage equalization of the DAB sub-modules is realized by adjusting phase shift angles of the sub-modules; an output voltage control OVC loop is set for the output DC bus voltage of the whole ISOP-DAB system to stabilize the DC bus voltage, a PIR controller is adopted in the OVC loop, and the resonant frequency is set to be twice of the fundamental frequency of the AC side, so that selective high gain is provided at the position, the frequency doubling fluctuation of the DC bus voltage is inhibited, and the frequency doubling fluctuation of the DC bus voltage is inhibited. According to the method and the device, the regulation quantity of the IVSC loop and the regulation quantity of the OVC loop are superposed to carry out cooperative control, so that the effective suppression of the frequency doubling fluctuation of the DC bus voltage and the automatic equalization of the power of each module are accurately realized on the premise of not increasing the hardware complexity.

The invention discloses a novel photovoltaic optimizer based on PLC communication, which comprises a hardware module, a control module, a communication module and a service module, and is characterized in that the hardware module is used for constructing a system material basis and realizing electric energy calling, signal coupling and equipment protection, and the control module is used for realizing intelligent power regulation and communication control; the power generation efficiency is improved and the communication stability is guaranteed through a multi-modal algorithm, and the communication module is used for constructing a power line carrier communication system. A special PLC framework for a direct-current low-voltage environment is adopted, a communication frequency band and an impedance matching scheme can be designed according to photovoltaic direct-current side characteristics, technical field differentiation is formed from alternating-current power grid PLC patents, through dual-mode MPPT dynamic switching, the limitation of a single algorithm in a dynamic environment can be broken through through combination of local gradient prediction and a distributed collaborative algorithm, and the real-time performance of a photovoltaic power grid is improved. In cooperation with a passive impedance compensation technology, adaptive adjustment can be performed through the magnetic ring filter and the capacitor array, an additional power supply module is not needed, and the hardware complexity is reduced.

The invention discloses a carrier tracking method suitable for a multi-bit spread spectrum signal, and relates to the technical field of multi-bit spread spectrum, the carrier tracking method comprises the steps of coarse frequency offset correction, multi-bit spread spectrum, average phase estimation and delay phase correction.The carrier tracking method comprises the steps that firstly, a sliding DFT algorithm is adopted to estimate frequency offset, and a coarse frequency offset available correction signal is obtained; secondly, adaptively selecting the number of available windows according to historical data corresponding to the current signal-to-noise ratio; the method comprises the following steps: firstly obtaining a window intermediate point spread spectrum period, then extracting a carrier phase estimation value of the window intermediate point spread spectrum period, finally delaying a correlation value by the spread spectrum period to realize time sequence alignment and eliminate phase deviation, and finally obtaining information bits corresponding to each spread spectrum period by extracting and correcting a real part of the correlation value, matching a local sequence number and mapping. According to the method, the phase estimation precision under the low signal-to-noise ratio can be improved, parameter self-adaption to high and low dynamic scenes of a satellite is realized, the coherent judgment performance is improved, and the hardware complexity is reduced.

The invention discloses an RTSP video stream AI processing method and system based on a tsn network, which realize end-to-end deterministic transmission and processing, guarantee low-delay and low-jitter transmission of a video stream from a source to an AI unit through a TSN, meet the industrial-grade real-time requirement and perform efficient edge AI processing. The problem that a traditional CPU is low in efficiency or a GPU is high in power consumption is solved, real-time analysis of the high energy efficiency ratio and high system integration are achieved, network transmission, video decoding, AI reasoning and result visualization are integrated into a single embedded platform, and hardware complexity and cost are reduced.

The invention relates to the technical field of steel wire rope state detection, in particular to a steel wire rope diameter measuring method and system based on event compensation correction. According to the technical scheme, the system comprises an imaging module, a boundary initial extraction module, a dynamic motion estimation module, a dynamic correction compensation module and a diameter calculation module. The imaging module comprises a traditional camera, an event camera, an optical component, a synchronous triggering device and a spectroscope. The traditional camera is used for collecting frame images of the steel wire rope. According to the method, on the basis of complementary advantages of an event camera and a traditional camera, systematic measurement deviation under the dynamic working condition is solved from the mechanism through an event-driven dynamic geometric compensation model, and quasi-static imaging dependence is broken through. The method does not need extra constraint or increase of frame rate, control cost and hardware complexity, avoids the problems of reduction of signal-to-noise ratio and the like, realizes high-precision stable measurement under high-speed and vibration working conditions, adapts to online monitoring of multiple industrial scenes, and is remarkable in practicability and application value.

The invention relates to the technical field of signal processing, and discloses a velocity vector sensing method and device, equipment, a storage medium and a product, and the method comprises the steps: carrying out the down-conversion and matched filtering of a pilot signal transmitted by a user side, obtaining a target discrete signal sequence, carrying out the fast Fourier transform of the target discrete signal sequence, and obtaining a target discrete signal sequence; and determining a signal frequency sequence based on a discrete Fourier transform result, determining a frequency increase rate and a Doppler offset according to the signal frequency sequence, obtaining a signal propagation delay according to the discrete Fourier transform result, and further determining a velocity vector sensing result of the user side. According to the invention, hardware complexity and power consumption are reduced through down-conversion and matched filtering processing, and the signal-to-noise ratio is improved; according to the method, fast Fourier transform and inverse fast Fourier transform are combined, a signal frequency sequence, signal propagation time delay, frequency increase rate and Doppler offset are extracted, the velocity vector of a user side is sensed comprehensively, and the limitation that only part of parameters can be sensed in the prior art is overcome.

The invention provides a master-slave device write operation communication method and communication system, and the method comprises the steps: a master device sends a shared address corresponding to a current write operation, so that a slave device confirms whether the current write operation is matched or not; and the master device sends a write operation command, the identifier set, the write address and the write data in sequence, so that the target slave devices whose own identifiers belong to the identifier set obtain the target data according to the identifier arrangement sequence in the identifier set and the target data length of each target slave device, and data write is completed. A plurality of slave devices share one address and are distinguished in combination with identifiers, so that address resource waste is avoided, and the upper limit of the number of deployable slave devices is improved. In the single I2C transaction, based on the identifier arrangement sequence and the target data length, write data partitioning processing is realized, the occupation and delay of a bus are reduced, and the communication efficiency is improved. The participation sequence and any combination of the slave devices can be dynamically specified, additional mechanisms such as mapping tables are not needed, and the hardware complexity and power consumption of the slave devices are prevented from being increased.

The invention provides a single-bit digital beam forming method and device, a terminal and a medium, and relates to the technical field of radar detection and wireless communication, and the method comprises the steps: constructing a target single-bit low-rank matrix recovery model of a uniform linear array comprising a plurality of sensors, and an optimization problem of the target single-bit low-rank matrix recovery model, and converting the target single-bit low-rank matrix recovery model into a processable problem, solving and determining a low-rank matrix by using a near-end block coordinate descent algorithm and a gradient descent algorithm, calculating an estimated covariance matrix of a target and an interference signal based on the matrix, performing eigendecomposition to calculate an interference subspace, and modeling a single-bit digital beam forming problem according to a base vector of the interference subspace to obtain a single-bit digital beam forming matrix. And calculating a closed-form solution based on the principle that the optimal solution is located in the orthogonal complement space of the interference subspace. According to the method, the resolution requirement of the analog-to-digital converter can be reduced by fully utilizing the single-bit quantization characteristic, and the beamforming performance of single-bit digital beamforming is close to that of high-bit digital beamforming when the hardware complexity and the power consumption are reduced.

The invention discloses a temperature drift dynamic compensation system and method for a Hall current sensor. The system comprises a thermistor assembly, a power supply module, an analog-to-digital conversion module, a processor module and a compensation algorithm module. The thermistor is directly coupled to the surface of the Hall element, and an improved Kalman filtering algorithm is combined, so that dynamic compensation in a wide temperature range is realized. According to the invention, the measurement precision and stability can be significantly improved, the hardware complexity and cost are reduced, the temperature drift and nonlinearity influence of other elements is reduced, and the method is suitable for a high-precision current detection scene.

The invention provides a Softmax accelerator realized based on segmentation approximation and a design method. The Softmax accelerator comprises a maximum value module, a subtraction module, a data segmentation module, an index module, an adder tree module and a logarithm module. The input of the maximum value module is an input vector xi of Softmax, i = 1, 2, 3... n, and the maximum value xmax in the input vector is selected through a multi-path parallel comparator; the input of the subtraction module is xi and xmax, subtraction operation is completed through n parallel adders, and n output results xi-xmax are obtained; the data segmentation module segments the xi-xmax data into xi-xmax = a negative integer + a positive decimal; the index module is used for fitting an exponential function through a piecewise approximation method according to data segmentation result calculation; the input of the adder tree module is output, the input of the logarithm module is fitting a logarithmic function through a piecewise approximation method, and the output is realized. On the premise of ensuring the calculation precision, the exponential operation is simplified through the piecewise approximation method, and the division operation is optimized to reduce the hardware complexity, so that the reasoning speed of a deep learning model is improved.

The application provides a kind of intelligent metasurface assisted near-field time division integrated sensing method and system, it is related to wireless communication field.The application designs integrated sensing system by introducing RIS and single antenna receiver, avoids complex full-duplex base station and multi-antenna receiver, significantly reduces hardware complexity and implementation cost under the premise of ensuring high-quality communication and sensing performance;The adjustable frame structure designed separates the communication subframe and the sensing subframe completely, decouples the communication beam optimization and the sensing signal design, respectively realizes the communication and sensing functions in a purer signal environment;In the communication subframe, the communication and rate maximization are realized, and in the sensing subframe, the sensing capability is enhanced through the transmission beam pattern matching, which significantly improves the overall communication rate and sensing accuracy of the system;Finally, a virtual multi-dimensional receiving signal of multiple passive targets in the near field of RIS is constructed through repetition coding design, and then the 2D-MUSIC algorithm is used to estimate the target angle and distance parameters.

The invention relates to the technical field of sequential control, and discloses a sequential logic control circuit for a noise shaping SAR ADC (Synthetic Aperture Radar Analog to Digital Converter), which comprises an analog signal acquisition circuit for receiving and preprocessing an initial input signal; the noise shaping circuit is used for performing frequency spectrum shaping on quantization noise in the analog signal and generating the analog signal subjected to noise shaping; the successive approximation type analog-to-digital converter is used for performing bit-by-bit comparison with the analog signal subjected to noise shaping and gradually completing conversion from the analog signal to the digital signal from the highest bit to the lowest bit; and the clock control circuit is used for coordinating sequential logic among the analog signal acquisition circuit, the noise shaping circuit and the successive approximation type analog-to-digital converter. According to the method, frequency spectrum remodeling is carried out on the quantization noise in the signal, the signal-to-noise ratio of the signal is remarkably improved on the premise that the hardware complexity is not additionally increased, and then interference of the noise on follow-up analog-to-digital conversion is reduced.

The invention discloses a four-channel F-DFBS array parallel photon reserve pool optical fiber compensation method comprising the following steps: inputting a pre-processed damaged optical fiber signal into a trained optical fiber compensation model to obtain a compensation signal; wherein the optical fiber compensation model comprises a convolution preprocessing network and a four-channel F-DFBS array parallel photon time delay reserve pool network; the convolution preprocessing network is used for performing preliminary compensation on the normalized damaged optical fiber signal to obtain a preliminarily compensated damaged optical fiber signal; the four-channel F-DFBS array parallel photon time delay reserve pool network is used for carrying out secondary compensation to obtain a compensation signal; and obtaining an evaluation result of the compensation signal according to the mean square error and the error rate. According to the invention, optical fiber damage equalization can be carried out on four paths of signals in parallel, the signal recovery efficiency is obviously improved, a complex photon integrated structure is avoided, the hardware complexity and cost are greatly reduced, and a channel equalization solution which is efficient, practical and easy to deploy is provided.

The invention provides a distributed phase detection device and method with a large dynamic measurement range. The device comprises a first laser, a second laser, a first pulse modulation and frequency shift module, a second frequency shift module and a receiving module, wherein the first laser is used for generating a signal with the frequency of 0; the second laser is used for generating a signal with frequency; the first pulse modulation and frequency shift module is used for generating a detection light pulse containing two frequencies based on the signal with the frequency of 0 and the signal with the frequency of 0; the detection light pulse is used for being injected into a to-be-detected optical fiber to generate Rayleigh backscattered light with two frequencies; the second frequency shift module is used for generating a signal containing the frequency Y. based on the signal containing the frequency Y. The receiving module is used for receiving Rayleigh backscattered light with two frequencies, a signal with the frequency of 1, and a beat frequency signal of the signal with the frequency of 1; the beat frequency signal is used for phase detection; the receiving module comprises a coherent receiver and a data acquisition module. According to the device provided by the embodiment of the invention, two sets of coherent receivers and acquisition modules required in a traditional dual-wavelength scheme are simplified into one set, and the hardware complexity and equipment cost of the system are remarkably reduced while an equivalent measurement function is maintained.

The present application discloses a host partition management architecture, server and method, which relate to the field of computer technology. The management unit is also divided into multiple management partitions, corresponding to the host partitions of the server, and the host and the management unit are connected through a logical processing unit. The logical processing unit is responsible for data interaction between the host and the management unit. In this way, interface expansion can be achieved through the logical processing unit to provide sufficient interfaces to the target devices of the multiple host partitions of the host, meeting the target device requirements of the multiple host partitions. In addition, the present application only requires one management unit to implement host partition management, thereby reducing hardware complexity, cost and resource waste. In addition, the logical processing unit of the present application can implement logical processing, and the management partition does not need to perform complex logical processing, thereby reducing the design complexity of the management partition, shortening its production cycle and reducing its cost.

The invention discloses a polar code coding method and device, relates to the technical field of communication, and aims at enabling different numbers of information bit sequences to construct polar codes based on the same reliability sequence and a first matrix, reducing the hardware complexity and improving the decoding performance. The method comprises the steps of mapping an information bit sequence with the length of k to k bits of a first sequence with the length of N according to a reliability sequence with the length of N to obtain a second sequence comprising k information bits, x PC bits and N-k-x frozen bits, multiplying the second sequence by a first matrix to obtain a third sequence, and performing polarization coding to obtain a fourth sequence. K < = K < = N, 1 < = x, K is the maximum value of the length of the information bit sequence, k, K, N and x are positive integers, all the parts below the diagonal lines of the first matrix are 0, all the diagonal lines are 1, the column weight of the column corresponding to the PC bit in the first matrix is greater than 1, the column weight of the column corresponding to the frozen bit or the information bit is equal to 1, and the number of the columns with the column weight greater than 1 is smaller than or equal to N-K.

The present application relates to steel wire rope state detection technical field, especially in kind based on event compensation correction steel wire rope diameter measurement method and system, its technical scheme includes imaging module, boundary initial extraction module, dynamic motion estimation module, dynamic correction compensation module and diameter calculation module, the imaging module includes traditional camera, event camera, optical component, synchronous trigger device and beam splitter, the traditional camera is used for collecting the frame image of steel wire rope, the present application relies on the complementary advantages of event camera and traditional camera, through event driven dynamic geometric compensation model, the systematic measurement deviation under dynamic working condition is solved from the mechanism, the breakthrough of quasi-static imaging dependence is broken through, without additional constraint or frame rate promotion, control cost and hardware complexity, avoid signal-to-noise ratio decline and other problems, realize high-precision stable measurement under high speed, vibration working condition, adapt to multi-industrial scene online monitoring, practicality and application value are remarkable.

The invention relates to a Beidou time reinforcement method based on precise positioning, and belongs to the technical field of Beidou time reinforcement methods. Comprising a Beidou receiver module, a ground-based augmentation system module, a real position calibration module, a real position storage module, an FPGA module, a second delay module, an analog switch module and an output module. Through the single-antenna receiving design, the use of a multi-antenna array and a complex signal processing module is avoided, the hardware complexity and the computing resource demand are reduced, the FPGA hardware is adopted to accelerate the real-time calculation of the position deviation, the detection real-time performance is improved, and the method has wide application prospects in high-precision time synchronization and positioning scenes.

The invention relates to the technical field of track traffic safety monitoring, in particular to a track circuit operating characteristic analysis system and method.The track circuit operating characteristic analysis system comprises a traction rail backflow monitoring module used for monitoring line parameters on a lead wire between a choke transformer and a steel rail and extracting 50 Hz components of the line parameters; when the system is used, the absolute value and the flow direction state of rail backflow current are mastered in real time, a rail transmission line mathematical model is utilized, real-time quantitative monitoring of the train shunt state is achieved, and continuous spectrum tracking of a target frequency point is achieved through sliding Fourier transform; the method achieves the purpose of monitoring traction rail backflow, dynamic shunt resistance and adjacent line interference on line at the same time, carries out comprehensive analysis based on monitoring data, facilitates the improvement of the sensitive detection capability of abnormal shunt behaviors, eliminates the influence of adjacent line interference, can achieve multi-frequency-point signal extraction only through one current transformer, and improves the detection efficiency. And the hardware complexity and cost can be reduced.

The invention discloses an MEMS gravity sensor air pressure and temperature decoupling compensation method and system based on frequency response analysis. Placing the MEMS gravity sensor in a preset air pressure and temperature environment, obtaining a plurality of groups of corresponding resonant frequencies and quality factors Q, and constructing a mapping relation between the Q and the air pressure and the temperature; in the operation process of the sensor, the sum Q is measured in real time, and the variable quantity of the ambient air pressure and the temperature is obtained through inversion of the mapping relation; and introducing the variation of the ambient air pressure and the temperature into a compensation correction model, and decoupling and correcting the gravity output of the sensor. According to the method, an external sensor is not needed, inconsistency caused by space position difference is avoided, the system structure is more compact, hardware complexity and power consumption are lower, the long-term stability and measurement precision of the MEMS gravimeter in a complex environment can be remarkably improved, and miniaturization, low power consumption and array application are facilitated.

The utility model relates to the technical field of brushless motor drive circuits, in particular to a high-efficiency non-inductive brushless motor drive circuit structure, which comprises an STM32G030K6T6 micro-control unit and a position signal detection circuit, wherein the position signal detection circuit is used for acquiring position information of a BLDC (brushless direct current) motor and feeding back the position information to the STM32G030K6T6 micro-control unit; a first control end of the STM32G030K6T6 micro-control unit is connected with an inverter circuit through a power driving circuit, and a second control end of the STM32G030K6T6 micro-control unit realizes soft switching of the inverter circuit through a resonance circuit; a hardware protection circuit is arranged between the inverter circuit and the STM32G030K6T6 micro-control unit, and the inverter circuit is connected with the BLDC motor. In practical application, a Hall sensor is replaced by a high-frequency square wave injection method, accurate rotor position detection of the non-inductive BLDC motor is realized, system hardware cost and complexity are reduced, and system robustness is improved. The dependence on an external sensor is reduced by using the resonance circuit, the hardware complexity is reduced, and meanwhile, the switching loss is effectively reduced.

This invention relates to the field of pipeline inspection technology, specifically a stepping, encircling pipeline inspection robot and its inspection method; it includes end plates on both sides and a middle plate in the middle; the two end plates are connected by a connecting rod; the middle plate has a central hole through which the connecting rod passes; a gripper mechanism is connected to the right side of the middle plate and the left side of the end plate located to the right; end grooves are provided inside the end plates; end rope holes are provided through the end grooves on their adjacent sides; central rope holes are provided above and below the central hole, respectively, penetrating the left and right walls of the middle plate; this invention integrates a pipeline clamping mechanism design, which can adapt to various complex pipeline lines in coal mines and improve the obstacle-crossing ability of the pipeline inspection robot; secondly, the inspection robot uses an ultrasonic sensor to achieve efficient reuse of a single device and a single sensor in multiple tasks, reducing hardware complexity and cost, and improving overall operation efficiency through intelligent task switching.

The utility model belongs to the technical field of electronics, and particularly relates to a low-harmonic rectification control circuit which remarkably counteracts low-order harmonics such as five-order harmonics and seven-order harmonics through multi-phase superposition of a phase-shifting transformer, the total harmonic distortion (THD) is lower than 5%, the environmental protection requirement of high-power industrial equipment for a power grid is met, and a control cable has the advantages of low harmonic pollution, low cost and the like. The DSP main control chip is combined with the digital timer, and the serial-to-parallel circuit only needs one PWM pin and three GPIO pins, so that the DSP resource occupation is reduced; the gating circuit adopts a general multiplexer (74HC4051D), so that the hardware complexity is reduced; the drive circuit realizes strong and weak current isolation through the isolation transformer, prevents high-voltage interference from damaging a control chip, improves the system safety, and reduces the maintenance cost of the circuit.

The invention discloses a satellite communication antenna system and method for adaptive beam forming, and relates to the technical field of communication, and the system comprises a dynamic reconfigurable sub-array, a high-speed interconnection bus, a central digital beam forming processor and a beam health monitoring module. The method comprises the following steps: constructing a hybrid beam forming architecture in which a dynamic reconfigurable sub-array and a central processing unit cooperate; sensing a channel state and an interference direction in real time, and generating a composite channel state matrix; calculating and decomposing a global optimal beam weight based on a constraint minimum variance or maximum signal to interference plus noise ratio criterion; an adjustable phase shifter and an attenuator in the driving subarray realize millisecond-level beam pointing reconstruction and null generation; and executing multi-subarray collaborative synthesis and dynamic power distribution. According to the invention, closed-loop adaptive beam optimization can be realized, the power consumption and the hardware complexity are obviously reduced, the spectrum efficiency and the beam precision are improved, and the system robustness is enhanced at the same time.

This invention provides a high-precision calibration system and method for a multi-channel ADC, relating to the field of communication technology. The system includes a digital transmitter, a DAC module, a calibration loop, and a multi-channel ADC module connected sequentially. It also includes a correlation module, a parameter estimation module, and a compensation module. The correlation module is connected to both the digital transmitter and the multi-channel ADC module. The parameter estimation module is connected to both the correlation module and the compensation module. The compensation module is also connected to the multi-channel ADC module. The calibration loop connects the end of the transmit link and the beginning of the receive link. This invention combines the analog and digital domains through the calibration loop, achieving deviation compensation by performing a single cross-correlation operation and parameter estimation on the local reference signal and multiple sub-signals. This method eliminates the need to redesign analog circuits and does not rely on external instruments for calibration. It features low hardware complexity, high stability, and a short estimation cycle, without affecting normal service operation.

A numerical conversion method for a public key cryptography system includes accumulating a first value by using a first modular addition loop according to the first value for generating a second value after a first predetermined loop count is reached, accumulating the second value by using a second modular addition loop according to the second value for generating a third value after a second predetermined loop count is reached, inputting the third value to a Montgomery modular exponentiation function for generating a Montgomery conversion parameter, and converting a first conversion value in an integer domain into a second conversion value in a Montgomery domain.

The application discloses an optical matrix vector multiplier based on a unitary matrix-diagonal matrix decomposition. The multiplier comprises a Mach-Zehnder interferometer array for realizing a synthetic unitary matrix Omega and a modulation unit for realizing a corresponding diagonal matrix Sigma, wherein a target weight matrix M satisfies a decomposition form of M=ΩΣ. The method fuses two unitary matrices required for mapping in a traditional singular value decomposition into a single synthetic unitary matrix Omega, so that a unitary transformation can be completed by only one interferometer array of optical hardware, and a complete matrix multiplication is realized in cooperation with the modulation unit. Through algorithm-hardware collaborative design, the number of basic optical interference units required is significantly reduced, the hardware complexity, manufacturing cost and system power consumption of the optical neural network are greatly reduced while the computing performance is maintained, and an effective solution is provided for efficient optical computing acceleration of artificial intelligence.