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2032 results about "Processing Instruction" patented technology

A Processing Instruction (PI) is an SGML and XML node type, which may occur anywhere in the document, intended to carry instructions to the application. Processing instructions are exposed in the Document Object Model as Node.PROCESSING_INSTRUCTION_NODE, and they can be used in XPath and XQuery with the 'processing-instruction()' command.

System and method for enabling content providers to identify advertising opportunities

A computer implemented method for enabling content providers to identify and customize placement opportunities is disclosed, comprising the steps of processing instructions to customize a pre-existing at least one of an audio and video datastream comprising at least one predefined time interval for content, identifying at least one time interval for a placement opportunity in the at least one of an audio and video datastream; altering at least one characteristic of the at least one time interval for a placement opportunity in accordance with tile instructions; assembling the altered at least one time interval for a placement opportunity and at least one time interval for content into a list that represents an altered at least one of an audio and video datastream; and delivering the list to a distribution system for playing the altered at least one of an audio and video datastream. The at least one time interval for a placement opportunity may distinct from or coincident with the at least one time interval for content. The placement opportunity may be at least one of content and an advertising placement opportunity. The content may be entertainment content comprising at least one of video, audio, and interactive overlays. The at least one characteristic may be the duration of or the number of the at least one time interval for a placement opportunity. The list may be one of a playlist and a schedule.
Owner:COMCAST CABLE COMM MANAGEMENT LLC

Point-to-Point Transaction Guidance Apparatuses, Methods and Systems

The Point-to-Point Transaction Guidance Apparatuses, Methods and Systems (“SOCOACT”) transforms smart contract request, crypto currency deposit request, crypto collateral deposit request, crypto currency transfer request, crypto collateral transfer request inputs via SOCOACT components into transaction confirmation outputs. Also, SOCOACT transforms virtual wallet address inputs via SOCOACT (e.g., P2PTG) components into transaction confirmation outputs. In one embodiment, the SOCOACT includes a point-to-point payment guidance apparatus, comprising, a memory and processor disposed in communication with the memory, and configured to issue a plurality of processing instructions from the component collection stored in the memory, to: obtain a target wallet identifier registration at a beacon. The SOCOACT then may register the target wallet identifier with the beacon and obtain a unique wallet identifier from a migrant wallet source associated with a user at the beacon. The SOCOACT may then obtain a target transaction request at the beacon from the migrant wallet source and commit the target transaction request for the amount specified in the target transaction request to a distributed block chain database configured to propagate the target transaction request across a distributed block chain database network for payment targeted to the target wallet identifier registered at the beacon.
Owner:FMR CORP

Method and system for triggering a debugging unit

A processor core for transitioning a debugging unit between a plurality of operating states in response to an instruction stream is disclosed. The processor core generates trace data as it processes operating signals of the instruction stream. The processor core provides a first trigger event signal to the debugging unit in response to a first trigger instruction signal within the instruction stream that is representative of a triggering instruction to transitions the debugging unit to a base operating state. The processor core provides a second trigger event signal to the debugging unit in response to a second trigger instruction signal within the instruction stream that is representative of a triggering instruction to dynamically store trace data within the memory component of the debugging unit. The processor core provides a third trigger event signal to the debugging unit in response to a third trigger instruction signal within the instruction stream that is representative of a triggering instruction to statically store trace data within the memory component of the debugging unit. Concurrently or alternatively, the processor core can provide one or more of the trigger event signals to the debugging unit as a function of a generated trigger data in response to additional operational instructions within the instruction stream.
Owner:IBM CORP
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