Implementation method of rename table of global register under on-chip multi-processor system framework

A register renaming, on-chip multiprocessor technology, applied in machine execution devices, concurrent instruction execution, etc., can solve the problem of operand transfer, achieve the effect of small area cost, reduce inter-core communication volume, and simple structure

CN101582025AInactive Publication Date: 2009-11-18ZHEJIANG UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Publication Date
2009-11-18
Estimated Expiration
Not applicable · inactive patent

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Abstract

The invention relates to the technical field of on-chip multi-processor system structure, aiming at providing an implementation method of a rename table of a global register under on-chip multi-processor system framework. The method comprises the steps: designing the rename table of the global register; processing the dependency relationship 'writing-after-writing' of command; processing the dependency relationship 'writing-after-reading' of command; acquiring operand; writing back results; and submitting the command. As the rename table of the global register is used by the method, the dependency relationship of the commands of different processors can be recorded, and the dependency of 'writing-after-reading' and 'writing-after-writing' can be solved; the operand of the commands of the different processors can be maintained and transmitted through the rename table of the global register, so that the internuclear communication volume can be reduced; as hardware configuration used by the rename table of the global register is a logical table, the structure is simple, the complexity of hardware is low, the area of the rename table of the global register is only 1% of that of one on-chip processor, and tiny area cost is caused.
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Description

technical field

[0001] The invention relates to the technical field of on-chip multiprocessor architecture, in particular to a method for realizing a global register renaming table under the on-chip multiprocessor architecture. Background technique

[0002] In 1965, when Gordon Moore, one of the founders of Intel Corporation, summed up the growth law of memory chips, he discovered that "the number of transistors in integrated circuits on a microchip doubles every 12 months", which was called "Moore's Law". This law has been challenged many times and has been expressed as doubling every 18 months, and the industry is still following this law.

[0003] The current mainstream process technology has reached the level of 45nm or even 32nm, which is getting closer and closer to the limit of transistor size. How to get rid of the fate of Moore's Law and whether the silicon-based integrated circuit technology can be further developed depends on whether there will be a revolutionary...

Examples

Embodiment Construction

[0030] When implementing the implementation method of the global register renaming table under the multi-core system architecture, the dependency between instructions is considered.

[0031] Table 1 is an application example of the global register renaming table proposed by this method.

[0032] logic register

physical register

processor number

Busy

ready

data

R0

P3

3

1

1

0x321f6a46

R1

-

-

0

-

-

R2

P13

3

1

0

-

R3

P5

2

1

1

0x2684742a

R4

-

-

0

-

-

R5

P21

0

1

1

0x73128c4e

...

...

...

...

...

...

[0033] 1) Design of register renaming table

[0034] Each of the four on-chip processors has its own list of available physical registers, and jointly has a register renaming table, call...