Implementation method of rename table of global register under on-chip multi-processor system framework

Abstract

The invention relates to the technical field of on-chip multi-processor system structure, aiming at providing an implementation method of a rename table of a global register under on-chip multi-processor system framework. The method comprises the steps: designing the rename table of the global register; processing the dependency relationship 'writing-after-writing' of command; processing the dependency relationship 'writing-after-reading' of command; acquiring operand; writing back results; and submitting the command. As the rename table of the global register is used by the method, the dependency relationship of the commands of different processors can be recorded, and the dependency of 'writing-after-reading' and 'writing-after-writing' can be solved; the operand of the commands of the different processors can be maintained and transmitted through the rename table of the global register, so that the internuclear communication volume can be reduced; as hardware configuration used by the rename table of the global register is a logical table, the structure is simple, the complexity of hardware is low, the area of the rename table of the global register is only 1% of that of one on-chip processor, and tiny area cost is caused.

Description

technical field [0001] The invention relates to the technical field of on-chip multiprocessor architecture, in particular to a method for realizing a global register renaming table under the on-chip multiprocessor architecture. Background technique [0002] In 1965, when Gordon Moore, one of the founders of Intel Corporation, summed up the growth law of memory chips, he discovered that "the number of transistors in integrated circuits on a microchip doubles every 12 months", which was called "Moore's Law". This law has been challenged many times and has been expressed as doubling every 18 months, and the industry is still following this law. [0003] The current mainstream process technology has reached the level of 45nm or even 32nm, which is getting closer and closer to the limit of transistor size. How to get rid of the fate of Moore's Law and whether the silicon-based integrated circuit technology can be further developed depends on whether there will be a revolutionary...

AI Technical Summary

Problems solved by technology

Single-threaded programs require complex superscalar out-of-order execution cores to re-divide the instruction-level parallelism of mining programs and greatly improve performance, but such complex cores are difficult to implement on chip multi-processor architectures

[0006] One method is to make single-threaded programs execute on multiple cores, but a big problem faced by this method is how to deal with the dependencies of instructions between different cores, and how to transfer operands between different cores

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