127 results about "Hardware structure" patented technology

The invention relates to the technical field of integrated circuit design and artificial intelligence hardware acceleration, and particularly discloses a quantization precision adaptive switching hardware acceleration architecture. Hardware is divided into a static area and a dynamic area, wherein the static area comprises a pre-processing module, a post-processing module, a control module and a reconfigurable logic loading control block which run all the time; the dynamic region bears a quantization and inverse quantization module composed of a plurality of reconfigurable logic units. The method is characterized in that a model precision instruction is analyzed through a control module, and a reconfigurable logic file with corresponding precision is dynamically loaded to a dynamic area from external starting equipment by a loading control block according to an internal address mapping table, so that seamless switching of different quantization precision is realized on the hardware level, and the whole chip does not need to be burnt again. According to the design, through a modularized and reconfigurable hardware structure, the limitation of fixed-precision hardware in coping with diversified AI models is effectively solved, and the deployment flexibility and energy efficiency are remarkably improved.

The invention provides a storage and calculation integrated structure and a chip, and belongs to the technical field of integrated circuits, and the storage and calculation integrated structure comprises at least one near storage core grain which is used for providing large-capacity storage; the in-memory computing unit is used for providing computing processing, and the near-memory core grains provide cache space for data and / or instructions processed by the in-memory computing unit; the at least one logic processing core particle is used for loading the data and / or instructions stored in the near memory core particle into the in-memory computing unit, and updating and storing the data and / or instructions processed by the in-memory computing unit into the near memory core particle; and the logic processing core particle is integrated with the near memory core particle and the in-memory computing unit through hybrid bonding and / or TSV (Through Silicon Via). The storage and calculation integrated structure is applied to high-performance calculation, the high-performance calculation requirement and the large-capacity storage requirement can be met at the same time, the high-performance calculation of the system is maximized, and support is provided for the development of the calculation power technology from the hardware structure.

The embodiment of the invention discloses a thread synchronization method, device, processing unit and system. Wherein the processing unit comprises a shared memory, a thread beam scheduler and an asynchronous acceleration unit. The shared memory is configured to update an internally stored target synchronization barrier based on the barrier update request, and in response to detecting that the target synchronization barrier satisfies a release condition, send thread wake-up information to the thread beam scheduler. The thread beam scheduler is configured to execute a thread sleep operation based on the arrival state of each target thread and trigger a first update request for the target synchronization barrier, and execute a thread wake-up operation based on the thread wake-up information in response to receiving the thread wake-up information. The asynchronous acceleration unit is configured to trigger a second update request for the target synchronization barrier based on a completion state of each target asynchronous transaction operation. According to the embodiment of the invention, the synchronization between the threads and between the threads and the asynchronous transaction operation can be realized on the premise of not introducing too many hardware structures.

The application discloses a method and device for processing bus data, electronic equipment and a storage medium. The method comprises the following steps: obtaining configuration information associated with a plurality of caches, the plurality of caches are respectively included in a plurality of controllers of a controller group; if the receiving switching function of the controller group is turned on, the first controller in the controller group starts to receive transmission data from the bus according to the configuration information, and stores the first part of data in the transmission data into the first cache corresponding to the first controller; the second controller in the controller group continues to receive the transmission data according to the configuration information, and stores the second part of data in the transmission data into the second cache corresponding to the second controller. The application does not change the hardware structure design, expands the cache space by replacing the change of the physical structure with the virtual integration, provides more deep cache space, so that the data in the bus network can be cached in time, and the data accumulation in the bus network is avoided.

The application discloses an edge computing processing system based on a regional comprehensive energy station, and the edge computing processing system comprises a data input module, a data processing module, a storage module, a communication module and a power conversion module; the data input module converts analog flow from the regional comprehensive energy station into data information; the data processing module performs task distribution on the data information in a time sequence pipeline mode; the storage module stores and calls the task distribution; the communication module transmits the task distribution to a server; and the power conversion module is used for supplying power to the edge computing processing system; wherein the neural network operation module comprises an input buffer unit, an intermediate calculation buffer unit, an average pooling unit, a control unit and a convolution operation unit; and the application solves the technical problems of complex hardware structure of an edge computing terminal and slow data processing task in the prior art.

The invention relates to the technical field of integrated circuits and computer hardware structures, and particularly discloses a transmission error positioning method, a control circuit, a main device and a bus system.The method comprises the steps that a transmission request from the main device is received; the transmission request comprises a transmission address and a transaction identifier; in response to the transmission request, converting the transmission address into a corresponding slave device identifier through hardware address decoding logic; storing a transaction identifier of the transmission request and a slave device identifier in an idle entry of a cache structure; receiving a transmission response from the interconnect fabric or the slave device; the transmission response comprises a transaction identifier and a response state; searching an entry matched with the transaction identifier in the transmission response in the cache structure; and when the item matched with the transaction identifier in the transmission response is found and the response state indicates that the response is wrong, latching the slave device identifier in the matched item. According to the scheme, transmission error positioning can be realized in a bus system supporting advanced transmission.

The embodiment of the application discloses a kind of diagnostic process abnormality monitoring method, device, medium, OBD module and vehicle;Based on abnormality monitoring method, the leakage failure that can occur in fault diagnosis process is included in the main object of monitoring, by the signal monitoring of the object to be monitored, especially the signal monitoring of the evaporation system of fuel vehicle, on the basis of analyzing signal characteristics, with existing hardware structure, the abnormality monitoring of fault diagnosis system is realized;In addition, the related scheme is also applicable to the development of computer storage medium, OBD module and intelligent vehicle, and the upgrading of original system can be conveniently realized by the upgrading of control software.

The invention discloses an acoustic detection method based on acoustic difference, an acoustic difference device and an acoustic detection system. The method comprises the following steps: providing at least one acoustic differential pair; the acoustic differential pair comprises a first piezoelectric sensing unit and a second piezoelectric sensing unit which are opposite in polarization direction. Detecting an acoustic signal by using the acoustic differential pair to obtain an acoustic differential signal; wherein the acoustic differential signal comprises two paths of electric signals; the two paths of electric signals are obtained by carrying out acoustic-electric conversion on acoustic signals by the first piezoelectric sensing unit and the second piezoelectric sensing unit; and transmitting the acoustic differential signal to a differential processing module for differential operation so as to suppress the external noise coupled to the transmission path and obtain a detection signal after noise suppression. According to the method, external noise can be suppressed from a signal source without depending on a complex hardware structure or a software algorithm, and the signal-to-noise ratio, the measurement precision and the robustness of the piezoelectric sensing system in complex environments such as strong electromagnetic interference and mechanical vibration are remarkably improved.

The invention discloses a tidal current direction judgment method and system, an electric energy meter, a fusion terminal and a medium, relates to the technical field of electric power metering, and effectively solves the problem of electric energy mismetering caused by the fact that a traditional metering method cannot distinguish transient fluctuation and stable steering when the tidal current direction is frequently switched by introducing a buffer mechanism and stability monitoring. According to the method, transient tidal current direction change caused by instantaneous disturbance or jitter near a critical point in a power grid can be filtered out, and it is ensured that only the tidal current direction subjected to stable judgment is used for electric energy metering, so that the accuracy and reliability of electric energy metering in a distributed power supply access scene are remarkably improved; the method is mainly a software algorithm innovation, the hardware structure of the existing electric energy meter or fusion terminal does not need to be changed, the method can be realized through firmware upgrading, the implementation cost is low, and the compatibility is high.

This utility model relates to a timer switch with categorized timing functionality, aiming to solve the technical shortcomings of existing single timer switches, which suffer from cumbersome user operations and inability to quickly switch between different timing schemes due to rigid timing configuration management when adapting to different loads or application scenarios. This utility model's timer switch features innovative improvements in hardware structure. Through the coordinated operation of its internal data management mechanism and user command response mechanism, it achieves categorized storage and one-click overall switching of multiple independent timing schemes. Users only need a simple selection operation to quickly switch the timer switch between different preset working modes, greatly improving its adaptability to multiple loads and application scenarios, enhancing user experience, and avoiding the hassle of repeatedly modifying specific timing parameters.

The present application relates to a dual-thermostat port expansion method and apparatus, a device, and a computer-readable medium. The method comprises: on the basis of a user requirement, configuring port functions corresponding to signal output ports of a main thermostat and a secondary thermostat; determining whether a data flag bit of a port function exists in a communication protocol between the main thermostat and the secondary thermostat; if the data flag bit of the port function exists in the communication protocol between the main thermostat and the secondary thermostat, transmitting the data flag bit to the secondary thermostat by means of the main thermostat on the basis of the communication protocol; executing logic of the port function by means of the secondary thermostat, to determine opening and closing of the signal output port corresponding to the port function; if the data flag bit of the port function does not exist in the communication protocol between the main thermostat and the secondary thermostat, executing the logic of the port function by means of the main thermostat, to determine opening and closing of the signal output port corresponding to the port function; and if the port function is configured on the secondary thermostat, synchronizing a signal state of the port function with the secondary thermostat. The present application solves the technical problem of the expansion of functional ports of two thermostats only being able to be implemented by means of changing a hardware structure, resulting in increased expansion costs and inconvenience.

The invention provides an electronic tag auxiliary sorting method and system based on a decentralized search algorithm, and the method comprises the steps: constructing a double-segment two-layer coding representation scheduling scheme, and randomly generating an initial population based on a preset constraint condition; calculating the maximum completion time of each individual in the initial population in combination with simulation based on a hardware structure of the sorting system, and taking the reciprocal of the maximum completion time as a fitness value; sorting according to fitness values, and screening out high-quality and diversified individuals to form a reference set; combining a high-quality solution and a diversity solution in the reference set as a parent to perform interlace operation to generate a filial generation individual, and updating a population and reconstructing the reference set according to the filial generation individual; and after multiple rounds of iteration, taking the individual with the highest fitness value as a global optimal solution, and decoding the global optimal solution into a control instruction to execute sorting. Through the global collaborative optimization framework, the problems of turnover box sorting and sorting order distribution separation are solved, sorting order dynamic balanced distribution is achieved, uneven load of a sorting table is avoided, and the dynamic adaptability and overall efficiency of the system are remarkably improved.

The application discloses a test circuit, a test device and a test tool, and relates to the technical field of battery testing, wherein the test circuit comprises a first test loop, a second test loop, an isolation module, a switching module and a control module; the first test loop is used for connecting a first test module and each to-be-tested component respectively; the second test loop has a first line and a second line, and the isolation module is arranged in series in the second line; in a first mode, the first test module is connected to each to-be-tested component through the first test loop; in a second mode, the first line is connected to each to-be-tested component through the first test loop; the control module controls the isolation module to be in an isolation state and the switching module to work in the first mode in response to a high-voltage test instruction, and controls the isolation module to be in a conduction state and the switching module to work in the second mode in response to a low-voltage test instruction. The application aims to optimize the topological design of the test circuit, so as to reduce the redundancy of the hardware structure.

The application discloses a kind of conversion method and system of timing sampling data to whole cycle sampling data, and the present application obtains the timing sampling time based on the keying position moment when obtaining keying position moment by timing sampling, according to the timing sampling time and the vibration signal of timing sampling, obtains the vibration signal of whole cycle sampling, effectively realizes the conversion of timing sampling data to whole cycle sampling data, can make timing sampling acquisition system realize whole cycle sampling function, and the present application can be realized by software, without changing the hardware structure of timing sampling acquisition system, without increasing hardware investment.

The application discloses a routing root node dynamic adjustment method and device, electronic equipment and computer readable medium, wherein the method comprises the following steps: receiving a new routing entry, and analyzing the network prefix and the mask length of the routing entry; calculating the corresponding theoretical root node index of the routing entry in the hardware structure based on the mask length; querying the allocated root node list to determine whether the theoretical root node has been allocated; when the theoretical root node has been allocated, adding the routing entry to the sub-table item under the corresponding root node; when the theoretical root node has not been allocated, executing a conflict detection algorithm, traversing all allocable root nodes, and selecting the optimal root node; marking the optimal root node as allocated, and adding the routing entry to the sub-table item under the optimal root node. The application solves the problem that, under the traditional fixed root node allocation scheme, routing entries with different prefix lengths (Prefix-Len) cannot balance the use of hardware table item resources, thereby limiting the overall routing capacity.

The application belongs to the field of information security and encryption and decryption technology, and particularly relates to a register-based data parallel encryption and decryption method and system, which takes a register bit width as a blocking unit, realizes parallel encryption and decryption of multiple data, converts Montgomery domain into a single instruction for complex operations such as binary fast power, avoids repeated execution of instruction sequences of high-frequency operations, further improves execution efficiency, greatly reduces total operation cycles, supports encryption and decryption requirements of any bit width such as 1024 bits, 2048 bits and 4096 bits, and does not need to redesign hardware structures for different bit widths, and has good flexibility, stability and scalability.

The invention belongs to the technical field of optical detection, and particularly relates to an automatic light-blocking and light-releasing device, an operating system and a using method thereof.The automatic light-blocking and light-releasing device is simple in hardware structure, the automatic light-blocking and light-releasing operating system is convenient to operate, a digital signal is sent to a motion control card through an upper computer, and the motion control card converts the digital signal into an electric signal and sends the electric signal to a driver; the driver converts the pulse signal into a pulse signal and sends the pulse signal to the stepping motor, and the stepping motor rotates by a certain angle according to the received pulse signal instruction; the device is connected with the motor output shaft through the baffle, the motor output shaft rotates, the baffle rotates along with the motor output shaft, and therefore the light blocking purpose is achieved; a complex control function is realized through programming of an upper computer and pre-configuration of parameters of a complex functional module, and the defects of a traditional method are overcome; multi-axis cooperative control is supported, and the device is suitable for automatic blocking of multiple paths of laser; the device has the advantages of small occupied space, high efficiency and rich functions.

The invention discloses a locomotive pneumatic rearview mirror performance detection tool and method, and belongs to the technical field of rail locomotive overhaul, the locomotive pneumatic rearview mirror performance detection tool comprises a hardware structure and a control system, the hardware structure comprises a rearview mirror fixing tool, a clamping structure, an angle detection module, a switching power supply, a sensor, an S7-200PLC, an MCGS embedded configuration touch screen and an electromagnetic valve; the control system adopts a framework of'an upper computer and a lower computer ', the lower computer is an S7-200PLC, and the upper computer is an MCGS embedded configuration touch screen. The device has the advantages that the device is simple in structure and convenient to operate, the problem of low efficiency of repeated disassembly and assembly is solved, flexible programming configuration of test parameters such as the cycle index, the reciprocating time and the angle threshold value is supported, and when the angle exceeds a set range, the system automatically triggers an alarm; the touch screen displays test state information such as movement times, a current angle, clamping stagnation alarm and the like in real time, so that an operator can master the test progress in real time conveniently.

According to the multifunctional hot backup underwater robot guarding equipment and method, a double-board-card parallel hot backup working mode with the same hardware structure is adopted, special handshake communication and fault monitoring switching logic are combined, it is ensured that when any single board fails, the guarding function can be seamlessly replaced by the other board card in the second level, and the safety of a guarding system is guaranteed. And meanwhile, the water leakage detection function, the external communication monitoring function, the multi-path driving output function and the like are integrated. According to the device and the method, the reliability of an underwater unattended task can be effectively improved, and the equipment application field is expanded.

The invention discloses a new energy automobile electric driving method and an electric driving device structure. A multi-phase alternating current output end of an MCU motor control unit is connected to a circuit structure formed by connecting stator windings of EM driving motors in series in a split-phase mode, and a common-mode rotating magnetic field is generated; all the rotors generate electromagnetic torque output and mutual coupling effects through the split-phase series circuit structure and the common-mode rotating magnetic field, and native self-coupling and driving are achieved. The problems of poor adaptive capacity, complex software and hardware structure, poor reliability, high cost and the like of a scheme for forcibly controlling the rotating speed of each EM driving motor in the distributed electric driving system by depending on an external software algorithm in the prior art are solved.

This application relates to the field of data processing, and in particular to a data processing apparatus, method, device, and chip. In this apparatus, a controller module receives a task selection signal from a task request terminal and determines the target task to be executed by the task execution unit based on the task selection signal. The task execution unit selects the corresponding hardware processing module based on the target task to construct the corresponding target task path. The task execution unit receives data to be processed and inputs the data into the target task path to start the target task and obtain the task execution result. The result reading module outputs the task execution result to the task request terminal. This apparatus adapts to the computational needs of various polynomial multiplication tasks through task selection signals and dynamically combined hardware processing modules, improving the scalability of the hardware structure and increasing resource utilization.

The invention discloses a resource optimization method and system for decision making of a main processor and scheduling in an audio processor. The method comprises the following steps: acquiring processor load information when the audio processor performs audio processing on multiple audio input channels and channel feature information of each audio input channel; when the processor load information meets a preset load condition, the main processor determines an adjustment result of audio processing configuration according to a preset resource optimization rule based on the processor load information and the channel feature information; the main processor generates and sends a control instruction to the audio processor according to the adjustment result; and the audio processor updates the sound mixing routing relationship in the internal scheduling according to the control instruction, and carries out switching or intensity adjustment on the processing link of each channel according to the processing algorithm configuration. According to the technical scheme, the continuity and the stability of conference audio processing are improved on the premise of not changing a hardware structure.

The application relates to the field of integrated circuit design and artificial intelligence hardware acceleration technology, and particularly discloses a kind of quantization precision adaptive switching hardware acceleration architecture.The application divides hardware into static area and dynamic area: the static area includes always running pre-processing, post-processing, control module and reconfigurable logic loading control block;The dynamic area carries the quantization and dequantization module composed of a plurality of reconfigurable logic units.The innovation lies in that the model precision instruction is parsed by the control module, the reconfigurable logic file of the corresponding precision is dynamically loaded from the external starting device to the dynamic area by the loading control block according to the internal address mapping table, so that seamless switching of different quantization precision is realized at the hardware level, and the whole chip does not need to be reprogrammed.The design effectively solves the limitations of fixed-precision hardware when dealing with diversified AI models through the modular and reconfigurable hardware structure, and significantly improves the deployment flexibility and energy efficiency.

The invention provides a parameter-adaptive binocular stereoscopic vision sensor and a design method, and belongs to the technical field of sensors. The parameter-adaptive binocular stereoscopic vision sensor comprises a hardware structure and a system mathematical model; according to the hardware structure, two two-dimensional galvanometers are used for simulating an adjusting mechanism of two eyeballs of a person, and the hardware structure is combined with a high-speed camera to form two virtual cameras capable of flexibly adjusting angles in real time; the system mathematical model is a mathematical model for conversion from mirror surface parameters to structure parameters. According to the invention, a software and hardware structure framework of a sensor system is established, and the form and mechanism of the sensor are clear; and then a complete sensor mathematical model including a structural parameter analysis model and a structural parameter nonlinear model is established, and a mathematical basis is provided for sensor application.

An information handling system operating capacitive sensor pads based on chassis orientation may comprise a touch input sensing hardware structure including top and side capacitive sensor pads formed under a base chassis exterior touch input top surface and internal to a base chassis sidewall input surface, respectively, each with a grounding layer and active shielding layer. A capacitive sensor microprocessor operably coupled to the top and side capacitive sensor pads executing machine readable code instructions to disable the side capacitive sensor pads when a chassis positional configuration sensor detects that the clamshell chassis is in an open configuration and to disable the top capacitive sensor pads when the clam shell chassis is in a closed configuration to adjust detection of a capacitive change from user interaction with the base chassis for identifying a user input of an input / output command for an input / output device.

The utility model provides a special screwdriver which is used for enabling a dexterous hand to achieve screwing operation and comprises a shell, a double-thread screw and a reset mechanism, and a supporting plate is arranged in the shell. A double-spiral groove is formed in the supporting plate in a penetrating mode and composed of two sets of spiral grooves opposite in spiral direction. The double-thread screw can move up and down along the double-spiral groove, and two groups of threads with opposite spiral directions are arranged on the double-thread screw; the reset mechanism is arranged between the supporting plate and the double-thread screw and used for resetting the double-thread screw after the double-thread screw moves up and down along the double-spiral groove. The special screwdriver designed by the utility model can be used for screwing or unscrewing a screw, a motor is not needed, the screw can be screwed or unscrewed only by controlling a dexterous hand to simply move close to and far away from the screw, the hardware structure is simple, software does not need to be independently embedded for matched movement, the cost is reduced, and the working efficiency is improved. And popularization and application of the dexterous hand are facilitated.

The invention relates to the technical field of artificial intelligence acceleration, and discloses a DRAM-architecture-free large language model reasoning system and method based on an NAND flash memory, the DRAM-architecture-free large language model reasoning system is composed of a calculation unit array, a micro-cache, a flash memory interface controller, a storage arrangement engine and the NAND flash memory, a DRAM component is thoroughly omitted, and the calculation unit array is not influenced by the micro-cache. The model weight, the KV Cache and other core data are all stored in the NAND flash memory; an efficient direct connection data path is constructed through technologies such as calculation perception storage layout, KV Cache partition optimization, intelligent prefetching and self-adaptive error correction. According to the scheme, the hardware cost and power consumption are effectively reduced, the hardware structure is simplified, large-scale model off-line reasoning is supported, end side and edge calculation scenes are adapted, and reliability and practicability are achieved.

Example implementations according to the present disclosure include a device for securing diagnostic data relating to the operation of a computing unit, wherein the device has an interface and a securing unit. The interface is configured to obtain the diagnostic data of the computing unit. The securing unit is formed as a hardware structure that can be operated separately from the computing unit. Furthermore, the securing unit is configured to secure the diagnostic data using session keys and to provide a change between session keys (re-keying) independently of the operation of the computing unit.

This application provides a control method for robots, comprising: acquiring a preset electromagnetic map, the preset electromagnetic map including a first electromagnetic interference region; acquiring a first position of the robot; determining, based on the preset electromagnetic map and the first position, whether the first position is located within the first electromagnetic interference region; and, if the first position is located within the first electromagnetic interference region, acquiring a first navigation path, the first navigation path not passing through the first electromagnetic interference region. Thus, this application does not require modifications to existing hardware structures; by optimizing sensor data processing methods and autonomous decision-making logic, it can improve the robot's environmental adaptability and system robustness in electromagnetic interference scenarios.

The invention discloses a software-based high-real-time integrated waveform processing method, which selects a signal with good self-correlation performance and certain Doppler frequency shift resistance as a detection signal, integrates communication information into detection signals in different arrangement modes, realizes detection and communication integration, and solves the problems that the existing integrated waveform is complex in design and high in reliability. The problem of difficulty in signal generation and processing at a hardware end is solved; meanwhile, an integrated waveform software processing framework based on Radarlab is provided, a multi-thread parallel acceleration mode and a multi-component distributed acceleration mode are adopted, multi-thread core binding processing is carried out on a single module to carry out parallel calculation, and the calculation and throughput time of the module is shortened; all processing modules are distributed on a plurality of board cards, the performance of different boards is fully utilized, the calculation time is shortened, the problems that an integrated system is complex in hardware structure, low in reusability and long in development time are solved, and software high-real-time processing of integrated waveforms is achieved.