196 results about "Hardware structure" patented technology

The invention relates to the technical field of integrated circuit design and artificial intelligence hardware acceleration, and particularly discloses a quantization precision adaptive switching hardware acceleration architecture. Hardware is divided into a static area and a dynamic area, wherein the static area comprises a pre-processing module, a post-processing module, a control module and a reconfigurable logic loading control block which run all the time; the dynamic region bears a quantization and inverse quantization module composed of a plurality of reconfigurable logic units. The method is characterized in that a model precision instruction is analyzed through a control module, and a reconfigurable logic file with corresponding precision is dynamically loaded to a dynamic area from external starting equipment by a loading control block according to an internal address mapping table, so that seamless switching of different quantization precision is realized on the hardware level, and the whole chip does not need to be burnt again. According to the design, through a modularized and reconfigurable hardware structure, the limitation of fixed-precision hardware in coping with diversified AI models is effectively solved, and the deployment flexibility and energy efficiency are remarkably improved.

The invention discloses an instruction splitting method and device, electronic equipment, a storage medium and a computer program product. The method comprises the steps that a target instruction set and first information are obtained, the target instruction set comprises one or more to-be-split instructions and second information of each to-be-split instruction, and the first information comprises related information of a hardware structure of a target processor; the second information is at least used for indicating first input data and first output data of the to-be-split instruction; aiming at each to-be-split instruction contained in the target instruction set, based on the second information, splitting the to-be-split instruction into a plurality of micro-operations, and enabling second input data and second output data of each micro-operation to meet a first condition which is associated with a hardware structure of the target processor.

The invention provides a light spot detection visualization device and method, and aims to solve the problems of insufficient precision and insufficient interactivity of a traditional fluorescent color developing card in light spot detection. The device is composed of a detection array, a display module and a central controller, the detection array adopts the design of combining a PCB circuit substrate and a colloid quantum dot coating layer, and efficient photoelectric conversion and signal processing are achieved; the central controller analyzes the collected digital signals through an advanced algorithm, so that parameters such as the position and the size of the light spot are accurately calculated, and results are output to the display module to achieve visualization. According to the method, through electrode array partitioning and signal processing flow optimization, the detection efficiency is remarkably improved, and the cost is reduced. The core innovation point of the invention is that a unique hardware structure is combined with an intelligent algorithm, a low-cost and efficient solution is provided for a light spot detection technology, and the technical progress in the field is promoted.

The invention provides a storage and calculation integrated structure and a chip, and belongs to the technical field of integrated circuits, and the storage and calculation integrated structure comprises at least one near storage core grain which is used for providing large-capacity storage; the in-memory computing unit is used for providing computing processing, and the near-memory core grains provide cache space for data and / or instructions processed by the in-memory computing unit; the at least one logic processing core particle is used for loading the data and / or instructions stored in the near memory core particle into the in-memory computing unit, and updating and storing the data and / or instructions processed by the in-memory computing unit into the near memory core particle; and the logic processing core particle is integrated with the near memory core particle and the in-memory computing unit through hybrid bonding and / or TSV (Through Silicon Via). The storage and calculation integrated structure is applied to high-performance calculation, the high-performance calculation requirement and the large-capacity storage requirement can be met at the same time, the high-performance calculation of the system is maximized, and support is provided for the development of the calculation power technology from the hardware structure.

The invention discloses a heat dissipation unit control method and electronic equipment, and relates to the technical field of heat dissipation unit control, and the method comprises the steps: obtaining acoustic signals and vibration signals of a heat dissipation unit in a server in various operation states, and determining a baseline embossing feature and a resonance frequency spectrum of the heat dissipation unit, so as to establish a heat dissipation acoustic archive; acquiring and analyzing a real-time acoustic signal and a real-time vibration signal of the heat dissipation unit to obtain a real-time embossing feature and a real-time frequency spectrum, and judging whether the running state of the heat dissipation unit is abnormal or not; in response to abnormal operation of the heat dissipation unit, judging whether the heat dissipation unit has a resonance risk or not; and in response to existence of the resonance risk, generating a fusion adjustment instruction based on the feature comparison result and the spectrum comparison result. The operation state of the heat dissipation unit can be sensed in real time and pre-controlled, the resonance risk and the abnormal state are avoided, noise is reduced, and the problems that noise control lags behind, depends on hardware structure modification and cannot avoid the resonance risk in advance in the prior art are solved.

The embodiment of the invention discloses a thread synchronization method, device, processing unit and system. Wherein the processing unit comprises a shared memory, a thread beam scheduler and an asynchronous acceleration unit. The shared memory is configured to update an internally stored target synchronization barrier based on the barrier update request, and in response to detecting that the target synchronization barrier satisfies a release condition, send thread wake-up information to the thread beam scheduler. The thread beam scheduler is configured to execute a thread sleep operation based on the arrival state of each target thread and trigger a first update request for the target synchronization barrier, and execute a thread wake-up operation based on the thread wake-up information in response to receiving the thread wake-up information. The asynchronous acceleration unit is configured to trigger a second update request for the target synchronization barrier based on a completion state of each target asynchronous transaction operation. According to the embodiment of the invention, the synchronization between the threads and between the threads and the asynchronous transaction operation can be realized on the premise of not introducing too many hardware structures.

The invention relates to an image registration method and device, electronic equipment and a storage medium, and the method comprises the steps: obtaining a first image and a second image obtained through image collection of a target physiological region, the first image data being a three-dimensional image, and the second image being a two-dimensional image; and determining a deformation field describing a mapping relation between the first image and the second image, and performing nonlinear deformation on the first image according to the deformation field to obtain a deformed image. And projecting the deformed image to obtain a two-dimensional third image capable of measuring a registration effect with the second image. According to the embodiment of the invention, through the architecture for image deformation and projection and image registration based on the deep learning automatic learning deformation field, the elastic registration between the images can be simply, quickly and accurately realized. Meanwhile, the image registration mode is realized by depending on a software algorithm without depending on the improvement of a hardware structure, so that the cost is low.

The invention provides a crack pouring glue compression rebound recovery rate test system and method, and relates to the technical field of rebound recovery rate test.The crack pouring glue compression rebound recovery rate test system comprises a tester, a high-precision injection ball and a large sample containing vessel; the tester comprises a machine body, a touch control type control display screen is mounted on an inclined panel of the machine body, a group of function buttons are mounted on the inclined panel of the machine body, the machine body is provided with a stepped circular groove, and the large sample containing vessel is matched with an upper side circular groove of the stepped circular groove; the machine body is connected with a U-shaped frame, and the U-shaped frame is connected with a first laser distance measuring sensor. Aiming at the defects in the prior art, the invention develops the system and the method for testing the compression resilience recovery rate of the crack pouring glue, and the high-precision penetration ball is adopted, so that the contact area with a sample is increased, and the detection error is reduced. By optimizing a hardware structure (replacing a high-precision sensing assembly) and control logic, automation and high precision of a test process are realized.

The invention discloses a self-adaptive limping control method for a quadruped robot under a leg failure condition. The method comprises the following steps that S1, a system monitors the leg motion state of the robot in real time through sensor data; s2, judging whether the leg motion state is abnormal or not based on a preset key detection index, and if yes, executing the step S3; if not, directly executing the step S4 and the like. According to the method, self-adaptive limp control is achieved through algorithm level optimization in the whole process, a monitoring system can be constructed based on an existing sensor, model parameter adjustment and double-layer optimization control are achieved through software updating, and a hardware structure of the quadruped robot does not need to be transformed. The hardware cost of technology landing is reduced, the method can be adapted to different types of quadruped robots, the compatibility is high, and the method is convenient to popularize in existing quadruped robot application scenes such as emergency rescue and industrial inspection.

The application discloses a method and device for processing bus data, electronic equipment and a storage medium. The method comprises the following steps: obtaining configuration information associated with a plurality of caches, the plurality of caches are respectively included in a plurality of controllers of a controller group; if the receiving switching function of the controller group is turned on, the first controller in the controller group starts to receive transmission data from the bus according to the configuration information, and stores the first part of data in the transmission data into the first cache corresponding to the first controller; the second controller in the controller group continues to receive the transmission data according to the configuration information, and stores the second part of data in the transmission data into the second cache corresponding to the second controller. The application does not change the hardware structure design, expands the cache space by replacing the change of the physical structure with the virtual integration, provides more deep cache space, so that the data in the bus network can be cached in time, and the data accumulation in the bus network is avoided.

The application discloses an edge computing processing system based on a regional comprehensive energy station, and the edge computing processing system comprises a data input module, a data processing module, a storage module, a communication module and a power conversion module; the data input module converts analog flow from the regional comprehensive energy station into data information; the data processing module performs task distribution on the data information in a time sequence pipeline mode; the storage module stores and calls the task distribution; the communication module transmits the task distribution to a server; and the power conversion module is used for supplying power to the edge computing processing system; wherein the neural network operation module comprises an input buffer unit, an intermediate calculation buffer unit, an average pooling unit, a control unit and a convolution operation unit; and the application solves the technical problems of complex hardware structure of an edge computing terminal and slow data processing task in the prior art.

The invention relates to the technical field of integrated circuits and computer hardware structures, and particularly discloses a transmission error positioning method, a control circuit, a main device and a bus system.The method comprises the steps that a transmission request from the main device is received; the transmission request comprises a transmission address and a transaction identifier; in response to the transmission request, converting the transmission address into a corresponding slave device identifier through hardware address decoding logic; storing a transaction identifier of the transmission request and a slave device identifier in an idle entry of a cache structure; receiving a transmission response from the interconnect fabric or the slave device; the transmission response comprises a transaction identifier and a response state; searching an entry matched with the transaction identifier in the transmission response in the cache structure; and when the item matched with the transaction identifier in the transmission response is found and the response state indicates that the response is wrong, latching the slave device identifier in the matched item. According to the scheme, transmission error positioning can be realized in a bus system supporting advanced transmission.

The embodiment of the application discloses a kind of diagnostic process abnormality monitoring method, device, medium, OBD module and vehicle;Based on abnormality monitoring method, the leakage failure that can occur in fault diagnosis process is included in the main object of monitoring, by the signal monitoring of the object to be monitored, especially the signal monitoring of the evaporation system of fuel vehicle, on the basis of analyzing signal characteristics, with existing hardware structure, the abnormality monitoring of fault diagnosis system is realized;In addition, the related scheme is also applicable to the development of computer storage medium, OBD module and intelligent vehicle, and the upgrading of original system can be conveniently realized by the upgrading of control software.

The invention discloses an acoustic detection method based on acoustic difference, an acoustic difference device and an acoustic detection system. The method comprises the following steps: providing at least one acoustic differential pair; the acoustic differential pair comprises a first piezoelectric sensing unit and a second piezoelectric sensing unit which are opposite in polarization direction. Detecting an acoustic signal by using the acoustic differential pair to obtain an acoustic differential signal; wherein the acoustic differential signal comprises two paths of electric signals; the two paths of electric signals are obtained by carrying out acoustic-electric conversion on acoustic signals by the first piezoelectric sensing unit and the second piezoelectric sensing unit; and transmitting the acoustic differential signal to a differential processing module for differential operation so as to suppress the external noise coupled to the transmission path and obtain a detection signal after noise suppression. According to the method, external noise can be suppressed from a signal source without depending on a complex hardware structure or a software algorithm, and the signal-to-noise ratio, the measurement precision and the robustness of the piezoelectric sensing system in complex environments such as strong electromagnetic interference and mechanical vibration are remarkably improved.

The invention discloses a tidal current direction judgment method and system, an electric energy meter, a fusion terminal and a medium, relates to the technical field of electric power metering, and effectively solves the problem of electric energy mismetering caused by the fact that a traditional metering method cannot distinguish transient fluctuation and stable steering when the tidal current direction is frequently switched by introducing a buffer mechanism and stability monitoring. According to the method, transient tidal current direction change caused by instantaneous disturbance or jitter near a critical point in a power grid can be filtered out, and it is ensured that only the tidal current direction subjected to stable judgment is used for electric energy metering, so that the accuracy and reliability of electric energy metering in a distributed power supply access scene are remarkably improved; the method is mainly a software algorithm innovation, the hardware structure of the existing electric energy meter or fusion terminal does not need to be changed, the method can be realized through firmware upgrading, the implementation cost is low, and the compatibility is high.

This invention belongs to the field of computer technology and relates to an angle calculation system based on CORDIC instructions. The system includes an IFU (Instruction Fetch Unit) and an EXU (Execution Unit). During the instruction fetch phase, the IFU reads CORDIC instructions from the instruction memory according to the address of the PC. The EXU includes a decoding module, an arithmetic logic unit, a load-memory unit, and a write-back unit. This invention extends the CORDIC angle calculation instruction set based on the RISC-V architecture and designs a complete pipelined hardware structure, supporting trigonometric function operations. It has a complete CORDIC operation path hardware circuit structure, reusing the same operation path for different operation processes, improving hardware resource utilization. It overcomes the limitation of convergence of the calculation result range when performing angle calculation based on the CORDIC algorithm by pre-storing special angle results to reduce calculation time and optimize the circuit operating frequency.

This utility model relates to a timer switch with categorized timing functionality, aiming to solve the technical shortcomings of existing single timer switches, which suffer from cumbersome user operations and inability to quickly switch between different timing schemes due to rigid timing configuration management when adapting to different loads or application scenarios. This utility model's timer switch features innovative improvements in hardware structure. Through the coordinated operation of its internal data management mechanism and user command response mechanism, it achieves categorized storage and one-click overall switching of multiple independent timing schemes. Users only need a simple selection operation to quickly switch the timer switch between different preset working modes, greatly improving its adaptability to multiple loads and application scenarios, enhancing user experience, and avoiding the hassle of repeatedly modifying specific timing parameters.

The present application relates to a dual-thermostat port expansion method and apparatus, a device, and a computer-readable medium. The method comprises: on the basis of a user requirement, configuring port functions corresponding to signal output ports of a main thermostat and a secondary thermostat; determining whether a data flag bit of a port function exists in a communication protocol between the main thermostat and the secondary thermostat; if the data flag bit of the port function exists in the communication protocol between the main thermostat and the secondary thermostat, transmitting the data flag bit to the secondary thermostat by means of the main thermostat on the basis of the communication protocol; executing logic of the port function by means of the secondary thermostat, to determine opening and closing of the signal output port corresponding to the port function; if the data flag bit of the port function does not exist in the communication protocol between the main thermostat and the secondary thermostat, executing the logic of the port function by means of the main thermostat, to determine opening and closing of the signal output port corresponding to the port function; and if the port function is configured on the secondary thermostat, synchronizing a signal state of the port function with the secondary thermostat. The present application solves the technical problem of the expansion of functional ports of two thermostats only being able to be implemented by means of changing a hardware structure, resulting in increased expansion costs and inconvenience.

The invention provides an electronic tag auxiliary sorting method and system based on a decentralized search algorithm, and the method comprises the steps: constructing a double-segment two-layer coding representation scheduling scheme, and randomly generating an initial population based on a preset constraint condition; calculating the maximum completion time of each individual in the initial population in combination with simulation based on a hardware structure of the sorting system, and taking the reciprocal of the maximum completion time as a fitness value; sorting according to fitness values, and screening out high-quality and diversified individuals to form a reference set; combining a high-quality solution and a diversity solution in the reference set as a parent to perform interlace operation to generate a filial generation individual, and updating a population and reconstructing the reference set according to the filial generation individual; and after multiple rounds of iteration, taking the individual with the highest fitness value as a global optimal solution, and decoding the global optimal solution into a control instruction to execute sorting. Through the global collaborative optimization framework, the problems of turnover box sorting and sorting order distribution separation are solved, sorting order dynamic balanced distribution is achieved, uneven load of a sorting table is avoided, and the dynamic adaptability and overall efficiency of the system are remarkably improved.

The invention provides a consumable rewarming device and system, and the device comprises a rewarming heating module which is used for carrying out the constant-power heating of a built-in electric heating element of a consumable; the temperature acquisition module is used for acquiring the temperature of the consumable target area where the electric heating element is located in real time in the constant-power heating process; and the data processing module is used for dynamically adjusting the output power of the rewarming heating module by adopting a proportional integral differential control algorithm based on the temperature of the consumable target area so as to maintain the temperature of the consumable target area at a preset target temperature. According to the method, the control accuracy of the consumable temperature is improved by adopting the proportional integral differential control algorithm. In addition, constant-temperature control over the consumables is achieved by dynamically adjusting the output power of the rewarming heating module; the hardware structure is optimized through multiplexing of the load detection module and the rewarming heating module; by adopting the high-precision temperature acquisition chip, high-real-time monitoring of the temperature of the consumable is realized.

The invention relates to the technical field of block chains, in particular to identity recognition equipment for a medical block chain, which comprises a quick-release hardware structure consisting of an equipment main body and a bracket structure which can be physically separated, the pupil recognition module is integrated on the equipment main body and is used for completing task positioning and pupil image acquisition in the working area; the hospital end server, the doctor terminal and the cloud block chain system are in communication connection with the equipment main body; compared with an existing static algorithm, the method has the major hidden danger that the algorithm is continuously analyzed and cracked to cause systematic data leakage, and the method has the advantages that equivalent algorithm units are accurately allocated from a dynamic library containing multiple types of encryption algorithms; after each characteristic value is encrypted by an independent algorithm, packaging the characteristic value into a fragmented password string through a key derived tree generated by an equipment IP (Internet Protocol); according to the encryption mechanism based on feature dimension and time efficiency double-factor dynamic reconstruction, an attacker cannot establish an effective decryption model.

The application discloses a test circuit, a test device and a test tool, and relates to the technical field of battery testing, wherein the test circuit comprises a first test loop, a second test loop, an isolation module, a switching module and a control module; the first test loop is used for connecting a first test module and each to-be-tested component respectively; the second test loop has a first line and a second line, and the isolation module is arranged in series in the second line; in a first mode, the first test module is connected to each to-be-tested component through the first test loop; in a second mode, the first line is connected to each to-be-tested component through the first test loop; the control module controls the isolation module to be in an isolation state and the switching module to work in the first mode in response to a high-voltage test instruction, and controls the isolation module to be in a conduction state and the switching module to work in the second mode in response to a low-voltage test instruction. The application aims to optimize the topological design of the test circuit, so as to reduce the redundancy of the hardware structure.

The application discloses a kind of conversion method and system of timing sampling data to whole cycle sampling data, and the present application obtains the timing sampling time based on the keying position moment when obtaining keying position moment by timing sampling, according to the timing sampling time and the vibration signal of timing sampling, obtains the vibration signal of whole cycle sampling, effectively realizes the conversion of timing sampling data to whole cycle sampling data, can make timing sampling acquisition system realize whole cycle sampling function, and the present application can be realized by software, without changing the hardware structure of timing sampling acquisition system, without increasing hardware investment.

The invention discloses a PCH-free USB overcurrent protection system and an ARM hardware structure, the system comprises a mainboard module, the mainboard module comprises a central processor, a first CPLD, a first load switch, a first USB interface and a PCIe-to-USB unit; the central processing unit configures the working mode of the first CPLD; the first CPLD configures an over-current threshold and a first enable signal for controlling the first load switch according to the working mode, and triggers an interrupt signal to the central processing unit or turns off the power supply; the first load switch controls whether the power supply is connected to the first USB interface or not according to the first enable signal; the PCIe-to-USB unit is connected between the central processing unit and the first USB interface, converts a USB signal of the first USB interface into a PCIe signal and transmits the PCIe signal to the central processing unit under the PCIe drive of the central processing unit; or the PCIe signal of the central processing unit is converted into the USB signal to be output to the first USB interface. According to the invention, when no PCH exists in the ARM architecture, the over-current detection of the USB can be realized.

The application discloses a routing root node dynamic adjustment method and device, electronic equipment and computer readable medium, wherein the method comprises the following steps: receiving a new routing entry, and analyzing the network prefix and the mask length of the routing entry; calculating the corresponding theoretical root node index of the routing entry in the hardware structure based on the mask length; querying the allocated root node list to determine whether the theoretical root node has been allocated; when the theoretical root node has been allocated, adding the routing entry to the sub-table item under the corresponding root node; when the theoretical root node has not been allocated, executing a conflict detection algorithm, traversing all allocable root nodes, and selecting the optimal root node; marking the optimal root node as allocated, and adding the routing entry to the sub-table item under the optimal root node. The application solves the problem that, under the traditional fixed root node allocation scheme, routing entries with different prefix lengths (Prefix-Len) cannot balance the use of hardware table item resources, thereby limiting the overall routing capacity.

The application belongs to the field of information security and encryption and decryption technology, and particularly relates to a register-based data parallel encryption and decryption method and system, which takes a register bit width as a blocking unit, realizes parallel encryption and decryption of multiple data, converts Montgomery domain into a single instruction for complex operations such as binary fast power, avoids repeated execution of instruction sequences of high-frequency operations, further improves execution efficiency, greatly reduces total operation cycles, supports encryption and decryption requirements of any bit width such as 1024 bits, 2048 bits and 4096 bits, and does not need to redesign hardware structures for different bit widths, and has good flexibility, stability and scalability.

The invention belongs to the technical field of optical detection, and particularly relates to an automatic light-blocking and light-releasing device, an operating system and a using method thereof.The automatic light-blocking and light-releasing device is simple in hardware structure, the automatic light-blocking and light-releasing operating system is convenient to operate, a digital signal is sent to a motion control card through an upper computer, and the motion control card converts the digital signal into an electric signal and sends the electric signal to a driver; the driver converts the pulse signal into a pulse signal and sends the pulse signal to the stepping motor, and the stepping motor rotates by a certain angle according to the received pulse signal instruction; the device is connected with the motor output shaft through the baffle, the motor output shaft rotates, the baffle rotates along with the motor output shaft, and therefore the light blocking purpose is achieved; a complex control function is realized through programming of an upper computer and pre-configuration of parameters of a complex functional module, and the defects of a traditional method are overcome; multi-axis cooperative control is supported, and the device is suitable for automatic blocking of multiple paths of laser; the device has the advantages of small occupied space, high efficiency and rich functions.

The invention discloses a locomotive pneumatic rearview mirror performance detection tool and method, and belongs to the technical field of rail locomotive overhaul, the locomotive pneumatic rearview mirror performance detection tool comprises a hardware structure and a control system, the hardware structure comprises a rearview mirror fixing tool, a clamping structure, an angle detection module, a switching power supply, a sensor, an S7-200PLC, an MCGS embedded configuration touch screen and an electromagnetic valve; the control system adopts a framework of'an upper computer and a lower computer ', the lower computer is an S7-200PLC, and the upper computer is an MCGS embedded configuration touch screen. The device has the advantages that the device is simple in structure and convenient to operate, the problem of low efficiency of repeated disassembly and assembly is solved, flexible programming configuration of test parameters such as the cycle index, the reciprocating time and the angle threshold value is supported, and when the angle exceeds a set range, the system automatically triggers an alarm; the touch screen displays test state information such as movement times, a current angle, clamping stagnation alarm and the like in real time, so that an operator can master the test progress in real time conveniently.

The invention discloses a half-duplex two-way communication control method and device based on application layer scheduling and a medium, and relates to the technical field of communication, and the method is suitable for a master-slave device system connected through an RS485 and other half-duplex serial communication interfaces, and is especially suitable for a hydrological element measurement probe automatic putting system. According to the invention, by defining a master / slave information role, establishing a priority message queue, setting a master information period sending mechanism and adopting a'following 'sending strategy, a slave end instruction is immediately sent only after receiving a master end effective frame, so that channel conflicts are avoided, and meanwhile, a heartbeat mechanism and an instruction confirmation retransmission mechanism are introduced, so that the transmission efficiency is improved. And the communication stability and integrity are ensured. According to the invention, the hardware structure does not need to be changed, and the reliability and real-time performance of two-way communication of the half-duplex system can be remarkably improved only through software control.

The invention is suitable for the technical field of radar systems, and provides a point cloud data processing method and device, terminal equipment and a storage medium, and the method comprises the steps: mapping an information window of a current point according to point cloud data inputted point by point, the information window being an information window in accordance with a preset format; extracting target information according to the information window; the method comprises the steps of determining a classification result of a current point according to target information, performing algorithm structure optimization on a feature extraction process of point cloud data and a judgment process of noise point cloud, extracting features in the point cloud data point by point in an information window form, and then determining the target information based on the information window. Therefore, whether the current point is the noise point or not is recognized, the point cloud data processing efficiency can be improved, and the point cloud data processing method is easier to implement through improvement of a hardware structure.