Vector floating-point computing device and method based on vector computing

Abstract

The invention discloses a vector-operation-based floating point operational device, which is a novel hardware structure, and comprises a vector processor, a storage device, a vector floating point coprocessor and a vector floating point coprocessor storage device, wherein a bus interface between the vector processor and the vector floating point coprocessor can adopt a general coprocessor bus structure. By adopting the coprocessor, on the basis of ensuring all operations of floating points, the operational speed of the floating points is improved and the design complexity is reduced.

Description

technical field [0001] The invention discloses a vector floating-point calculation device and method based on vector calculation, which improves the speed and precision of the floating-point calculation. Background technique [0002] The operations performed by processors for digital signal processing fall into two main categories: fixed-point and floating-point. Generally speaking, advanced fixed-point arithmetic is fast, consumes little power, and is low-cost, but vector floating-point arithmetic units can provide higher precision and wider dynamic range in hardware. Therefore, in the face of a situation requiring a larger number range or higher resolution, a vector floating-point arithmetic unit is required. [0003] The existing solution for floating-point operations is Intel's "Scalable Parallel Pipeline Floating-Point Unit for Vector Processing" patent, such as figure 1 , the inventive input queue 210 fetches or stores processed vector inputs from a processor unit, a...

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Problems solved by technology

This will inevitably reduce the speed of floating-point operations

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