Vector floating-point computing device and method based on vector computing

A floating-point operation and vector technology, applied in the field of vector floating-point operation devices, can solve problems such as reducing the speed of floating-point operation

Inactive Publication Date: 2011-11-30
孙瑞玮
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This will inevitably reduce the speed of floating-point operations

Method used

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  • Vector floating-point computing device and method based on vector computing
  • Vector floating-point computing device and method based on vector computing
  • Vector floating-point computing device and method based on vector computing

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Embodiment Construction

[0071] The present invention provides a floating-point computing device based on vector computing, such as figure 2 As shown, it includes a vector processor, a memory, a vector floating point coprocessor, and a vector floating point coprocessor memory. The device connects the vector processor and the vector floating point coprocessor through the coprocessor bus.

[0072] The vector floating point coprocessor memory is used to locally store data words used as operands in combination with loaded data words. This scheme takes into account many real-world computing situations. This feature extends the required data path capacity between the vector processor and the vector floating-point co-processing by locally storing frequently needed data words.

[0073] The vector processor includes an instruction storage unit, a data storage unit, an instruction reading and distribution unit, a vector data processing unit, and a vector register group;

[0074] The vector floating-point co...

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Abstract

The invention discloses a vector-operation-based floating point operational device, which is a novel hardware structure, and comprises a vector processor, a storage device, a vector floating point coprocessor and a vector floating point coprocessor storage device, wherein a bus interface between the vector processor and the vector floating point coprocessor can adopt a general coprocessor bus structure. By adopting the coprocessor, on the basis of ensuring all operations of floating points, the operational speed of the floating points is improved and the design complexity is reduced.

Description

technical field [0001] The invention discloses a vector floating-point calculation device and method based on vector calculation, which improves the speed and precision of the floating-point calculation. Background technique [0002] The operations performed by processors for digital signal processing fall into two main categories: fixed-point and floating-point. Generally speaking, advanced fixed-point arithmetic is fast, consumes little power, and is low-cost, but vector floating-point arithmetic units can provide higher precision and wider dynamic range in hardware. Therefore, in the face of a situation requiring a larger number range or higher resolution, a vector floating-point arithmetic unit is required. [0003] The existing solution for floating-point operations is Intel's "Scalable Parallel Pipeline Floating-Point Unit for Vector Processing" patent, such as figure 1 , the inventive input queue 210 fetches or stores processed vector inputs from a processor unit, a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/57G06F9/38
Inventor 孙瑞琛
Owner 孙瑞玮
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