45 results about "Parallel channel" patented technology

The invention provides an instant image printing task scheduling method and system based on dynamic queue management, and relates to the technical field of task scheduling, and the method comprises the steps: deploying a three-level distributed architecture, and sensing the multi-dimensional attributes of production data and video data in real time; based on the system load threshold value and the real-time requirement, the dynamic priority of the data is calculated through a multi-factor weighting formula, and priority factors comprise data freshness, event emergency degree and transmission stability; dynamically recombining the data queue, and dividing the data queue into a real-time analysis pool, a quasi-real-time buffer pool and a background processing pool; adaptive data preprocessing is executed, wherein format standardization, redundancy compression and noise filtering are included; constructing a parallel channel and transmitting data through the optimal path; sHA-256 feature code verification and full link resource recovery are carried out; the system comprises a distributed state sensing module and the like. According to the method, the real-time performance of multi-source data fusion is improved, key events can be processed preferentially, and the factory monitoring efficiency and the resource utilization rate are improved.

The invention discloses an image compression method based on a JPEG-LS (Joint Photographic Experts Group-Least Squares) parallel optimization algorithm, which comprises the following steps: calculating local gradient values of to-be-coded data and then merging to obtain a context index Q value, the to-be-coded data being a prediction error of a current pixel; grouping the data to be coded according to the context index Q value; if the to-be-coded number contained in the key group affects the parallelism degree, a controllable distortion value is introduced into the pixel value of the to-be-coded data by using an equalization algorithm, and the group serial number corresponding to the data in the key group is corrected; deploying processing units of parallel channels with the number equal to that of the groups, and scheduling the grouped data to be coded to the processing units to realize pipeline processing; integrating each group of data into coded and compressed data through code stream splicing; the image compression method based on the JPEG-LS parallel optimization algorithm is used for image compression, the system data size is low, and the satellite-ground transmission bandwidth pressure is small.

The invention relates to the technical field of power load power prediction, and provides a power load power prediction method and system for a sewage plant and a medium, and the method comprises the steps: obtaining the feature data of the sewage plant, including meteorological data, date, water quality data and historical power load power data; the constructed load prediction model comprises a feature extraction layer, an attention fusion layer, a GRU layer and a full connection layer; the feature extraction layer is provided with three parallel CNN channels and an attention fusion layer, and each channel sequentially comprises a plurality of convolution modules. Wherein the first channel inputs meteorological data and date, the second channel inputs water quality data, and the third channel inputs historical power load power data. The output of the three channels enters the GRU layer after being processed by the attention fusion layer, and the output of the three channels passes through the full connection layer to obtain a predicted value of the power load power of the sewage plant. According to the method, multi-type feature information can be effectively fused, and the accuracy of power load power prediction of the sewage plant is improved.

The application provides a method for obtaining a multispectral image through single exposure, an endoscope system and electronic equipment. The method comprises the following steps: obtaining an original image within a single exposure time, wherein the original image is obtained by sequentially imaging a light signal on a main light path of the endoscope system through a lens array and a continuous variable filter; dividing the original image into a plurality of sub-images corresponding to different channels in the lens array, wherein different sub-images correspond to different wave bands and different channel response coefficients; and performing normalization correction on the corresponding sub-images according to the wave bands and the channel response coefficients, so as to eliminate the response difference between different channels and obtain a sequence image of multiple wave bands. Through multiple parallel channels, a plurality of sub-images with different spectral responses are obtained within a single exposure, and the rapid acquisition of multispectral information of an endoscope is realized.

The present disclosure relates to the technical field of graphic processor, and discloses a memory management device and method of multiple parallel channels, electronic equipment, storage medium and computer program product. The device comprises a plurality of parameter stream generators and a target cache shared by the plurality of parameter stream generators. Any parameter stream generator is configured to send a data read request to the target cache, the data read request being used to obtain reference data corresponding to an effective primitive currently required to be processed by the parameter stream generator. The target cache is configured to determine the reference data corresponding to the effective primitive currently required to be processed by the parameter stream generator in response to the data read request of any parameter stream generator, and return the reference data to the parameter stream generator. The present disclosure can perform unified cache management, improve the overall hit rate of data read requests, reduce the interaction times with external storage devices, and improve processing performance.

The invention provides a hybrid private chain and alliance chain-based Internet of Things data security sharing method and system, and belongs to the technical field of block chains, Internet of Things and cloud computing, and the method comprises the steps: deploying a private chain, and taking an alliance chain as a mutual trust coordination layer to achieve registration anchoring and interoperation of multi-chain data; a parallel HTLC channel and a dynamic time lock mechanism guarantee atomic exchange and efficient transmission of cross-chain data, and meanwhile, safe and credible data sharing is realized in combination with multi-party threshold notarization and zero-knowledge proof; the intelligent gateway layer provides protocol adaptation, format conversion, machine learning caching and intelligent access control, and optimizes a data publishing and prefetching process; the light client only reserves a block head and a Merkle index, and incremental verification and multi-path synchronization are carried out; the homomorphic encryption and parallel zero-knowledge proof framework gives consideration to data privacy and on-chain auditing performance, and it is ensured that limiting value judgment and compliance auditing are carried out in a ciphertext state. According to the method, credible, efficient and auditable data cross-chain sharing is realized.

One or more embodiments of the specification provide a retrieval enhancement generation method, device, equipment and storage medium. The method uses multiple parallel channels to retrieve query requests from multiple dimensions respectively; then, according to the time sequence of the return recall content of each channel, the recall content of each channel is pre-filled, wherein the pre-filled result of each channel is stored in the cache device, and the pre-filled result of the channel is obtained according to the pre-filled result cached by the previous channel returning the recall content; finally, according to the pre-filled result of the channel returning the recall content last, the output result of the large language model is obtained. Since the pre-filling is performed according to the time sequence of the return recall content of the channel, the waiting time in the retrieval enhancement generation request process is reduced, and the pre-filled result of the current channel is calculated according to the pre-filled result cached by the previous channel returning the recall content, avoiding repeated calculation in the pre-filling stage.

A memory device comprises a plurality of backend interfaces that are each configured to connect to a respective media device (e.g., DDR, LPDDR DRAM), a plurality of reliability, availability and serviceability (RAS) channel datapaths with each RAS channel datapath connected to one or more backend interfaces, one or more caches that are each connected to at least one RAS channel datapath, and control circuitry. The control circuitry is configured to: in response to receiving a memory access request for a memory location, search a cache of the one or more caches for the requested memory location; and when, in response to the search, the requested memory location is not found in the cache, obtain the requested memory location from a media device connected to the at least one RAS channel datapath. Corresponding methods are also described.

The present invention discloses a multi-channel optical time delay measurement method based on compressive sensing, which is used to simultaneously measure the optical time delays of S reflection points at different positions or S parallel channels in the optical link to be measured, where S is an integer greater than or equal to 3. The method includes the following steps: S1. Intensity modulate an incoherent optical carrier with a microwave swept-frequency signal composed of M frequency points randomly selected from a frequency range with N frequency points to obtain a detection optical signal that is sparse in frequency, where M << N; S2. Let the detection optical signal pass through the optical link to be measured and then perform photoelectric conversion to obtain a microwave signal with sparse frequency carrying time delay information; S3. Use the compressive sensing method to calculate the optical time delay. The present invention also discloses a multi-channel optical time delay measurement device based on compressive sensing. Compared with the prior art, the present invention has the advantages of fast measurement speed, high measurement accuracy, and simple structure.

The invention relates to a Micro LED optical module based on the MOSAIC technology, which comprises a core light-emitting layer, a driving and control layer and an optical and packaging layer, and is characterized in that the core light-emitting layer adopts a Micro LED matrix, and the Micro LED matrix comprises 400 2Gbps / channels; according to the Micro LED optical module, the Mosaic technology is adopted, 400 Micro LEDs of 2Gbps / channels are adopted for parallel transmission, a traditional high-speed channel is replaced, a single optical fiber can integrate thousands of fiber cores to independently transmit signals, the working voltage of the Micro LED optical module only needs hundreds of millivolts, a single array can accommodate 400 channels, the power consumption of a single transceiver is reduced to 10.6 watts, a WaS framework is adopted in the Mosaic technology, a large number of parallel channels are utilized, and the power consumption of the Micro LED optical module is reduced. Each channel operates at a relatively low 2 Gbps data rate.

The utility model discloses an optical communication parallel optical lens and an optical communication device, through an optical lens main body provided with a slot, a first optical fiber parallel channel and a second optical fiber parallel channel are formed on the inner wall of the bottom, far away from a notch, in the slot; the first optical fiber parallel channel is used for being in butt joint with a plurality of TX optical fibers in an optical fiber connector, and the second optical fiber parallel channel is used for being in butt joint with a plurality of RX optical fibers in the optical fiber connector. According to the technical scheme, the first optical fiber parallel channel and the second optical fiber parallel channel are arranged and can be in reliable butt joint with a plurality of TX optical fibers and RX optical fibers in the optical fiber connector respectively, the connection mode of multiple paths of optical signals is simplified, and the butt joint efficiency is improved. Besides, the optical fiber parallel channel design not only provides an independent guide path for a plurality of optical fibers, but also can avoid alignment errors in a traditional butt joint mode, thereby effectively reducing insertion loss and deviation of optical signal transmission, and ensuring transmission quality.

This invention proposes an integer-order differential analog-to-digital converter (ADC) for intracranial neural potential acquisition. First, an integer-order differential operator is designed to calculate arbitrary integer-order incremental codes, which more effectively utilizes the sparsity of intracranial neural potentials, significantly improving the compression rate of intracranial neural potentials. It also offers greater flexibility, with adjustable differential order, adapting to a wider range of intracranial neural potential acquisition applications. Second, a multi-level buffer matrix module is designed to generate arbitrary integer-order incremental code values ​​in a concise and efficient manner. Finally, a serialized bitstream generator is designed to serialize and package integer-order incremental data acquired from multiple parallel channels. This not only offers high scalability but also allows for reliable interfacing with subsequent synchronous clock wireless transmission systems, avoiding the overhead and latency of synchronous-asynchronous interface coordination, further improving signal acquisition efficiency.

A system comprised of customized nanoscopic projectiles directed to target cells. Projectiles are metered into a central force accelerator, comprised of hundreds to thousands of concurrent channels. Asperities of the channels' surface, transferring momentum from the central force accelerator to the projectiles, are atomic level asperities. Projectiles penetrate to target cells, deliver chemicals, without using the organism's circulatory system, resulting in cells being altered; killed if cancerous, modified by genetic materials contained in projectiles, and enhanced in performance by projectiles loaded with content to assist in cellular purposes.

The invention relates to a radioactive waste control release measurement data acquisition and wireless transmission system and method, and the system comprises a signal acquisition module which measures a radiation pulse in a radioactive waste control release process, and processes the radiation pulse into an analog pulse signal; a plurality of parallel channels are arranged in the signal processing module, the analog pulse signals are processed at the same time through the parallel channels, digital pulse signals are output, and a high-speed counter is arranged in each parallel channel; the data transmission module is connected with the signal processing module through an SPI (Serial Peripheral Interface) and uploads the digital pulse signal to a remote network platform through an integrated wireless module; and the upper system and the control module are connected to a remote network platform through a wireless module and are used for storing and analyzing the digital pulse signals and determining the control releasing operation of the radioactive wastes. A plurality of parallel channels are arranged to process a plurality of analog pulse signals at the same time, a data transmission module is arranged to achieve transmission in multiple modes, and the technical effects of high-speed pulse signal processing and large-scale parallel measurement supporting are achieved.

The invention discloses an MT ferrule multichannel parallel optical transmission system and an automatic alignment method, and the method comprises the steps: collecting the end face array structure information of an MT ferrule, carrying out the optical fiber arrangement topology analysis and channel space coordinate mapping based on the end face array structure information, and forming a channel space reference map; analyzing the signal feature code of each parallel channel, performing channel state attribute deconstruction according to the signal feature code, generating a channel identity label library, and setting a multi-dimensional alignment anchor point matrix according to the channel space reference map and the channel identity label library; performing offset detection and analysis on the real-time channel transmission state of each parallel channel, generating a coupling offset field, performing adjustment action serialization arrangement processing according to the coupling offset field, and generating a precision calibration instruction chain; displacement trend prediction and mechanical stability evaluation are carried out according to the end face array structure information and the working condition data, a pre-judgment precision calibration instruction chain is formed, and the alignment efficiency, the dynamic stability and the signal transmission consistency of multi-channel transmission are effectively improved.

The invention relates to a high-parallel three-dimensional array data recombination module and method supporting multiple operations. The data recombination module comprises an input processing module, a write address generation module, an RAM storage array, a read address generation module and an output processing module. And four three-dimensional array transformation operations of slicing, merging, compressing and transposing are realized. According to the module, a 512-bit wide data bus is adopted to be matched with 32 parallel RAM channels, and assembly line processing is achieved in combination with two ping-pong RAM sets. By means of rearrangement, displacement and address generation logic which are finely designed, efficient data reading and writing of 32-byte alignment are kept, and meanwhile flexible dimension transformation with one byte as the minimum unit is supported. The problems of low conversion efficiency and high power consumption of a traditional CPU are effectively solved, data conversion delay and power consumption are reduced by dozens of times, and an efficient data recombination solution is provided for high-performance computing application such as a three-dimensional convolutional neural network.

The invention discloses a triple redundancy safety instrument system and a voting and degradation control method of the system, relates to the technical field of safety control, and mainly aims to solve the problem that an existing safety instrument system is poor in safety protection flexibility and scene adaptability. The system mainly comprises three levels of an input module, a controller and an output module, each level comprises parallel channels with the same function, the input module comprises input channels with triple redundancy, the controller comprises controller channels with triple redundancy, and the output module comprises a hardware decision circuit based on a multi-switch circuit and output channels with triple redundancy. Five levels of voting are completed in the system and specifically comprise the first level of voting of an input module, the second level of voting and the third level of voting of a controller, the fourth level of voting of an output module and final driving of a hardware decision circuit, the voting of any level is executed according to a voting mode, and the voting mode is determined based on a degradation strategy of 3-3-2-2-1-0. The method is mainly used for safety control.

The invention discloses a low-power-consumption path number regulation and control design method for a self-adaptive parallel DDS (Direct Digital Synthesizer), belongs to the technical field of digital frequency synthesis, and provides a method for dynamically adjusting the number of working channels according to actual output frequency requirements. The method comprises the following steps: firstly, constructing a system comprising N parallel DDS channels, wherein the working clock frequency of each channel is fs; after the target output frequency fout is received, the minimum parallel path number required by frequency output is calculated; enabling Nmin channels to enter a working state, and switching other channels to a low-power-consumption state; phase bias is set for the working channel, so that the phase difference of each path of signal is 2 pi / Nmin in sequence; and performing power synthesis or time division multiplexing output on the multi-path signals through a combiner. On the premise of meeting the Nyquist sampling theorem, the frequency synthesis is completed by using the least channels, the power consumption of the system is remarkably reduced, and the method is particularly suitable for application scenes sensitive to power consumption, such as portable equipment and a battery power supply system.

The invention relates to the technical field of semiconductor device photoelectric performance testing, and discloses a high-sensitivity heterojunction spectrum detection system and a data acquisition method thereof, and the system comprises a bias voltage control unit, a signal acquisition unit, a digital processing unit and an upper computer processing unit. The digital processing unit adopts a trapezoidal hysteresis scanning strategy, and utilizes a transient shielding window and asymmetric residence time to induce charge hysteresis; and performing synchronous demodulation on the current response through a parallel channel, extracting differential conductance, differential capacitance and second harmonic components, and correcting a system phase error by using a rotation matrix. The upper computer processing unit constructs an augmented matrix based on multi-dimensional physical parameters, combines a physical kernel function, and utilizes a mixed regularization algorithm with smooth and sparse constraints to invert and calculate an interface state density distribution spectrum. According to the method, the problems of large signal scanning interference and inversion ill-conditioned conditions in general detection are solved, and high-precision quantitative characterization of interface state defects is realized.

The invention provides an article detection method based on feature enhancement and parallel channel attention. The method comprises the following steps: acquiring a millimeter wave image to be detected; sending the millimeter wave image into a filtering module, and carrying out regional feature enhancement and channel adjustment to obtain a feature-enhanced image; sending the image after feature enhancement to a backbone network, and performing feature extraction through dense residual blocks and jump connection to obtain a feature map; a parallel channel separation attention module is introduced between the backbone network and the feature pyramid network, decoupling feature enhancement of space and channel dimensions is carried out on the feature map, and an optimized fusion feature map is obtained; the optimized fusion feature map is sent to a feature pyramid network for feature aggregation, and aggregation feature information is obtained; and carrying out classification and bounding box positioning on articles with specific sizes by using the aggregation feature information through a detection output head to obtain a detection result. The method is used for solving the problem of inaccurate detection of objects with specific sizes.

The utility model provides a person and bag association system of a bilateral health inspection channel. The person and bag association system comprises a fence, a security inspection equipment group, a first channel, a second channel, and a first inspection structure and a second inspection structure which are arranged at the front and rear ends of the two channels. The security inspection equipment group is divided into two parallel channels through a fence, and integrates a 3D sensor, a conveying structure and a security inspection machine, so that synchronous security inspection of luggage and personnel is realized. The first inspection structure completes identity verification through linkage of the certificate reader, the face recognition machine and the gate, and the second inspection structure ensures passing safety through secondary face recognition. Through a bilateral channel design and a multi-verification mechanism, the passing efficiency and the security inspection precision are significantly improved, and the method is suitable for the rapid health inspection requirement of a high-flow scene.

The invention relates to the field of product demand prediction, and particularly provides a supply chain purchase demand prediction method and device based on a hybrid deep learning architecture, and the method comprises the following steps: S1, data preprocessing: carrying out the preprocessing of original time series data; s2, constructing a hybrid deep learning model, introducing a plurality of parallel channels into the network to realize'multi-channel 'processing, and processing the same input data by each channel through different paths; s3, performing model training and hyper-parameter optimization; and S4, after training is completed, demand prediction is generated by the model, and transparency and credibility of prediction are enhanced in combination with an interpretable artificial intelligence technology. Compared with the prior art, the transparency and credibility of the model decision making process can be enhanced, and practical guidance is provided for supply chain decision making.

The invention relates to the technical field of servo control, in particular to a servo control method and system based on instruction differential feedforward. Comprising the steps that a feed-forward control channel and a feed-forward control model based on instruction differentiation are constructed, and the feed-forward control channel is used for connecting a reference instruction input end and a control signal generation point; obtaining a target instruction signal of the input end through the feed-forward control channel, and generating a feed-forward control quantity according to the target instruction signal, a differential signal of the target instruction signal and a feed-forward control model; obtaining feed-forward monitoring data according to a preset correction time node, and judging whether a correction instruction of a feed-forward control model is generated or not according to the feed-forward monitoring data; a parallel channel is established in a servo control system, superposition output of a PID controller and a feed-forward control model is realized, delay and distortion of an output instruction of the servo control system are reduced, a plurality of working frequency bands and disturbance working conditions are established, feed-forward gain parameters are dynamically adjusted, and phase compensation and amplitude attenuation compensation efficiency of the feed-forward control model is improved.

Provided in the present invention is a fractional-order difference analog-to-digital converter for collecting a neural spike potential. Firstly, a fractional-order difference operator is designed to calculate arbitrary fractional-order delta encoding, such that the sparsity of a neural spike potential can be more effectively utilized, thereby significantly improving the compression ratio of the neural spike potential; moreover, the fractional-order difference analog-to-digital converter has higher flexibility by means of tunable differential orders, and can adapt to a wider range of neural spike potential collection scenarios. Secondly, a fractional-order buffer module is designed, such that an arbitrary fractional-order delta encoding value can be generated in a simple and efficient manner. Finally, a serialized bitstream generator is designed, such that serialized packaging can be performed on fractional-order delta data collected by a plurality of parallel channels, which not only exhibits high scalability and is applicable to multi-channel collection, but also enables reliable interfacing with a subsequent synchronous clock wireless transmission system, thus avoiding overheads and latency of synchronous-asynchronous interface coordination, and further improving the efficiency of neural spike potential collection.

This invention relates to the field of digital signal processing technology and discloses a multi-chip interconnect signal integrity collaborative optimization system, comprising: a spatial topology map extraction module, a protocol state parsing module, a compensation decision module, an equalization compensation module, a power supply decoupling optimization module, and a clock data recovery module. The system acquires a spatial topology map characterizing the physical parasitic parameters between controlled terminals, parses bus handshake signaling to generate a protocol state vector, matches prior distortion parameters based on this vector, and then maps the equalization compensation weight matrix and applies it to the clock data recovery stage. This invention utilizes bus protocol characteristics to drive the initial weight configuration of the decision feedback equalizer, achieving proactive feedforward compensation for transient crosstalk between parallel channels, eliminating the lag dependency of the physical layer compensation mechanism on bit error feedback, and ensuring signal synchronization stability during bus transaction switching.

The invention discloses a pulse modulation system and method based on a neural network, and the method comprises the steps: firstly processing an input symbol bit stream through a pulse position modulation module, extracting a position-related symbol bit through an MLP, converting the position-related symbol bit into a normalized current value, and transmitting the normalized current value into a pulse neural network; controlling the occurrence time of a pulse time domain and outputting a pulse position vector by utilizing a membrane potential accumulation characteristic and a time-varying discharge threshold value of linear decline in a symbol period; extracting phase correlation symbol bits through a pulse phase modulation module, distributing the phase correlation symbol bits to positive and negative parallel channels, adjusting the phase based on a pulse position vector, and generating a pulse vector with position and phase characteristics; and finally, expanding the discrete vector into a continuous time domain pulse signal by a transposed convolutional layer. According to the invention, the limitation of hardware adaptability and expansibility of a traditional pulse modulation system is overcome, and an efficient and flexible scheme compatible with various pulse modulation variants is provided for the field of Internet of Things and wireless communication.

The invention relates to the technical field of heterogeneous computing power scheduling, in particular to a distributed large model training method and system based on heterogeneous computing power. A configuration management unit analyzes a heterogeneous node hardware description file, constructs an architecture feature library containing the number of GPU parallel channels, the number of FPGA array groups and the number of CPU cores; the task scheduling unit is used for generating a sub-task priority sequence with a dynamic attenuation factor, the task scheduling unit is coupled with a priority and a feature library, a GPU tensor calculation unit exclusive lock is activated for querying key value projection sub-tasks, column tensor and row tensor splitting is executed, middle tensors are recombined in a zero-copy mode, and the gradient transmission unit monitors bandwidth fluctuation. A compression coefficient is generated through a coupling model, hierarchical scheduling gradient fragmentation is carried out, secondary compression is triggered, a cooperative control unit depends on double buffer pipelines and calculation array ready detection, closed-loop control subtask delay superposition is carried out, the heterogeneous computing power utilization rate is improved, the training speed is increased, and the training stability is guaranteed.

The application provides a fractional order difference analog-to-digital conversion device for neural spike acquisition. First, a fractional order difference operator is designed to calculate arbitrary fractional order delta coding, which can more effectively utilize the sparsity of neural spikes, significantly improve the compression rate of neural spikes, and have higher flexibility, adjustable difference order, and can adapt to more neural spike acquisition application scenarios. Secondly, a fractional order buffer module is designed, which can generate arbitrary fractional order delta coding values in a simple and efficient way. Finally, a serialization bit stream generator is designed, which can serialize and pack the fractional order delta data collected by multiple parallel channels. It not only has high scalability and can be applied to multi-channel acquisition, but also can be reliably connected with the subsequent synchronous clock wireless transmission system, avoiding the overhead and delay of synchronous- asynchronous interface coordination, and further improving the neural spike acquisition efficiency.

The invention relates to the technical field of graphics processors, and discloses a memory management device and method for multiple parallel channels, electronic equipment, a storage medium and a computer program product. The device comprises a plurality of parameter stream generators and a target cache shared by the parameter stream generators; any parameter stream generator is used for sending a data reading request to the target cache, and the data reading request is used for obtaining reference data corresponding to effective primitives currently needing to be processed by the parameter stream generator; and the target cache is used for responding to the data reading request of any parameter stream generator, determining the reference data corresponding to the effective primitives currently needing to be processed by the parameter stream generator, and returning the reference data to the parameter stream generator. Uniform cache management can be carried out, the overall hit rate of the data reading request is increased, the number of times of interaction with the external storage device is reduced, and the processing performance is improved.