Method for achieving neural network calculation based on field-programmable gate array

Abstract

The invention relates to a method for achieving neural network calculation based on a field-programmable gate array (FPGA) and belongs to the technical field of neural network calculation. Firstly, the mapping relation between basic logic units in the FPGA and all components of a neural network is established, functions of the basic logic units of the FPGA are described through a programming language, models of the basic logic units in the FPGA are established, the neural network is stimulated through the mapping relation between the FPGA and a neural network structure, and a self-learning process of the network is completed through reconfiguration of the interconnection relation between the basic logic units of the FPGA and operational capacity of the network. Compared with a method pursuing a neural network structure consistent with a true neural network structure in the current stage, hardware expenditure can be greatly reduced while the neural network of the same complexity is stimulated. Secondarily, the learning process of the neural network is completed on an FPGA software model, the learning period is greatly shortened, and time cost is saved.

Description

technical field [0001] The invention relates to a method for realizing neural network calculation based on a field programmable gate array, and belongs to the technical field of neural network calculation. Background technique [0002] Based on Field Programmable Gate Array (hereinafter referred to as FPGA), it includes three parts: Configurable Logic Block (hereinafter referred to as CLB), Input Output Block (hereinafter referred to as IOB) and internal wiring (Interconnect). Among them, CLB is the basic logic unit in FPGA. In the FPGA device of Xilinx Company, CLB is composed of multiple (generally 4 or 2) identical logic slices (Slice) and additional logic such as switch array. Each CLB module can not only be used to implement combinational logic and sequential logic, but also can be configured as distributed random access memory (Random Access Memory, hereinafter referred to as RAM) and distributed read-only memory (Read Only Memory, hereinafter referred to as ROM). The...

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Problems solved by technology

Since a single basic logic unit already has enough computing power, this method c

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