86 results about "Neuron circuit" patented technology

The invention discloses a synaptic plastic mechanism bionic circuit based on a threshold symmetric memristor, and relates to the technical field of bionic circuits, the bionic circuit comprises a pre-synaptic neuron circuit, the threshold symmetric memristor and a post-synaptic neuron circuit; the bionic circuit is divided into an excitatory synaptic moldability mechanism circuit and an inhibitory synaptic moldability mechanism circuit according to a synaptic moldability mechanism; the design method of the circuit comprises the following steps: firstly, designing neuron waveforms before and after synapse, then traversing changes of memristive synapse conductance values at different time intervals to obtain a corresponding curve of the conductance changes and the time intervals, verifying the fitting degree of a biological synapse plastic mechanism curve and the curve, and if the fitting degree is low, determining that the biological synapse plastic mechanism curve is not matched with the curve. And if not, redesigning the pulse waveforms before and after synapse. The synaptic plasticity mechanism simulated by the bionic circuit provided by the invention and a biological synaptic STDP mechanism model have a small fitting error, the provided design method is higher in universality, circuit parameters can be adjusted according to different memristors, and different forms of biological synaptic plasticity mechanisms can be simulated.

The application discloses a kind of nonvolatile memory-based pulse neuron circuit, it is related to the technical field of pulse neural network.The nonvolatile memory-based pulse neuron circuit includes: voltage dividing resistor network, current mirror circuit and MRAM pulse neuron module with temperature accumulation effect;Wherein, the voltage dividing resistor network receives target synapse array pulse signal and carries out voltage dividing processing to the target synapse array pulse signal, generates voltage dividing signal;The current mirror circuit is connected with the voltage dividing resistor network, and the current signal of the MRAM pulse neuron module is output according to the voltage dividing signal adaptation;The MRAM pulse neuron module is connected with the current mirror circuit, and the current signal is accumulated according to the temperature, and when temperature accumulation reaches threshold temperature, emits pulse signal.

The present application relates to a neural network circuit, comprising a plurality of neuron circuits and a plurality of electronic synapse circuits, wherein at least one of the electronic synapse circuits is configured to receive input and control signals from a presynaptic neuron circuit and receive a feedback signal from a postsynaptic neuron circuit; wherein the electronic synapse circuit comprises at least: a first transistor, a weight unit, a second transistor, a third transistor, and a fourth transistor; the present application also relates to an electronic device comprising the aforementioned neural network circuit.

A neural network device according to an embodiment includes a plurality of synapse circuits and a plurality of neuron circuits. A first neuron circuit out of the neuron circuits includes an input circuit, a charge holding circuit, a comparison circuit, a firing circuit, a charge control circuit, and a control signal output circuit. When a determination signal changes from a second value to a first value, the firing circuit outputs a spike signal. The control signal output circuit outputs a control signal indicating a comparison voltage that is based on an excess component of a membrane potential exceeding a threshold potential. In response to acquiring the spike signal from the first neuron circuit, a first synapse circuit out of the synapse circuits that acquires the spike signal from the first neuron circuit outputs a synaptic current of a current amount corresponding to the control signal and a synaptic weight.

The application discloses a three-dimensional Hindmarsh-Rose neuron model circuit under periodic excitation, comprising three neuron circuits and a matching circuit, and is composed of nine operational amplifiers and two multiplier circuits. The three-dimensional Hindmarsh-Rose neuron model circuit under periodic excitation can provide hardware support for studying neuron dynamic behaviors under periodic excitation, and has important theoretical research significance and practical application value.

The invention provides a high-fidelity neuron circuit based on a full-printed electrochemical transistor, which comprises an amplification unit, a reset OECT, a film capacitor element, a feedback capacitor element, a current input end, a voltage source VDD and a common grounding end GND, and is characterized in that a grid electrode of a first-stage OECT in the amplification unit is connected with one end of the film capacitor element and is connected with the current input end at a connection node; the drain electrode of the first-stage OECT is connected to one end of the corresponding resistor to form a first-stage inverter; an output node is formed at a connection node of the resistor and the drain electrode of the first-stage OECT; the output node is connected with the grid electrode of the next stage of OECT; the source electrode of each stage of OECT is connected with a common grounding end GND, and a voltage source pin VDD is connected with the other ends of the four resistors; one end of the feedback capacitor element is connected to the output node of the last-stage OECT; the grid electrode of the reset transistor is connected with the output node of the last-stage OECT, the source electrode of the reset transistor is connected to the input port of the amplification unit, the structure is remarkably simplified, and large-scale integration is facilitated.

A neural network device according to an embodiment includes a plurality of synapse circuits and a plurality of neuron circuits. A first neuron circuit includes a first terminal to which a synaptic current is supplied. The first neuron circuit includes a secondary battery element, a spike generation circuit, and a reset control circuit. The secondary battery element accumulates a charge according to the synaptic current supplied to the first terminal. The spike generation circuit generates a spike signal when the membrane potential generated from the secondary battery element is larger than a threshold potential being a predetermined potential. The reset control circuit releases the charge accumulated in the secondary battery element during a refractory period being a predetermined time after generation of the spike signal.

Disclosed is a spike neural network circuit according to an embodiment of the present disclosure, which includes a self-correcting control circuit that generates an input signal and a first control code, a bias voltage generation circuit that generates a first bias voltage based on the first control code, a synaptic circuit including a first synaptic column that performs an operation of the input signal and a first weight signal and generates a first operation signal, a neuron circuit including a first neuron that generates a first output signal based on a comparison of the first operation signal and a threshold voltage, and a spike comparison circuit that generates a first comparison signal corresponding to a difference between the first output signal and a reference number, and the self-correcting control circuit further generates a second control code for correcting the first bias voltage.

An apparatus comprises a bias current generation circuit configured to generate a bias current, a synapse circuit including a weight register storing a weight value and configured to perform a charge operation based on the input spike signal, the bias current, and the weight value, a membrane capacitor having a potential determined based on the charge operation of the synapse circuit, and a neuron circuit configured to generate an output spike signal based on a comparison between the potential of the membrane capacitor and a threshold potential. The bias current generation circuit comprises a self-correction circuit, and the self-correction circuit comprises a target input spike register storing a value related to a target number of input spikes and is configured to correct the bias current generated by the bias current generation circuit based on the value related to the target number of input spikes.

The present application relates to the field of artificial neuromorphics, and provides an artificial neuron circuit based on a volatile threshold switching device. A membrane potential generation circuit is used for generating different membrane potentials under different input currents and different external reset voltages; a slow variable generation circuit is used for generating a slow variable; a membrane potential reset circuit comprises a volatile threshold switching device and an external reset voltage excitation source; the external reset voltage excitation source is used for providing different external reset voltages, so that the membrane potential and the slow variable are changed, and a spiking behavior of biological neurons is simulated; and the volatile threshold switching device is used for realizing a membrane potential reset function. Compared with traditional CMOS-circuit-based neurons, the neuron circuit provided by the present application requires a greatly reduced number of transistors and reduced hardware and power consumption overhead, has the characteristics of simple structure, high flexibility and rich functions, and is beneficial to large-scale integration in a hardware pulse neural network.

The invention discloses an adjustable activation neuron circuit based on a phase change memory and a multilayer reasoning acceleration device, and relates to the technical field of micro-nano electronics, the adjustable activation neuron circuit comprises a neuron input end used for receiving data to be activated, and a neuron output end used for outputting data after nonlinear activation processing; the activation parameter adjusting circuit is connected with the activation function circuit, the activation function circuit comprises a first transmission gate, a second transmission gate, a third transmission gate, a fourth transmission gate, a phase change memory and an operational amplifier, the inverting input end of the operational amplifier receives a data signal to be activated, the non-inverting input end of the operational amplifier is grounded, and the output end of the operational amplifier serves as a neuron output end; the activation parameter adjusting circuit is used for adjusting the resistance state of the phase change memory through a pulse signal and changing the nonlinear relation between the output voltage and the input current. Based on the physical characteristics of the phase change memory, the neuron circuit with the continuously adjustable activation function is developed, and the data processing capability of a neural network is improved.

The invention relates to a gain-adjustable neuron circuit and a control method thereof, the gain-adjustable neuron circuit comprises a memristive element, a capacitor and a resistor, one end of the memristive element is connected with the capacitor in parallel, then is connected with the resistor in series, and is connected with a driving power supply; the memristive element comprises an MIM structure, a heating module for providing a thermal field for the MIM structure and a substrate for providing support for the whole memristive element, the MIM structure comprises a top electrode, a functional layer and a bottom electrode which are sequentially distributed from top to bottom, the heating module comprises a heat conduction layer and a heating layer which are sequentially distributed, and the heating layer is in contact with the MIM structure through the heat conduction layer for heat transfer; the top electrode is connected with driving type voltage input, and the bottom electrode is grounded; one end of the heating layer is connected with modulation type voltage input, and the other end is grounded; and a port, connected with the resistor, of the memristor element is a voltage output end. Compared with the prior art, the pulse response to driving type input can be realized, and the dynamic adjustment of the response gain is also realized.

The invention discloses an adaptive structure LIF neuron circuit, which comprises a current integration module, a voltage amplification module, a voltage positive feedback module, a voltage reset module and an adaptive module, and is characterized in that the current integration module is composed of an input current source Iin and an integration capacitor C1, and the voltage amplification module is composed of two stages of c-OECT inverters in cascade connection; each level of c-OECT phase inverter is composed of a pair of n-OECT and p-OECT, namely M2-M5, the voltage positive feedback module is composed of a capacitor C2, the voltage positive feedback module and the capacitor C1 jointly form a capacitance voltage division network, the voltage reset module is composed of a transistor M1, and the self-adaption module is composed of a resistor R1, a resistor R2, a resistor R3, a capacitor C3, two n-OECTs and a p-OECT. The learning behavior of biological neurons is simulated, a neuromorphic device capable of simulating neurosynaptic plasticity can be developed, an electronic device conforming to neuromorphic calculation characteristics can be developed, and the method can be applied to neuron calculation, brain-like intelligent systems and large-scale neural network development.

The application discloses a double-time-constant adaptive neuron circuit with leakage path control, comprising a leakage integration circuit and an adaptive leakage path control circuit; the leakage integration circuit is used for accumulating input signals, and outputs a voltage pulse to the adaptive leakage path control circuit when the accumulated input signals reach a preset firing threshold; the adaptive leakage path control circuit is used for driving and controlling voltage variation according to the voltage pulse output by the leakage integration circuit, and adjusting the leakage current of the leakage integration circuit through the variation of the control voltage. The application utilizes the kinetic characteristics of the volatile memristor to efficiently realize the neuron function, and utilizes the adaptive structure introduced in the leakage circuit to efficiently realize the frequency adaptive function, and the control signal has the double-time-constant variation characteristics, thereby providing a core functional component for the intelligent bionic system.

Minimize the loss of information transmitted. [Solution] The neural network device according to the embodiment comprises a plurality of synaptic circuits and a plurality of neuron circuits. The first neuron circuit among the plurality of neuron circuits is supplied with synaptic current to its first terminal from each of the first synaptic circuits among the plurality of synaptic circuits. The first neuron circuit has a charge storage circuit, a spike output circuit and a cutoff circuit. The charge storage circuit stores charge according to the synaptic current and generates a membrane potential according to the stored charge. The spike output circuit outputs a spike signal when the membrane potential is greater than a preset threshold potential. The cutoff circuit stops the supply of synaptic current from the first terminal to the charge storage circuit during a cutoff period, which is a predetermined time after the spike signal is output.

A logic gate with a neuron circuit which is used in electronic logic circuits, enables the arithmetic inputs to give output signal over the threshold value depending on a set threshold value according to the used AND, OR and MAJORITY logic gates, and enables to realize the logic processes by adjusting the triggering threshold value.

The invention relates to the technical field of neuron circuits, and provides a configurable neuron circuit and a control method, and the circuit comprises a mode selection module which selects a corresponding target working mode according to a received neuron configuration signal; the calculation module is connected to the mode selection module, and performs corresponding membrane potential updating according to the target working mode selected by the mode selection module and the received pulse information of the presynaptic neurons to obtain a membrane potential updating result; the comparison module is connected to the calculation module and is used for comparing the membrane potential updating result with a preset threshold value and determining whether the current neuron can generate a pulse or not according to a comparison result; and the pulse generation module is connected to the comparison module, and is used for generating a pulse signal and an AER (Advanced Encryption Register) coding group package and outputting updated membrane potential information when the current neuron is determined to generate the pulse. According to the technical scheme, selection of two neuron models can be achieved, the circuit structure is simplified, and meanwhile more complex behavior modes are achieved.

This invention relates to an event-triggered neuron circuit based on a volatile memristor, comprising: a signal transmission module and an encoding module; the signal transmission module converts a received light signal into an output voltage and transmits the output voltage to the encoding module; wherein the output voltage is positively correlated with the intensity of the light signal; the encoding module obtains an oscillating encoded signal based on the change in the output voltage. This technical solution converts the light signal into a voltage, and by controlling the change in the output voltage, obtains an oscillating encoded signal consistent with the characteristics of LIF neurons. The output voltage can change according to the increase or decrease in light intensity, which is also consistent with the characteristics of event-driven structures. This achieves voltage encoding output of light changes using a simple circuit structure, and to some extent promotes the development of event-driven structure research in neuromorphic computing.

A neuromorphic circuit according to example embodiments of inventive concepts includes a first neuron array including a plurality of neuron circuits generating a spike signal; a first synapse array including a plurality of first synapse circuits to process and output the spike signal transmitted from the first neuron array; a second synapse array including a plurality of second synapse circuits; a first connecting block positioned between the first synapse array and the second synapse array and connecting the first synapse array and the second synapse array in response to a control signal; and a control logic to generate the control signal. The neuromorphic circuit may easily expand the size of the synapse element array to a desired size by using a connecting block.

The invention discloses a memristor neural network implementation circuit. The memristor neural network implementation circuit comprises a synaptic circuit, a subtraction circuit, a neuron circuit and a Widrow-Hoff algorithm circuit, the synaptic circuit is connected with the subtraction circuit and is used for calculating the voltage of the synaptic circuit changing along with the input, the voltage reflects the change of synapses, and the subtraction circuit is connected with the neuron circuit and is used for summing each output of a subtractor to realize the multiply-accumulate function of the neural network; the Widrow-Hoff algorithm circuit is respectively connected with the neuron circuit and the synapse circuit, and the Widrow-Hoff algorithm circuit is combined to update the weight of each synapse in the neural network. According to the invention, a pure circuit mode of the memristor neural network is realized, and the weight of the synaptic circuit is adjusted only through the training circuit, so that the circuit operation becomes simpler.

The CMOS neuron-synaptic unit circuit system suitable for the spiking neural network is realized, so that network parameters of the spiking neural network are effectively initialized, and the weight is dynamically adjusted to promote information propagation and learning. The CMOS neuron-synaptic unit circuit system comprises a front LIF neuron circuit module which receives an input pulse signal and generates an output pulse through integration; the synapse circuit receives the output pulse and adjusts the transmission intensity of the signal by adjusting the real-time weight; the STDP circuit adjusts the synaptic weight according to the time difference between the pulse output by the front LIF neuron circuit module and the pulse output by the rear LIF neuron circuit module; the ATML circuit receives the output pulse of the front LIF neuron circuit module and the output pulse of the rear LIF neuron circuit module, and adjusts the weight of the STDP to update the length of a time window by changing the size of a time window length signal Vleak; and the LIF neuron circuit receives the signal from the synaptic circuit module, and simulates the neuron signal integration and pulse generation process again.

Provided is an all-electrically-controlled spintronic neuron device, a neuron circuit and a neural network. The neuron device includes: a bottom antiferromagnetic pinning layer; a synthetic antiferromagnetic layer formed on the bottom antiferromagnetic pinning layer; a potential barrier layer formed on the ferromagnetic free layer, wherein a region of the ferromagnetic free layer directly opposite to the potential barrier layer forms a threshold region; a ferromagnetic reference layer formed on the potential barrier layer; wherein the potential barrier layer, the ferromagnetic reference layer and the ferromagnetic free layer form a magnetic tunnel junction; a first antiferromagnetic pinning layer and a second antiferromagnetic pinning layer formed on an exposed region of the ferromagnetic free layer except the region directly opposite the potential barrier layer, and located on two sides of the potential barrier layer; and a first electrode formed on the ferromagnetic reference layer.

The invention discloses a light-magnetic sensing neuron circuit, and relates to the field of neurons, and the light-magnetic sensing neuron circuit comprises a light-sensitive element and two magnetic sensing neurons. Two ends of the photosensitive element are respectively connected with the two magnetic sensing neurons; each magnetic sensing neuron comprises a Josephson junction and a neuron circuit; when the Josephson junction is exposed in a magnetic field, the Josephson junction captures and releases magnetic field energy, and senses the change of the external magnetic field in combination with the neuron circuit; the photosensitive element captures external illumination energy after being activated in an illumination environment so as to simulate the cross-modal response of biological vision and magnetic perception. According to the invention, bimodal sensing and response of light and magnetism are realized.

This application relates to a method, apparatus, device, and medium for designing analog circuits based on neural networks. The method includes: acquiring a training dataset for analog circuit design; designing the activation function type corresponding to the analog circuit design based on the training dataset and circuit model indicators; identifying the number of neurons in the initial neural network, and determining the processing mode and spatial distribution of the neuron circuit modules on the training dataset based on the number of neurons; designing the analog circuit according to the activation function type and the determined processing mode and spatial distribution to construct a neural network training circuit with a multi-level complex neuron group; and training the multi-level complex neuron group neural network training circuit using the training dataset to obtain a simulation-verified neural network circuit model. The entire scheme can achieve efficient and accurate analog circuit design.

To perform operations that imitate the behavior of a brain.SOLUTION: A neural network device according to an embodiment comprises a plurality of synapse circuits and a plurality of neuron circuits. A first neuron circuit receives synaptic current supplied to a first terminal. The first neuron circuit includes a secondary battery element, a spike generation circuit, and a reset control circuit. The secondary battery element accumulates electric charges in accordance with the synaptic current supplied to the first terminal. The spike generation circuit generates a spike signal when a membrane potential generated from the secondary battery element becomes greater than a threshold potential that is a predetermined potential. The reset control circuit releases the electric charges accumulated in the secondary battery element during a refractory period, which is a predetermined time after the spike signal has been generated.SELECTED DRAWING: Figure 4

The application discloses a kind of based on humidity sensitive memristor's anti-noise speech recognition method, system, terminal and medium, method includes: based on microphone device collection voice signal, obtain audio data, and based on LIF neuron circuit acquisition humidity information, and by LIF neuron circuit based on humidity information output voltage pulse data, wherein, LIF neuron circuit includes humidity sensitive memristor;Random noise is applied to audio data, and the audio data containing random noise is fused and encoded with voltage pulse data, to obtain fusion data vector group;Fusion data vector group is input to pre-trained neural network, and output speech recognition result.The application breaks through the identification limit of single voice signal, and utilizes multimodal information fusion to significantly improve the speech recognition accuracy and robustness in noisy environment.

Neuron circuits are provided for spiking neural network apparatus having multiple such neuron circuits interconnected by links, each associated with a respective weight, for transmission of signals between neuron circuits. A neuron circuit includes a digital transmitter for generating trigger signals, indicating a state of the neuron circuit, on outgoing links of the circuit. The state is encoded in a time interval defined by these trigger signals. The neuron circuit includes a digital receiver for detecting such trigger signals on incoming links of the circuit, and digital accumulator logic. In response to detecting a trigger signal on an incoming link, the digital accumulator logic is adapted to generate a weighted signal dependent on the time interval and to accumulate the weighted signals generated from trigger signals on the incoming links to determine the state of the neuron circuit.

The invention provides a pulse neural network acceleration device based on a hafnium-based ferroelectric memristor. The structure of the device comprises a PC, a power supply circuit, an FPGA core board, a digital-to-analog conversion unit, a coding unit, a switch unit, a memristor array, a signal amplification circuit and an LIF neuron circuit. According to the hafnium-based ferroelectric memristor array, functions needing to be achieved are selected through specific software of the PC, read-write, weight modulation and image recognition of the hafnium-based ferroelectric memristor array can be achieved, image RGB values in the PC are converted into corresponding gray values to be sent to the FPGA core board, the FPGA core board controls and selects memristors needing to be modulated through the coding unit, the digital-to-analog conversion unit and the switch unit, and therefore the memristors needing to be modulated can be modulated. Read-write, weight modulation and image recognition functions of the ferroelectric memristor are realized, and results are output through the LIF neuron circuit.

The application discloses a reconfigurable brain-like neuron circuit based on fast-slow circuit, which comprises a fast sub-circuit and a slow sub-circuit, and the fast and slow sub-circuits are coupled to determine a pulse emission mode; the fast sub-circuit comprises a volatile threshold resistance variable device CH1 and a capacitor C1, an input end of the CH1 is connected to a signal source through an input resistor, and an output end of the CH1 is connected to an input end of the slow sub-circuit; one end of the C1 is connected to the input end of the CH1, and the other end is grounded; the slow sub-circuit comprises a volatile threshold resistance variable device CH2, a capacitor C2 and a non-volatile threshold resistance variable device in parallel; the input end of the slow sub-circuit is connected with the fast sub-circuit and used for receiving a pulse current of the fast sub-circuit, the output end of the slow sub-circuit is connected with an output resistor, and a connecting point serves as a pulse output port of the neuron. The neuron circuit constructed by the application has stronger information expression capability, is beneficial to improving the performance of a pulse neural network, and can be used for constructing an intelligent computing system with stronger cognitive capability and computing efficiency.

The invention discloses a method for realizing pattern recognition based on a bistable memristor neuron circuit. A bistable memristor neuron circuit is constructed through a bistable memristor, and under the driving of pulse voltage, the bistable memristor neuron circuit transitions from one discharge behavior to another discharge behavior, so that a neuron discharge behavior with bistability is realized. A transistor-memristor neural network mode identification scheme taking 1T1M as an example is successfully constructed by combining a threshold effect of steady-state switching of a discharge behavior of a memristor neuron circuit. The technical scheme has a wide application prospect in the consumer electronics fields such as voice recognition and image recognition functions in smart home equipment, and is expected to provide a new thought for developing more efficient neuromorphic calculation.