Communication and synapse training method and hardware for biologically inspired networks

A pre-synaptic and post-synaptic technology, applied in the field of nervous system engineering, can solve the problems of complex implementation, high current and power consumption

Inactive Publication Date: 2013-03-06
QUALCOMM INC
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Problems solved by technology

However, this complicates system implementation and results in high current and power consumption

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  • Communication and synapse training method and hardware for biologically inspired networks
  • Communication and synapse training method and hardware for biologically inspired networks
  • Communication and synapse training method and hardware for biologically inspired networks

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Embodiment Construction

[0021] Various embodiments of the invention are described more fully hereinafter with reference to the accompanying drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to any specific structure or function set forth throughout this disclosure. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Based on the teachings herein, one skilled in the art should appreciate that the scope of the present invention is intended to cover any embodiment of the invention disclosed herein, whether implemented independently of or implemented in conjunction with any other embodiments of the invention. realized in combination. For example, an apparatus may be implemented or a method may be implemented using any number of the embodiments set forth herein. Furthermore, the scope of the present invention is intended t...

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Abstract

Certain embodiments of the present disclosure support techniques for training of synapses in biologically inspired networks. Only one device based on a memristor can be used as a synaptic connection between a pair of neurons. The training of synaptic weights can be achieved with a low current consumption. A proposed synapse training circuit may be shared by a plurality of incoming / outgoing connections, while only one digitally implemented pulse-width modulation (PWM) generator can be utilized per neuron circuit for generating synapse-training pulses. Only up to three phases of a slow clock can be used for both the neuron-to-neuron communications and synapse training. Some special control signals can be also generated for setting up synapse training events. By means of these signals, the synapse training circuit can be in a high-impedance state outside the training events, thus the synaptic resistance (i.e., the synaptic weight) is not affected outside the training process.

Description

technical field [0001] Certain embodiments of the invention relate generally to neural systems engineering, and more particularly, to a method and apparatus for training synapses in biologically inspired networks. Background technique [0002] In bioinspired computing devices, communication between computing nodes (neurons) occurs by means of the rate and relative timing of spikes. The function of a neural network can be represented by the strength of neuron-to-neuron connections called synapses. These strengths, or "synaptic weights," can be continuously adjusted by the network based on the relative timing between presynaptic and postsynaptic spike firings. [0003] Ideally, circuits for synaptic training are implemented such that synaptic connections utilize the smallest possible number of devices. This is because the number of synapses per neuron is typically around 10,000, resulting in a total of 10 billion synapses for a typical biological network with 1 million neuro...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/063
CPCG06N3/0635G06N3/065G06N3/063G06N3/08G06N3/02G06N3/06G06N20/00
Inventor V·阿帕林Y·唐
Owner QUALCOMM INC
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