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87 results about "Synaptic weight" patented technology

In neuroscience and computer science, synaptic weight refers to the strength or amplitude of a connection between two nodes, corresponding in biology to the amount of influence the firing of one neuron has on another. The term is typically used in artificial and biological neural network research.

Multi-level heterogeneous integrated chip task processing method and device, equipment and medium

The invention relates to the technical field of artificial intelligence, can be applied to service scenes of pension service, financial science and technology, medical health and the like, and discloses a multi-level heterogeneous integrated chip task processing method, device, equipment and medium, and the method comprises the steps: constructing a multi-level heterogeneous integrated chip composed of a perception processing layer, an intelligent decision-making layer and a driving control layer, the layers are connected through a vertical interconnection structure; receiving multi-modal task data and extracting features to generate feature vectors; inputting the feature vector into a neuromorphic processing unit to determine a task decision result; converting the decision result into a driving signal to control an execution device; adjusting synaptic weights based on the feedback signal; and monitoring chip operation state parameters and dynamically adjusting processing frequency and structure parameters. By integrating multi-modal sensing, neuromorphic decision and a dynamic feedback mechanism, data sensing, decision and execution processing are completed in a chip, and the real-time performance and the calculation efficiency are improved by combining operation state monitoring and adjusting frequency and structure.
Owner:PING AN TECH (SHENZHEN) CO LTD

STFT dimension transformation-based spiking neural network mechanical fault diagnosis method

The invention is applied to the field of mechanical fault diagnosis signal processing, and particularly provides a pulse neural network mechanical fault diagnosis method based on STFT dimension transformation, and the method comprises the steps: collecting a one-dimensional mechanical vibration signal, carrying out the wavelet decomposition, carrying out the wavelet reconstruction of a low-frequency component and a denoised high-frequency component, and carrying out the wavelet reconstruction of the low-frequency component and the denoised high-frequency component; obtaining a denoised one-dimensional vibration signal; performing short-time Fourier transform, and converting the time-frequency two-dimensional matrix into a time-frequency two-dimensional matrix; inputting the time-frequency two-dimensional matrix into an improved HH threshold neuron model, carrying out Poisson sparse coding on the time-frequency two-dimensional matrix, and only carrying out pulse response on signal significant features; constructing a suprathreshold coding convolutional network with residual connection, inputting a sparse coding matrix, training by adopting an unsupervised learning rule based on STDP, and adaptively adjusting a network synaptic weight; and inputting to a trained above-threshold coding convolutional network, and obtaining pulse emission activity of neurons of an output layer through network forward propagation to determine a fault diagnosis result.
Owner:WESTLAKE INSTITUTE FOR OPTOELECTRONICS

Audio processing model quantification method and system

The invention relates to the technical field of AI audio chips, and discloses an audio processing model quantification method and system, and the method comprises the steps: applying an incremental voltage pulse to a multi-layer memristor cross array, measuring a conductivity value, and generating a memristor quantification configuration table; programming the neuron units in the multi-layer memristor cross array to obtain quantized neuron units; calculating a synaptic weight matrix; the audio signal to be processed is input into the quantization neuron unit to execute pulse calculation, the audio features are obtained, and the audio recognition result is generated on the end-side processor, so that the problems of nonlinearity and element difference of the memristor are effectively solved, the robustness of the system is improved, and the optimal balance of precision and power consumption can be realized in different scenes.
Owner:SHENZHEN ULTRA EASY TECH CO LTD

Battery life and safety collaborative prediction method and system based on improved pulse neural network algorithm

The invention relates to a battery life and safety collaborative prediction method and system based on an improved pulse neural network algorithm, and belongs to the technical field of electric tool battery management. The method is based on a four-level SNN architecture, an input layer receives voltage, current, temperature, stress and change rate parameters of a battery, and neural pulse conversion of the parameters is realized through rate coding and time coding; the synaptic layer simulates a physical hysteresis effect between parameters by using a double-index model, and the hidden layer passes through Adaptive Iamp; the F neurons integrate historical memory and nonlinear coupling, and the output layer generates health status, residual life and risk index. The synaptic weight is optimized through a supervised STDP learning rule, the contribution degree of each parameter is quantified, a membrane potential linear accumulation mechanism of the life dimension and an abnormal pulse triggering mechanism of the safety dimension are established, and a joint early warning decision is realized. The system is deployed in a battery management system, the battery state can be monitored in real time, and accurate decision support is provided for battery full life cycle management.
Owner:CHONGQING JINGDAO INTELLIGENT CONTROL TECHNOLOGY CO LTD

Multi-frequency weak fault enhancement method based on fractional order resonance response atlas reconstruction

The invention discloses a multi-frequency weak fault enhancement method based on fractional order resonance response atlas reconstruction, and the method comprises the steps: carrying out the noise reduction, trend term removal, phase compensation and modal decomposition of a mechanical vibration signal, determining a lag phase through a frequency sweep method for phase compensation, adjusting the phase of a same-frequency signal, reconstructing an effective component through the combination of a modal decomposition borrowing geometric method and a Pearson matrix, and carrying out the phase compensation. Constructing a nonlinear resonance model with historical memory; inputting the parameters into the same-direction coupling neuron model, dynamically updating and simulating transmission intensity change through synaptic weight, and solving response and step length; constructing a zero-energy coupling index based on a signal zero-crossing behavior, energy distribution and time-frequency analysis, wherein the time-frequency analysis comprises short-time Fourier transform and wavelet packet energy spectrum calculation to extract energy features; and iteratively optimizing parameters by using a quantum optimization algorithm, adjusting a rotation angle and preserving population diversity to prevent premature convergence, and outputting optimal parameters by taking a zero-energy coupling index as a target.
Owner:NINGBO UNIV

Neural network device and signal processing method

A neural network device according to an embodiment includes a plurality of synapse circuits and a plurality of neuron circuits. A first neuron circuit out of the neuron circuits includes an input circuit, a charge holding circuit, a comparison circuit, a firing circuit, a charge control circuit, and a control signal output circuit. When a determination signal changes from a second value to a first value, the firing circuit outputs a spike signal. The control signal output circuit outputs a control signal indicating a comparison voltage that is based on an excess component of a membrane potential exceeding a threshold potential. In response to acquiring the spike signal from the first neuron circuit, a first synapse circuit out of the synapse circuits that acquires the spike signal from the first neuron circuit outputs a synaptic current of a current amount corresponding to the control signal and a synaptic weight.
Owner:KK TOSHIBA

Neural network device, synaptic weight update method, and computer program product

A neural network device according to an embodiment includes a plurality of neuron circuits and a plurality of synapse circuits. In a case where an internal state value of a second neuron circuit is larger than a set determination reference value, a first synapse circuit among the synapse circuits executes potentiation processing to increase the degree of influence of a synaptic weight on a synapse signal in response to acquiring the input spike from the first neuron circuit. In response to outputting an output spike being a spike signal from the second neuron circuit, the first synapse circuit executes attenuation processing to decrease the degree of influence of the synaptic weight on the synapse signal.
Owner:KK TOSHIBA

A spiking neural network structure

The application provides a pulse neural network structure, comprising a first neuron, a synaptic unit and a second neuron connected in sequence, and a probability selection unit connected with the first neuron, the probability selection unit is used for generating a random number, the first neuron is used for determining a required action of the synaptic unit as a long-term potentiation action or a long-term depression action according to an actual time difference of a first pulse emitted by the first neuron and a second pulse emitted by the second neuron, when the random number is a preset random number, an adjusting pulse is sent to the synaptic unit according to the required action of the synaptic unit, the synaptic unit is used for storing a synaptic weight, and the synaptic weight is adjusted according to the adjusting pulse. In the embodiment of the application, the probability selection unit is designed based on a resistive random access memory, a large amount of resources is saved, and the stability is relatively high without depending on the device characteristics of the resistive random access memory, so that higher device consistency can be realized by using limited resources.
Owner:INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD

Brain-like chip real-time neural feedback synapse weight dynamic adjustment method and system

This invention relates to the field of neuromorphic computing technology and provides a method and system for dynamic adjustment of synaptic weights in real-time neurofeedback for neuromorphic chips. The method includes: capturing the pulse signals and timestamps emitted by presynaptic and postsynaptic neurons; calculating the time difference between the presynaptic and postsynaptic pulses; when the absolute value of the time difference is less than a preset time window threshold, querying a pulse timing dependency plasticity rule base based on the sign of the time difference to determine the corresponding synaptic weight adjustment type; generating corresponding voltage pulse parameters based on the adjustment type and the current conductance state of the target memristor synapse; and applying a write voltage pulse to the target memristor synapse according to the voltage pulse parameters to adjust its conductance value in situ in real time, thereby dynamically updating the synaptic weights. This invention solves the problems of poor dynamic environment adaptability, low energy efficiency, and high learning latency caused by traditional offline weight update mechanisms.
Owner:ZHONGRONG ZHONGLUE (SHENZHEN) TECHNOLOGY CO LTD

Brain-like synapse learning method and brain-like technology neuromorphic hardware system

The application provides a brain-like synapse learning method and a brain-like technology neural morphological hardware system, and the method comprises the following steps: determining a pulse pair generated by a presynaptic neuron and a postsynaptic neuron in a brain-like synapse learning circuit, wherein the pulse pair comprises an input pulse generated by the presynaptic neuron and an output pulse generated by the postsynaptic neuron; determining an STDP mechanism corresponding to the pulse pair and a synapse weight corresponding to the STDP mechanism based on the pulse pair; and performing STDP learning corresponding to the brain-like synapse learning circuit based on the pulse pair and the synapse weight; wherein the STDP mechanism is a pulse time-dependent plasticity mechanism, and the front and rear pulses of the pulse pair correspond to a long-term potentiation process or a long-term depression process in the STDP mechanism according to the time sequence. The application realizes online learning of brain-like intelligence, and plays the environment self-adaptive characteristics of brain-like computing.
Owner:PEKING UNIV

An array of analog neural memory that stores synaptic weights in differential unit pairs in an artificial neural network.

ActiveCN115280327BReconfigurable analogue/digital convertersRead-only memoriesSynaptic weightArtificial neuronal network
Numerous embodiments of analog neural memory arrays are disclosed. In one embodiment, an analog neural memory system includes an array of non-volatile memory cells arranged in rows and columns, with the columns arranged in physically adjacent column pairs. Within each adjacent pair, one column includes a cell storing a W+ value, and another column includes a cell storing a W- value. The adjacent cells in the adjacent pair store a differential weight W obtained according to the formula W = (W+) – (W-). In another embodiment, an analog neural memory system includes a first array of non-volatile memory cells storing W+ values ​​and a second array of non-volatile memory cells storing W- values.
Owner:SILICON STORAGE TECHNOLOGY INC

Neural network training method and device, equipment and medium

The invention provides a neural network training method and device, equipment and a medium, and the method comprises the following steps: 1, obtaining training data of an image, voice or text type, and carrying out the normalization and feature extraction processing; according to the invention, the three-terminal two-dimensional photoelectric synapse device is prepared, a single / double input mode is supported, cooperative regulation and control of an optical pulse sequence and a grid electric signal sequence are realized, the problem that the multi-mode processing capability of a traditional double-terminal device is limited is solved, and the complex feature extraction efficiency is improved; the nonvolatile storage of synaptic weight is realized through the ferroelectric regulation and control layer, and the remanent polarization of the ferroelectric regulation and control layer is Prgt; 5 [mu] C / cm < 2 > and erasing durability gt; 106 cycles are carried out, continuous power supply is not needed, and training power consumption and cost are reduced; through the high carrier mobility (gt, 200cm < 2 > / Vs) and nanosecond-level photoresponse characteristics (carrier lifetime lt, 10ns) of the two-dimensional photosensitive layer (such as MoS2 / WSe2), the response speed of the device is increased to nanosecond level, and the training requirement of a high-speed neural network is met.
Owner:SHENZHEN HOTCHIP TECH

A photonic neural synapse device with double micro-ring structure and convolution operation network model

This invention discloses a photonic neural synapse device with a dual-micro-ring structure and a convolutional computation network model. The device includes a front resonant ring, a rear resonant ring, and two coupled phase-change material (PCM) films. The two PCM films are matched and correspond to the front and rear resonant rings, respectively. Synaptic weighting is achieved by controlling the coupled PCM films. The front and rear resonant rings are used to split the input optical signal in the bus waveguide into a 50:50 ratio, and output the difference signal current through a balanced photodetector. The photonic neural synapse of this invention has the advantages of high bandwidth and high speed. Once the synaptic weights are determined, it is a passive device with theoretically zero power consumption. Furthermore, this invention designs a dual-micro-ring structure, which ensures that the modulation of light does not affect the resonant wavelength, improving modulation accuracy, reducing optical transmission loss, and broadening the range of synaptic weights. This invention can be widely applied in the field of micro-nano optoelectronics.
Owner:SOUTH CHINA UNIV OF TECH

Neurosynaptic processing core with spike time dependent plasticity (STDP) learning for a spiking neural network

There is provided a neurosynaptic processing core with spike time dependent plasticity (STDP) learning for a spiking neural network, including: a spiking neuron block including a pre-synaptic block and a post-synaptic block; a synapse block communicatively coupled to the spiking neuron block; a STDP learning block communicatively coupled to the spiking neuron block and the synapse block, the STDP learning block including a pre-synaptic event accumulator including a pre-synaptic spike event memory block and a pre-synaptic spike parameter modifier; a post-synaptic event accumulator including a post-synaptic spike event memory block and a post-synaptic spike parameter modifier, a weight change accumulator, and a weight change parameter modifier; a learning error modulator; and a synaptic weight modifier configured to modify a synaptic weight parameter based on a weight change parameter and a learning error corresponding to the synaptic weight parameter. There is also provided a corresponding method of operating and a corresponding method of forming the neurosynaptic processing core.
Owner:AGENCY FOR SCI TECH & RES

Artificial intelligence systems and methods for efficient use of assets

The present invention provides systems and methods for utilizing an application-specific integrated circuit (ASIC) for an artificial neural network connected to the memory, the ASIC comprising: a plurality of neurons organized in an array, wherein each neuron comprises a register, a processing element and at least one input, and a plurality of synaptic circuits, each synaptic circuit including a memory for storing a synaptic weight, wherein each neuron is connected to at least one other neuron via one of the plurality of synaptic circuits, wherein the array is configured to analyze said business sale transaction information trained on historical datasets relating to asset utilization, wherein the AI / ML categorization engine makes a prediction regarding the most efficient use(s) of an asset.
Owner:HECHT THOMAS

Semi-conductor device having double-gate and method for setting synapse weight of target semi-conductor device within neural network

Embodiments relate to a semiconductor device including a body made of a first conducting semiconductor material, a source and a drain made of a second conducting semiconductor material and formed on the body, a first gate formed on the body with a gate insulating layer interposed between the first gate and the body, a second gate formed opposite the first gate with respect to the body, and an insulating layer stack having a charge storage layer formed between the body and the second gate, and a method for controlling a synapse weight of a target semiconductor device within a neural network including semiconductor devices.
Owner:SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

Biologically inspired sleep algorithm for artificial neural networks

Systems and methods for generating Artificial Neural Networks (ANNs) based on the principles of biological sleep are disclosed. Namely, the systems and methods can be configured to apply a sleep-like phase to ANNs which enables training to be generalized, performance to be improved, and catastrophic forgetting for sequential multi-task training to be prevented. Various implementations of these systems and methods can be configured to: (i) train an ANN using backpropagation algorithm, (ii) convert the architecture of the ANN to an equivalent Spiking Neural Network (SNN) and simulate a sleep phase in the SNN while using plasticity rules to modify synaptic weights, and (iii) convert the modified synaptic weights associated with the simulated sleep phase of the SNN back into the ANN. This transformation from ANN to SNN to ANN effectively emulates learning mechanisms actuated during biological sleep and, as such, overcomes limitations commonly associated with machine learning.
Owner:RGT UNIV OF CALIFORNIA

Light-emitting electrochemical artificial synapse with parallel output of photoelectric signals and method

The application relates to a light-emitting electrochemical artificial synapse with a photoelectric signal parallel output function, which comprises, from bottom to top, a substrate, a bottom electrode, a light-emitting active layer and a top electrode; the light-emitting active layer is composed of a light-emitting material, an ion transmission matrix and a lithium salt; when a continuous voltage pulse is input, the light-emitting material in the active layer and the ion transmission matrix have an electrochemical oxidation-reduction reaction, which causes the gradual increase of the device conductance, and the post-synaptic current is also gradually increased; meanwhile, with the increase of the electron and hole injection, the transient electroluminescence intensity is also gradually increased. The application can simultaneously take the output light signal and the electric signal intensity as the synapse weight, can be used for constructing an optical and electrical hybrid artificial neural network, and provides a brand-new feasible scheme for realizing a neural morphological computing system taking light and electricity as media.
Owner:MINDU INNOVATION LAB

Chip for in-memory calculation of spiking neural network

The invention relates to the field of artificial intelligence and the field of integrated circuits, in particular to a chip for in-memory calculation of a spiking neural network, which comprises a synaptic weight storage array for storing synaptic weights; the threshold storage array is used for storing a neuron threshold voltage; the membrane potential storage array is used for storing a neuron membrane potential, a bit line of the membrane potential storage array is connected with a bit line of the synaptic weight storage array, and logic calculation results of the synaptic weight and the neuron membrane potential are directly generated on the connected bit lines; the membrane potential accumulation unit obtains a membrane potential accumulation result through processing of an addition logic circuit; the comparison unit is used for opening read sub-lines of the membrane potential storage array and the threshold voltage storage array and multiplexing an addition logic circuit to realize subtraction calculation of a membrane potential accumulation result and a threshold voltage; and the transmitting unit is used for judging whether the neurons output pulses or not and resetting the membrane potential. The method can achieve the push-training integration of in-memory calculation, remarkably improves the SNN operation energy efficiency, and reduces the power consumption.
Owner:CHONGQING UNIV

A big data analysis system and method for a financial guarantee circle

The application discloses a financial guarantee circle big data analysis system and method, relates to the technical field of data analysis, and comprises the following steps: collecting industrial and commercial, judicial and financial data in real time through an API gateway, constructing a quantum guarantee network model and a quantum annealing parameter configuration file after preprocessing, executing implicit relation detection by using a quantum annealing machine, generating a high-correlation guarantee circle list and a quantum calculation log in combination with Bayesian confidence calibration, simulating a risk transmission path based on a synapse plasticity model of a pulse neural network, outputting a synapse weight change table and a dynamic transmission graph, mapping a risk level to a hierarchical blocking strategy matrix through a dynamic blocking decision engine, performing topology reinforcement by using a minimum spanning tree algorithm in combination with historical data, generating a stable subnet list and a protection path graph, and finally weighting and fusing quantum logs, transmission models and subnet data to construct a three-dimensional risk atlas and optimizing real-time decision by using a long short-term memory network and an attention mechanism network.
Owner:SOUTH CHINA NORMAL UNIV

Neuro-synaptic Processing Circuitry

A neuro-synaptic processing circuitry for performing event-based neuro-synaptic operations based on synaptic weights and neuron states, the circuitry comprising: a data memory configured to store the synaptic weights; one or more neuron processing elements, NPEs, configurable to execute NPE instructions for performing the event-based neuro-synaptic operations; a controller configured to determine the event-based neuro-synaptic operations in function of one or more neuro-synaptic events; wherein the controller is further configured to generate the NPE instructions from the event-based neuro-synaptic operations; and weight-evaluating means configured to determine if one or more of the synaptic weights have a value of zero; and wherein, if the weight-evaluating means determines one or more of the synaptic weights having a value of zero, the NPEs are configured to omit executing one or more of the NPE instructions involving the one or more of the synaptic weights having a value of zero.
Owner:STICHTING IMEC NEDERLAND

Ping-pong architecture based sparse spike neural network accelerator

The application provides a sparse pulse neural network accelerator based on a ping-pong architecture, which transmits compressed weight values to a compressed weight calculation module, uses a sparse pulse detection module to extract valid pulse indexes from pulse input signals, avoids each pulse signal from participating in operation, reduces the amount of calculation, and accumulates non-zero values in the compressed weight values to the membrane potential of neurons according to the valid pulse indexes, so as to finally determine whether to fire a pulse or not. Compared with the technical solution in which all synapses are activated and participate in operation in a conventional synaptic cross array, only the synapse weights corresponding to the valid pulse indexes are activated in the application, and other synapses do not participate in operation, so that the amount of calculation is reduced, the running power consumption of the whole chip is reduced, and the running speed, energy efficiency and area efficiency of the pulse neural network are improved.
Owner:PEKING UNIV

Incremental learning neural network training method based on multi-synaptic connection and local plasticity modulation

The invention discloses a method for training an incremental learning neural network based on multi-synaptic connection and local plasticity modulation, and the method mainly comprises the steps: constructing a multi-synaptic connection-based neural network which comprises a full-connection layer and a convolution layer: introducing a plurality of synaptic connections between two adjacent layers of neurons in the full-connection layer, and introducing a plurality of synaptic connections between two adjacent layers of neurons in the convolution layer; designing a plurality of parallel weight channels for each convolution kernel element; associating a qualification trace for each synaptic weight for recording local synaptic activity intensity, and initializing network parameters; distributing a sub-network for each task through a weight mask, updating a qualification trace according to an output value of a neuron, training a model by adopting a back propagation algorithm, and freezing distributed weights; calculating the value of a synaptic modulation factor according to the qualification trace intensity, and updating the weight in combination with the modulation factor; according to the method, the accuracy of incremental learning can be effectively improved, zero forgetting is realized, and the robustness of task sequence change is kept.
Owner:TIANJIN UNIV

An image orientation identification method, device, equipment and storage medium

The application discloses an image orientation recognition method and device, equipment and a storage medium. The method comprises the following steps: using a projection neural network to preprocess a target image to obtain standard image data, the preprocessing comprising dimension reduction, noise reduction, normalization, cutting and gain control; encoding the standard image data according to APL neurons and a WTA mechanism through a preset KC layer to obtain encoded image data, the projection neural network and the preset KC layer comprising first synaptic weights subject to random distribution; inputting the encoded image data into a preset MBON layer for orientation analysis to obtain an orientation recognition result, the preset KC layer and the preset MBON layer comprising second synaptic weights updated based on a preset update algorithm. The application avoids the problems of catastrophic forgetting or low learning speed of the existing image orientation recognition model due to large distribution difference of samples with the same label, and avoids the problems of low learning and recognition efficiency of rare details in the image caused by the use of convolution kernels.
Owner:SUN YAT SEN UNIV

In-situ differential optoelectronic synapse device and its storage-computing integrated method

PendingCN122294838ASimple structureReduce power overheadSynaptic weightLight spot
This application belongs to the interdisciplinary fields of semiconductor optoelectronic devices, multiferroic materials, and neuromorphic computing. Specifically, it discloses an in-situ differential optoelectronic synaptic device and its in-memory computing method. The method involves grounding the first and second electrodes, applying a voltage to the bottom electrode to change the polarization direction of the ferroelectric domains in the bismuth ferrite thin film, and using the polarization direction of the ferroelectric domains as the weight symbol in the neural weights to set the non-volatile synaptic weights. The voltage on the bottom electrode is then removed or reduced, and a light spot is used to illuminate the bismuth ferrite thin film. By adjusting the position of the light spot, the differential current between the first and second electrodes is read and used as the weight value in the neural weights, thus realizing the read operation. This application achieves integrated storage and computing.
Owner:HUAZHONG UNIV OF SCI & TECH

Quantum neuromorphic attention alignment algorithm based on AR and VR

The invention discloses a quantum neuromorphic attention alignment algorithm based on AR and VR, and belongs to the technical field of quantum, and the algorithm comprises the steps: obtaining pulse data; the amplitude and the phase are coded, mapping to the Hilbert space is realized through a parameterized quantum gate, and a trainable attention weight is obtained; a pulse neural network is used for processing quantum state characteristics, an IZHXY neuron model is used for realizing a dynamic threshold mechanism, and synaptic weight updating follows an STDXY rule; according to the method, adversarial training is carried out through a quantum encoding QELXY device Q (x) and a classic generator G (z), modal alignment is realized through a WASSXY distance, the problems of modal splitting, intention misjudgment and low energy efficiency faced by an existing VR / AR algorithm can be solved, intelligent alignment and prediction of multi-sensory information in a virtual environment are realized, and user experience and system performance are improved.
Owner:CHINA TOWER CO LTD

CMOS neuron-synaptic unit circuit system suitable for spiking neural network

The CMOS neuron-synaptic unit circuit system suitable for the spiking neural network is realized, so that network parameters of the spiking neural network are effectively initialized, and the weight is dynamically adjusted to promote information propagation and learning. The CMOS neuron-synaptic unit circuit system comprises a front LIF neuron circuit module which receives an input pulse signal and generates an output pulse through integration; the synapse circuit receives the output pulse and adjusts the transmission intensity of the signal by adjusting the real-time weight; the STDP circuit adjusts the synaptic weight according to the time difference between the pulse output by the front LIF neuron circuit module and the pulse output by the rear LIF neuron circuit module; the ATML circuit receives the output pulse of the front LIF neuron circuit module and the output pulse of the rear LIF neuron circuit module, and adjusts the weight of the STDP to update the length of a time window by changing the size of a time window length signal Vleak; and the LIF neuron circuit receives the signal from the synaptic circuit module, and simulates the neuron signal integration and pulse generation process again.
Owner:BEIJING UNIV OF TECH

A pulse neural network mechanical fault diagnosis method based on STFT dimension transformation

The application is applied to the field of mechanical fault diagnosis signal processing, and particularly discloses a mechanical fault diagnosis method based on STFT dimension transformation, which comprises the following steps: collecting a one-dimensional mechanical vibration signal, and performing wavelet decomposition; performing wavelet reconstruction on low-frequency components and high-frequency components after denoising processing, so as to obtain a one-dimensional vibration signal after denoising; performing short-time Fourier transform, so as to convert the signal into a time-frequency two-dimensional matrix; inputting the time-frequency two-dimensional matrix into an improved HH threshold neuron model, performing Poisson sparse coding on the time-frequency two-dimensional matrix, and only performing pulse response on signal significant features; constructing a threshold coding convolution network with residual connection, inputting a sparse coding matrix, training by using an unsupervised learning rule based on STDP, and adaptively adjusting network synaptic weights; inputting into the trained threshold coding convolution network, and determining a fault diagnosis result by means of pulse firing activities of output layer neurons obtained through network forward propagation.
Owner:WESTLAKE INSTITUTE FOR OPTOELECTRONICS

A small-scale hopfield neural network circuit based on memristors

The application discloses a small-scale Hopfield neural network circuit based on a memristor, which comprises an activation function module circuit, a memristor model circuit and a Hopfield neural network circuit; the Hopfield neural network circuit comprises three neuron networks X1, X2 and X3; and a connection weight in the Hopfeild neural network is replaced by the memristor module circuit to obtain a new neural network. By replacing the synaptic weight of the Hopfield neural network system, it is found that the originally stable system exhibits rich dynamic behaviors, including chaos, hyperchaos, quasi-periodicity, double-vortex attractor and the like. The circuit is simple in design, and can adjust the weight parameters Rr and the parameter w32 to realize various dynamic behaviors. Therefore, the circuit can be used in the field of secret communication and is helpful for the research on the nervous system.
Owner:CHONGQING THREE GORGES UNIV

Bionic neural network recombination method based on swarm intelligence

The invention relates to the field of emergency management, in particular to a bionic neural network recombination method based on swarm intelligence. The method comprises the steps that a node topological relation based on all agents is established, and an equipment connection strength map is obtained; the node topological relation comprises neuron nodes and synaptic weights; and when the neuron nodes in the equipment connection strength atlas are detected to be invalid, triggering synaptic weight redistribution to realize bionic neural network recombination. In this way, a quantifiable equipment connection strength map is established, and a dynamic data basis is provided for topology reconstruction; when the intelligent agent node has a fault, the load is rebalanced and the service is not interrupted through subsequent topology self-healing, so that the reliability of the communication network is ensured.
Owner:BEIJING QUNXIN SPACE-TIME INTELLIGENT TECHNOLOGY CO LTD