4 results about "Spike-timing-dependent plasticity" patented technology

A hybrid neural network architecture is disclosed that integrates matrix multiplication-free (MatMul-free) transformation layers with spiking neural network (SNN) layers for efficient, low-power computation. The system includes an interface module configured to convert intermediate continuous-valued data from MatMul-free layers into a spike-compatible format using encoding techniques such as rate coding, phase coding, or threshold-based conversion. The SNN layers process the spike-encoded data in an event-driven manner, enabling sparse, temporal inference. Training is supported by a hybrid optimization strategy combining backpropagation in MatMul-free components with surrogate gradient descent or spike-timing-dependent plasticity (STDP) in SNN layers. The architecture reduces computational complexity, supports real-time adaptability, and enables deployment in energy-constrained environments such as edge devices and neuromorphic platforms. The system may be implemented in hardware, software, or a co-designed pipeline optimized for dynamic sensor data, control signals, or continuous inference tasks.

This invention relates to the field of neuromorphic computing technology and provides a method and system for dynamic adjustment of synaptic weights in real-time neurofeedback for neuromorphic chips. The method includes: capturing the pulse signals and timestamps emitted by presynaptic and postsynaptic neurons; calculating the time difference between the presynaptic and postsynaptic pulses; when the absolute value of the time difference is less than a preset time window threshold, querying a pulse timing dependency plasticity rule base based on the sign of the time difference to determine the corresponding synaptic weight adjustment type; generating corresponding voltage pulse parameters based on the adjustment type and the current conductance state of the target memristor synapse; and applying a write voltage pulse to the target memristor synapse according to the voltage pulse parameters to adjust its conductance value in situ in real time, thereby dynamically updating the synaptic weights. This invention solves the problems of poor dynamic environment adaptability, low energy efficiency, and high learning latency caused by traditional offline weight update mechanisms.

There is provided a neurosynaptic processing core with spike time dependent plasticity (STDP) learning for a spiking neural network, including: a spiking neuron block including a pre-synaptic block and a post-synaptic block; a synapse block communicatively coupled to the spiking neuron block; a STDP learning block communicatively coupled to the spiking neuron block and the synapse block, the STDP learning block including a pre-synaptic event accumulator including a pre-synaptic spike event memory block and a pre-synaptic spike parameter modifier; a post-synaptic event accumulator including a post-synaptic spike event memory block and a post-synaptic spike parameter modifier, a weight change accumulator, and a weight change parameter modifier; a learning error modulator; and a synaptic weight modifier configured to modify a synaptic weight parameter based on a weight change parameter and a learning error corresponding to the synaptic weight parameter. There is also provided a corresponding method of operating and a corresponding method of forming the neurosynaptic processing core.

Computer network with paths, where the network includes: a plurality of units configured to communicate via the paths, wherein the network is configured to identify informative loop signals in loops formed from a plurality of network paths connecting a first of the plurality of units to a second of the plurality of units, wherein the network is further configured to apply spike timing dependent plasticity (STDP)-dependent inhibitory gating to the plurality of network paths, wherein the network is further configured to open and close gates in the loop in a phase-shifted manner by applying STDP functions to open gate outputs and closed gate outputs, and wherein the network is further configured to make at least a rate or a direction of the phase shift dependent on a regulation signal, wherein the regulatory signal is based at least in part on a change in STDP-dependent inhibitory gating.