83 results about "Variable resistance" patented technology

The application discloses an anode intelligent protection module, and belongs to the field of water heaters. The anode intelligent protection module is applied to a water heater, and a variable resistor is arranged. An anode rod of the water heater is connected with an inner container of the water heater through the variable resistor. The variable resistor can increase the resistance value according to the increase of the water temperature in the inner container. The application further discloses a water heater which comprises the anode intelligent protection module. The application can keep the anode rod, the inner container and the water stored in the inner container with a basically unchanged resistance, and can make the anode rod meet the minimum protection potential in a high-temperature environment, thereby reducing the loss of the anode rod caused by the decrease of the resistance after the internal water is heated.

Embodiments of the present application provide an MRAM device, comprising: a first dielectric layer located above a substrate and having a first opening; a second dielectric layer located above the first dielectric layer and having a second opening; a variable resistance memory cell comprising a first electrode, a second electrode, and a magnetic tunnel junction layer located between the first electrode and the second electrode, the first electrode located in the first opening and having a rectangular cross-section, a top surface of the first electrode in contact with a bottom surface of the magnetic tunnel junction layer, the second electrode and the magnetic tunnel junction layer located in the second opening; the magnetic tunnel junction layer having a U-shaped cross-section and surrounding sidewalls and a bottom surface of the second electrode; a top surface of the second electrode coplanar with a top surface of the second dielectric layer; the second dielectric layer comprising an etch stop layer and an intermediate layer located above the etch stop layer, a peripheral width of the first electrode less than or equal to a peripheral width of the U-shaped cross-section of the magnetic tunnel junction layer. Embodiments of the present application relate to a method of forming an MRAM device.

A resistive memory device includes a dielectric layer, a trench, a first resistive switching element, a diode via structure, and a signal line structure. The trench is disposed in the dielectric layer. The first resistive switching element is disposed in the trench. The first resistive switching element includes a first bottom electrode, a first top electrode disposed above the first bottom electrode, and a first variable resistance layer disposed between the first bottom electrode and the first top electrode. The diode via structure is disposed in the dielectric layer and located under the trench, and the diode via structure is connected with the first bottom electrode. The signal line structure is disposed in the trench, a part of the signal line structure is disposed on the first resistive switching element, and the signal line structure is electrically connected with the first top electrode.

According to one embodiment, the present invention comprises a voltage-controlled magnetoresistive element having a variable resistance value, and a first control circuit that controls a voltage or a current applied to the magnetoresistive element. The magnetoresistive element includes a first magnetic layer having a voltage-controlled magnetic anisotropy effect, a second magnetic layer having a voltage-controlled magnetic anisotropy effect of a different magnitude from the voltage-controlled magnetic anisotropy effect of the first magnetic layer, and a spacer layer provided between the first magnetic layer and the second magnetic layer. The first control circuit attenuates the voltage or the current.

A pixel circuit and a display device are provided. The pixel circuit includes a light-emitting component, a first light sensor, and a variable resistor. The first light sensor receives a first operation voltage, and provides a first control voltage according to an intensity of a first sensed light. The variable resistor adjusts a resistance value provided therefrom according to the first control voltage so as to adjust a current value of a driving current flowing through the light-emitting component.

The present application relates to a semiconductor device and a method of manufacturing the same. The semiconductor device includes a first lead including a carbon-based thin layer upper portion; a variable resistance layer disposed on the first lead; a selector layer disposed on the variable resistance layer, the selector layer having a carbon-based thin layer disposed thereon; and a second lead disposed on the selector layer.

A circuit includes a latch, a first variable resistor, a second variable resistor, a slew detector, and a conductor configured to provide a power supply voltage. The latch has a first latch input, a second latch input, a first latch output, and a second latch output. The first variable resistor has a first terminal coupled to the conductor, a second terminal coupled to the first latch input, a first control input, and a second control input coupled to the first latch output. The second variable resistor has a first terminal coupled to the conductor, a second terminal coupled to the second latch input, a third control input, and a fourth control input coupled to the second latch output. The slew detector is coupled to the conductor. The slew detector has an output coupled to the first control input and the third control input.

The single-input double-output time-sharing operation device has the following advantages: the outer rings of the bearings of the first output end and the second output end are fixed, the inner ring of the bearing of the first output end is connected with the long gear, the transmission shaft is arranged in the long gear and exposes one end outside the long gear, the transmission shaft is connected with the long gear, one small gear is arranged on each side of the long gear and engaged with the long gear, the two ends of the first screw rod are fixed and the inside of the small gear is screw-engaged with the first screw rod, the translation frame is sleeved on the transmission shaft and located outside the long gear, the bearing of the small gear is connected with the translation frame, the end of the transmission shaft exposed outside the long gear is provided with the variable resistance mechanism and the constant resistance mechanism, the motor output gear is connected with the motor, the motor output gear is engaged with the transmission gear, the transmission gear is connected with the transmission shaft, the inside of the transmission gear is screw-engaged with the second screw rod, one end of the second screw rod is connected with the second output end, the damping is arranged at the second screw rod, and the lead angles of the second screw rod and the first screw rod are the same.

The application relates to a trans-impedance amplifier integrated with automatic reset and fast burst response, which comprises a trans-impedance amplifier front-end circuit, a reset signal automatic generation circuit in communication with the trans-impedance amplifier front-end circuit and an adjustable low-pass filter circuit; the adjustable low-pass filter circuit is in communication with an output signal of the trans-impedance amplifier front-end circuit and in communication with reset signals RST and inverse reset signals RSTB generated by the reset signal automatic generation circuit; the adjustable low-pass filter circuit is used for controlling MOS variable resistors and MOS switches arranged in the adjustable low-pass filter circuit according to the reset signals RST and the inverse reset signals RSTB and forming a low-pass filter with adjustable cut-off frequency, and a signal output by the low-pass filter with adjustable cut-off frequency conforms to a mean interval of a voltage signal output by the trans-impedance amplifier front-end circuit. An external RESET signal provided by an MCU is no longer needed to complete fast burst response of chips such as a trans-impedance amplifier, a limiting amplifier and a CDR.

According to the present invention, each of a plurality of unit converters comprises: a main circuit (30); a control circuit (32) configured to control a plurality of switching elements (11-14) according to control signals received from a control device; a power source (50) that steps down the voltage of a first capacitor (15) to generate a power supply voltage and supplies the power supply voltage to the control circuit (32); and a current-limiting resistor circuit (80) that is disposed between the main circuit (30) and the power source (50) and has a variable resistance value. The power source (50) comprises a second capacitor (51), an overcharge suppression circuit (54), a power supply circuit (56), and a control unit (500). The control unit (500) includes: an overcharge suppression control circuit (53) that controls the overcharge suppression circuit (54) in accordance with the magnitude of the voltage of the second capacitor (51); a current-limiting resistor switching circuit (83) that switches the resistance value of the current-limiting resistor circuit (80) in accordance with the magnitude of the voltage of the first capacitor (15); and a short-circuit failure detection circuit (200) that detects a short-circuit failure of at least one switch of the current-limiting resistor circuit (80) on the basis of the duty of a switching signal and the magnitude of the DC voltage of the first capacitor (15).

The application discloses a suspended ceiling profile calibration welding equipment and relates to the technical field of welding. The equipment comprises a welding mechanism, a feeding mechanism and a calibration mechanism. The welding mechanism and the feeding mechanism are installed on a rack. The welding mechanism, the feeding mechanism and the calibration mechanism are in electrical communication with a control system circuit. The calibration mechanism comprises a pair of traction assemblies and a calibration circuit. The pair of traction assemblies are symmetrically arranged in the rack. Each traction assembly comprises a steel cable, a winding machine and a support machine. The steel cable is connected between the winding machine and the support machine. The support machine is arranged outside the rack. The calibration circuit comprises a pair of sliding variable resistance elements. The pair of sliding variable resistance elements are respectively arranged in the pair of winding machines. The feeding mechanism and the welding mechanism work cooperatively to realize automatic feeding, positioning and peripheral welding. An operator only needs to simply control to complete a plurality of welding, thereby guaranteeing uniform and consistent welding seams, improving welding speed and product quality and being applicable to batch and on-site rapid construction requirements.

The present invention relates to a semiconductor device and a method for manufacturing the same. The semiconductor device may include: a first conductive line; a second conductive line disposed on the first conductive line and spaced apart from the first conductive line; a variable resistance layer disposed above the first conductive line and below the second conductive line; at least one of a first dielectric layer or a second dielectric layer; at least one of a first contact or a second contact; and at least one of a first doped selector layer or a second doped selector layer.

An integrated circuit memory device and a variable resistance memory device are provided. The integrated circuit memory device includes a plurality of row select transistors and dummy row select transistors on a substrate. A plurality of word lines and a plurality of dummy word lines are also provided on the substrate. A plurality of memory cells electrically connected to corresponding word lines of the plurality of word lines are provided. A plurality of dummy memory cells electrically connected to corresponding dummy word lines of the plurality of dummy word lines are provided. A first wiring structure electrically connecting a first word line of the plurality of word lines to a first row select transistor of the plurality of row select transistors is provided, and a second wiring structure electrically connecting the plurality of dummy word lines together and electrically connecting the plurality of dummy word lines to the dummy row select transistors is provided.

Clock frequency-drift compensation is described for a clock generator. In an example, an oscillator circuit includes a clock generator configured to generate an output clock signal with a clock frequency, a first variable resistor coupled to the clock generator to vary the clock frequency, and a second variable resistor. A voltage divider has a reference resistor and the second variable resistor. The voltage divider is configured to generate a reference stress voltage between the reference resistor and the second variable resistor, and a correction feedback block is configured to compare the reference stress voltage to a reference voltage, to adjust a resistance of the first variable resistor, and to adjust a resistance of the second variable resistor in response to the comparing.

A memory device of embodiments includes a memory cell including a switching layer between a first conductive layer and a third conductive layer and a variable resistance layer between the third conductive layer and a second conductive layer. The switching layer contains a first oxide of a first element selected from Mg, Y, La, Ce, Zr, Hf, Al, Ti, and Si, a second element selected from Zn, Ga, In, Sn, and Bi, a third element selected from P, As, Sb, Bi, S, Se, and Te, and a fourth element selected from V, Nb, Ta, Cr, B, Ga, and Si. The switching layer includes a first region, a second region, and a third region, and the first region is provided between the second region and the third region. The first region contains the first oxide, and the second region and the third region contains a fourth oxide of the fourth element.

The application discloses a motor rotor assembling device and an assembling process, and belongs to the technical field of motor manufacturing. The device comprises an oven, a bearing plate, a roller, a variable resistor, a hot air pipe and an exhaust pipe. The bottom of the bearing plate is provided with a bottom plate and is in contact with the roller. The bottom of each rotor is provided with a support and a sliding plate I. The bottom of the support is provided with a rotating rod and is rotationally connected to the sliding plate I. The two sides of the support are provided with rotor shaft grooves. A top rod I is vertically slid under each row of rotors. The top rod I is rotationally arranged on the bottom plate and is in contact with the sliding plate I. A sliding plate II is slid on the sidewall of the bottom plate. The end of the top rod I is rotationally connected to the sliding plate II. The sliding plate II is rotationally provided with a top rod II. The inner wall of the oven is provided with a top plate. The top plate is provided with an inclined surface near the inlet and outlet of the oven and is matched with the top rod II. The oven is provided with a first driving assembly for driving the rotation of the rotor. The application has the effects of improving the consistency of the insulation powder curing, the insulation performance of the motor rotor and the product yield.

The embodiment of the present disclosure provides a quasi-fixed frequency constant on-time architecture buck converter and an on-time timing circuit. The on-time timing circuit comprises a current generating module, a flip delay cancellation module, a capacitor and a comparator. The current generating module is configured to generate a charging current proportional to the voltage of a switching node after the upper power tube is turned on. The flip delay cancellation module is configured to generate a first delay for canceling the flip delay of the comparator according to a variable resistance unit and the capacitor. The resistance value of the variable resistance unit is controlled by an input voltage. The capacitor is configured to be charged by the charging current after the upper power tube is turned on. The comparator is configured to compare the size of the slope voltage corresponding to the slope voltage node and the first voltage, and generate an off signal. The first voltage is a reference voltage in proportional relationship with the output voltage. The problem of large variation of working frequency in the quasi-fixed frequency constant on-time architecture buck converter is solved.

The invention provides a light generating system (1000) comprising a solid state light source (100), a luminescent material element (210), a sensor element (400), and an electrical circuit (500), wherein: (a) the solid state light source (100) is configured to generate light source light (101), wherein the solid state light source (100) is functionally coupled to the electrical circuit (500); (b) the luminescent material element (210) comprises a luminescent material (200), wherein the luminescent material element (210) is configured in a light receiving relationship with the solid state light source (100), and wherein the luminescent material (200) is configured to convert at least part of the light source light (101) into luminescent material light (201); and (c) the sensor element (400) comprises a sensor component (410), wherein the sensor element (400) is comprised by the electrical circuit (500), wherein the sensor component (410) comprises a photo-resistor, wherein the photo-resistor has a variable resistance dependent on an extend of exposure to a light (11) selected from the group consisting of the laser light (100) and the luminescent material light (201).

A regulator circuit and driver including the regulator circuit use a variable-resistance element, such as a transistor, to limit the current in the circuit when the current is above a defined current threshold. The circuit may be comprised of a first amplifier circuit that senses a current in the circuit and generates a voltage signal in proportion thereto. The circuit also includes a mechanism for controlling a voltage applied to the first circuit element to limit the current flow. That may be a digital computing device that outputs a control voltage that causes the variable-resistance element to stop current flow for some defined period of time around current peaks.

This disclosure relates to a level shifter circuit. The circuit includes a latch (102), a first variable resistor (108), a second variable resistor (110), a gyroscope detector (112), and a conductor configured to provide a power supply voltage. The latch (102) has a first latch input, a second latch input, a first latch output, and a second latch output. The first variable resistor (108) has a first terminal coupled to the conductor, a second terminal coupled to the first latch input, a first control input, and a second control input coupled to the first latch output. The second variable resistor (110) has a first terminal coupled to the conductor, a second terminal coupled to the second latch input, a third control input, and a fourth control input coupled to the second latch output. The gyroscope detector (112) is coupled to the conductor. The gyroscope detector (112) has an output coupled to the first control input and the third control input.

To stabilize the operation of a circuit composed of multiple power semiconductor elements. [Solution] The power conversion device 1 comprises a signal generation unit 2 that generates an on / off command signal, a gate drive circuit 3 that receives the on / off command signal and generates a delayed on / off command signal by delaying the on / off command signal by a predetermined time, and a switching unit 4 that generates an output current using a power semiconductor element 41 that operates based on the delayed on / off command signal. The gate drive circuit 3 includes a first variable resistance element 31 disposed between the signal generation unit 2 and the switching unit 4, a capacitor 34 disposed between the wiring connecting the first variable resistance element 31 to the switching unit 4 and a first reference potential 35, a second variable resistance element 32 connected in parallel with the first variable resistance element 31, and a diode 33 provided on the path connecting the first variable resistance element 31 and the second variable resistance element 32 in parallel.

A memory device includes: a gate stack on a substrate, including insulation layers and gate electrodes alternately stacked in a vertical direction, and defining a through hole in the vertical direction; and a pillar structure in the through hole, the pillar structure including: a plurality of channel portions in the through hole to face the gate electrodes and having annular horizontal cross-sections; a plurality of conductive layers in the through hole to face the insulation layers, having annular horizontal cross-sections, and having inner walls protruding toward a center of the through hole with respect to inner walls of the channel portions; and a variable resistance material layer on the inner walls of the channel portions and the inner walls of the conductive layers, in the through hole, and a first portion of the variable resistance material layer overlaps the conductive layers in the vertical direction.

Magnetic sensing device integrated in a magnetic switch device that makes or breaks contact in the presence of an external magnetic field, comprising: a first transistor biased at a first terminal by a first bias voltage and a first magnetoresistive element having a first resistance variable with the external magnetic field. At a reference field strength, the first resistance has a first reference resistance value, and the first bias voltage is adjustable to control a first current at the second terminal of the first transistor at a first reference current value. When the external magnetic field is varied around the reference field strength, the first variable resistance varies around the first reference resistance value by a resistance delta, such that the first current modulates around the first reference current value by a current delta. A magnetic switch device comprising the magnetic sensing device is also disclosed.

A digital-to-analog converter (DAC) includes: a plurality of DAC transistor devices having an input side and an output side, the input side being configured to be selectively coupled to a system voltage based on a digital input signal and the output side being configured to provide an analog output signal; a plurality of non-DAC transistor devices coupled to the input side of the DAC transistor devices, the non-DAC transistor devices being configured as variable resistors; and control circuitry configured to adjust the bias of the non-DAC transistor devices.

To provide a voltage generation circuit capable of improving voltage resistance. [Solution] The voltage generation circuit comprises a variable resistor, a reference resistor, a detection circuit, and a voltage adjustment unit. The variable resistor is connected to the voltage output line. The reference resistor is connected in series with the low-voltage side of the variable resistor. The detection circuit detects the voltage at the first connection point between the variable resistor and the reference resistor. The voltage adjustment unit adjusts the voltage applied to the voltage output line based on the voltage detected by the detection circuit. The variable resistor has a plurality of resistive elements connected in series, a plurality of switching elements provided between the second and first connection points of each of the plurality of resistive elements, and a diode connected in parallel with at least one of the plurality of resistive elements.

This invention discloses an oscillator circuit comprising: a comparator having first and second input terminals, outputting a first output signal and, after passing through multiple inverters, outputting second and third inverted output signals. The first and second input terminals and the power supply voltage each have a first and second current path that are mirror images of each other. The first and second input terminals and ground each have a parallel structure of a variable resistor for adjusting the frequency and a first and second capacitor. A switching circuit controlled by the second and third output signals switches between the first and second input terminals and ground between the first and second circuit connection structures. The first circuit connection structure is as follows: the first input terminal is grounded through a resistor and has a first reference voltage, and the first capacitor is discharging; the second input terminal is grounded through a second capacitor and has a second charging voltage. The second circuit connection structure is as follows: the second input terminal is grounded through a resistor and has a second reference voltage, and the first input terminal is grounded through the first capacitor and has a first charging voltage.

The application relates to the technical field of semiconductor devices, in particular to a high-efficiency SiP power module which comprises a ceramic substrate, a metal frame, a metal cover plate and a plurality of power units; each power unit comprises a MOSFET, a transformer, a high-voltage capacitor and a high-voltage diode, an NTC thermistor, a PTC thermistor, an electrically-controlled variable resistor, a voltage-dividing resistor, a filter capacitor and a micro MCU; the NTC thermistor is connected in series on a source path of the MOSFET and is connected through a voltage-dividing circuit and the micro MCU; the PTC thermistor is connected in parallel with the source and the drain of the MOSFET; the micro MCU outputs a resistance value adjustment amount of the electrically-controlled variable resistor by analyzing voltage and resistance change conditions in the circuit, and adjusts the resistance value of the electrically-controlled variable resistor by using the resistance value adjustment amount. The application improves the heat management capability of the SiP power module and avoids local temperature imbalance.