33results about How to "Improve read and write speed" patented technology

The invention relates to the technical field of electronic devices, in particular to a monomolecular electric memristor based on dipole control and a preparation method thereof.The monomolecular electric memristor comprises a molecular heterojunction, and the molecular heterojunction is formed by connecting dipole molecules and graphene point electrodes through amido bonds; the dipole molecule comprises an amide structure based on a carbazole nitrogen-containing heterocyclic ring unit, under the action of an external electric field, a side chain chemical bond of the dipole molecule can rapidly rotate, the size and direction of an intramolecular dipole moment can be changed, the molecule can be rapidly and stably switched among different resistance states, and the read-write speed of the memristor is remarkably improved; the storage state is stably kept under the power-off condition, and the long-term stability and reliability of the memristor function are ensured. The preparation method comprises the processes of introducing dipole molecules and forming amido bonds between the dipole molecules and the graphene point electrode, and the preparation method is simple and convenient to operate, mild in condition and beneficial to large-scale production.

The invention discloses a cache management method, electronic equipment, a storage medium and a program product, and relates to the technical field of data storage, and the method comprises the following steps: obtaining current operation data of a storage system in a current period, determining current access popularity corresponding to a plurality of data blocks according to the current operation data, and storing the data blocks according to the current access popularity. The resource allocation of the target cache is dynamically adjusted, the problem that the data access efficiency of a storage system in the related technology is low is solved, and the technical effect of improving the data access efficiency of the storage system is achieved.

The invention provides a memory and an optimization method thereof, and the memory is characterized in that a main control unit receives different test instructions of a processor, analyzes the test instructions, and generates corresponding control instructions; the flash memory unit is used for executing different operations according to the control instruction; the main control monitoring unit is used for recording the delay duration of the main control unit in processing different test instructions; the flash memory monitoring unit is used for recording delay durations when the flash memory unit executes different operations; wherein the main control unit judges whether the sum of the delay durations is greater than a preset total duration or not; if yes, firmware is optimized; otherwise, firmware does not need to be optimized. According to the memory and the optimization method thereof provided by the invention, the delay of the memory during execution of each operation can be quickly tested so as to carry out optimization.

The invention discloses a disk space distribution method and device, electronic equipment and a computer readable storage medium. The disk space distribution method comprises the steps that address information of at least one target free space block in the same disk is acquired; setting the lowest address in the obtained address information to a root node of the binary heap, and setting other obtained address information in the binary heap according to a principle that an address indicated by any father node in the binary heap is lower than an address indicated by a child node; the target free space blocks are allocated based on the binary heap, the target free space blocks corresponding to the addresses set by the root nodes are always allocated in each allocation, and the target free space blocks are allocated according to the principle that the root nodes in the binary heap indicate the lowest address and the address indicated by any father node in the binary heap is lower than the address indicated by the child nodes after allocation. And updating the address indicated by each node in the binary heap. The overall read-write speed of the storage system can be improved.

The embodiment of the invention provides a data storage method and device for a solid-state storage device and a storage medium, and the method comprises the steps: obtaining a target task and a target task type of the target task; under the condition that the target task type is the first task type, executing a first classification operation on the target task by using a pre-trained first target classification network to obtain a first classification label; executing a second classification operation on the storage layers in the target data block by using a pre-trained second target classification network to obtain categories of a plurality of storage layers in the target data block; and determining a target storage layer matched with the first classification label based on the plurality of categories of the plurality of storage layers, and storing the to-be-written data into the target storage layer. Through the method and the device, the problems of durability and data reliability of the solid-state storage device in related technologies are solved.

The invention discloses an intelligent printer supporting printing automatic verification and an automatic verification method, and relates to the technical field of intelligent printers, the intelligent printer supporting printing automatic verification comprises a printer body and a control assembly used for controlling the printer body, and the control assembly comprises a printing control module used for printing image data on the surface of an RFID tag; the RFID read-write module is used for carrying out read-write operation on the electronic data in the RFID tag; the detection module is used for detecting the state of the printer in real time to obtain the state of the printer; the data processing module is used for verifying the correctness of the RFID tag in the printing process to obtain a verification result; the control module is used for controlling the printing process and reprinting the wrong label to realize automatic correction of the printer; according to the invention, the correctness of the image data and the electronic data of the RFID tag can be automatically checked in the printing process, the intelligent control of the printer and the automatic correction of the tag are realized, and the tag printing accuracy is improved.

The invention discloses a high-efficiency solid state disk master control chip, which relates to the technical field of solid state disk master control chips, and comprises a central processing unit and a flash memory controller, the flash memory controller comprises a communication module, a flash memory control circuit and a comparison circuit; in the invention, in performance, data bus and instruction processing are optimized, read-write is accelerated, delay is reduced, and high-speed storage requirements are met; in the aspect of data, the flash memory control circuit accurately reads and writes, the comparison circuit corrects errors in real time, data reliability is guaranteed, and the problem of flash memory management is avoided; during bad block detection, factory leaving and newly-added bad blocks are accurately judged by means of multiple means such as specific verification data after all pieces are erased, and the central processing unit intelligently judges, saves time and improves efficiency; in hardware collaboration, a data selector intelligently switches paths, static random access and a memory guarantee data stability, a main state machine accurately controls a time sequence, stability is enhanced, and a high-quality storage scheme is provided for the solid state disk.

According to the ZNS-based AI large model storage acceleration algorithm provided by the invention, the storage mode of the ZNS-based neural network learning algorithm and the state machine scheduling algorithm are defined, and the ZNS-based SSD independently stores parameters of each layer, so that the requirement of equipment for large-capacity memory storage is reduced, and the storage speed of the equipment is improved. Meanwhile, the parameter import performance in the neural network algorithm learning process is improved, and the overall power consumption and the whole disk write amplification are reduced. According to the method, an upper computer mode matched with ZNS SSD is defined in combination with the processing process of a neural network learning algorithm, the operation performance of a model is improved in cooperation with an upper computer, and upper-layer ecological software can conveniently mobilize data of each Zone; the ZNS SSD is matched with the upper computer to define the time sequence of the loading parameters of each layer, the capacity requirement for the DRAM in the large model processing process is reduced, meanwhile, the ZNS SSD enters the low-power-consumption mode when the model parameters do not need to be loaded so as to save the power consumption of the whole machine, and the application field and scene of the large model can be conveniently popularized.

The invention discloses a database storage method, which realizes high optimization of a storage space by finely classifying key value pairs and storing the key value pairs in different regions. The recovery frequency is dynamically adjusted, only the key value pairs marked as deleted are erased, storage fragments and the erasure frequency are reduced, the storage efficiency is improved, and the service life of storage equipment is prolonged. When the sectors are recycled, adjacent idle and invalid sectors are combined, so that the storage space utilization rate and the access efficiency are improved. When the new key value pairs are stored, the new key value pairs are preferentially distributed from the combined sector pool, the storage process is simplified, and the response speed is increased. The data access frequency and the sector erasure life are combined, the merged sectors are finely grouped, resource allocation is optimized, and the data access efficiency is improved. And meanwhile, a direct local modification technology is adopted, so that data migration and rewriting are reduced, and the updating operation efficiency is improved.

The invention provides a garbage collection method and device, a storage control chip and a storage medium. The method comprises the steps that the Flash starts garbage collection, the Flash is configured with an initial target block and an initial free block, the target block is used for collecting data, and the free block is used for serving as a next target block when the target block collects full data; a to-be-recycled block queue is confirmed, the to-be-recycled block queue comprises a plurality of source blocks, and the to-be-recycled block queue meets a preset recycling condition; the target blocks and the to-be-recycled block sequence are processed according to a preset recycling mechanism, and the preset recycling mechanism comprises the steps that on the basis of the to-be-recycled block sequence, the effective data page of the current source block is transferred into the current target block so that the recycled source blocks can be converted into free blocks, and all the source blocks are sequentially processed till garbage recycling is completed. By means of the technical scheme, it is ensured that the number of the free blocks is at least two after garbage collection is executed every time, the continuity of a write-in data address is ensured, and the Flash read-write speed is increased.

The embodiment of the invention discloses a graphics processor, an operation method of the graphics processor and electronic equipment, and relates to the field of computers. According to the method, the DMA module is used for directly transmitting data between the SRAM and the configuration register / memory of the ISP, frequent intervention of a CPU is not needed, the configuration process of the ISP is simplified, and the configuration efficiency is improved. The SRAM maps a section of area with the same size as the ISP configuration register / memory, and quick updating and reading of ISP configuration and information are realized through direct reading and writing of the DMA. Compared with a mode of directly using a plurality of registers and memories, the mapping mode has the advantages that the occupation of hardware resources is reduced, so that the area of the whole SRAM is smaller than the total area of a mode of independently using the registers and the memories.

The invention relates to the technical field of data processing, and discloses a data interaction method based on an insurance domain model, which comprises the following steps: acquiring insurance service data, and carrying out data persistence processing on the insurance service data to obtain a persistent database; capturing system change data of the insurance core system according to the persistent database; storing the system change data into a pre-constructed Redis database according to an insurance domain model of the insurance core system to obtain a domain model database; and when a service interaction request of the insurance core system is received, calling interaction data corresponding to the service interaction request according to the domain model database. The invention further provides a data interaction device based on the insurance domain model, computer equipment and a storage medium. The service processing efficiency of the insurance core system can be improved.

The invention belongs to the field of data storage, and particularly relates to an integrated circuit big data storage optimization system which comprises a data control module, a storage unit module, a data caching module, an error detection and correction module, a data compression module, an address mapping module and a power management module. And the storage unit module is used for controlling and managing the read-write operation of the data, and is used for determining the structural design of the storage unit and monitoring the state of the storage unit. According to the integrated circuit big data storage optimization system, the storage capacity is greatly improved by adopting a novel nonvolatile memory technology and an optimized storage unit structure and material, and meanwhile, the read-write speed of data is remarkably improved by adopting an intelligent cache replacement strategy, a multi-level cache structure, a cache prefetching technology and the like, so that the storage efficiency of the integrated circuit big data is improved. In this way, in a big data storage scene, a large amount of data can be quickly stored and read, and the high requirement of the modern information technology for data processing is met.

The present invention provides a method for optimizing a memory and a cache block, wherein the memory includes: firmware, in which a free list, a write cache list and a read cache list are arranged; when performing a read and write operation, the main control unit is used to call a cache block from the write cache list and the free list to perform a write operation, and to call a cache block from the read cache list and the free list to perform a read operation; when performing a recycling operation, when the mapping relationship of the host data to be erased matches the mapping relationship of the host data stored in a certain cache block in the write cache list and the read cache list, the host data of the cache block is erased, and the relevant information of the cache block is stored in the free list. Through the method for optimizing a memory and a cache block provided by the present invention, the allocation mode of the cache block can be optimized, so that the cache blocks can be mixed in different scenarios.

The invention discloses a data processing method and device based on a distributed optimistic lock, equipment and a medium, and relates to the technical field of distributed systems.The method comprises the steps that when a data writing request is received, the distributed optimistic lock is obtained from a cache; matching a request version number carried in the data writing request with an optimistic lock version number recorded by the distributed optimistic lock; if the matching is successful, updating an optimistic lock version number recorded by the distributed optimistic lock, and releasing the distributed optimistic lock after the updating is completed; and obtaining target write-in data from the data write-in request, and updating database data in the structured database and cache data in the cache according to the target write-in data. According to the method, the consistency of the cache data and the database data can be maintained.

The present invention discloses a movement with ultra-high stability, comprising a movement base (1), characterized in that an optical drive is fixedly arranged in the movement base (1), a linkage lever mechanism and a pressure plate driving mechanism are also arranged in the movement base (1), the linkage lever mechanism comprises a first lever (4) and a second lever (5) which are symmetrically distributed, the first lever (4) and the second lever (5) are both rotatably connected to the movement base (1) via a rotating shaft with a torsion spring (6), a guide driving block (7) is connected at the working end of the first lever (4) and the second lever (5), and the guide driving block (7) is in a truncated cone shape, a connecting portion (8) is arranged on the first lever (4) and the second lever (5), and the two connecting portions (8) are hinged to each other via a connecting shaft (9), and a locking portion (10) is also arranged at one end of the first lever (4) away from the working end.

The invention discloses a parameter library management method, device and equipment of safety equipment and a storage medium, and relates to the technical field of parameter management, and the method comprises the steps: randomly distributing an encryption key for a safety service business data flow according to a preset key table, and building a key storage address relation mapping table; storing an initial chain variable to a preset chain variable storage position in a distributed manner based on a first packet message of the security service business data flow, and establishing a chain variable storage address relation mapping table; encrypting a security service business data flow according to an encryption instruction, the key storage address relation mapping table and the chain variable storage address relation mapping table; and destroying a corresponding mapping relation in the key storage address relation mapping table and the chain variable storage address relation mapping table according to a destroying instruction. According to the method, the encryption key is randomly distributed, so that the confidentiality of the data is enhanced, the initial chain variables are stored in a distributed manner, the storage resources are fully utilized, and the read-write speed of the data is increased.

The present invention provides a compact optical drive with dual optical heads and lossless optical discs, comprising a bottom shell assembly, a top cover assembly, a lower drive assembly, a platen pressing assembly and a platen pressing lifting assembly; the top cover assembly is arranged on the bottom shell assembly, and a read-write compartment is formed between the bottom shell assembly and the top cover assembly; the bottom shell assembly comprises a bottom shell and a loading motor and a gear set arranged on the bottom shell, the loading motor can drive the gear set, and the gear set drives the lower drive assembly to enter and exit the read-write compartment; the platen pressing lifting assembly can drive the platen pressing assembly to rise and fall. The internal parts of the compact optical drive with dual optical heads disclosed by the present invention have a compact structure and a high degree of integration, and can meet the needs of specific fields with limited standards or requirements for the size of optical drives; while ensuring the stability of the optical disc when reading and writing, during the process of loading the optical disc, the optical disc does not contact other parts, thereby protecting the optical disc signal surface. The use of dual drive assemblies working simultaneously can correspond to large-capacity double-sided optical discs with high reading and writing rates.

The embodiment of the invention relates to a memory management method and device of a security chip and electronic equipment, a plurality of cards are integrated on the security chip, the plurality of cards share the physical space of a non-volatile memory (NVM) of the security chip, and the NVM virtual space corresponding to each card is isolated through a firewall. The NVM virtual space and the NVM physical space correspond to each other and are the same in size; the method comprises the following steps: in response to a received request for writing data into a target virtual address, writing the data into a cache region corresponding to a currently running target card; the data in the cache region is written into the NVM physical space in response to the fact that NVM writing conditions are met, and the NVM writing conditions include receiving of a transaction submission request, page crossing and active submission of a user. By adopting the technical scheme, the multi-card memory management of the security chip is realized, the erasing frequency is reduced, the read-write speed is increased, the read-write performance is improved, and the service life is prolonged.

The invention relates to the technical field of big data resource services, and particularly discloses a server storage space optimization method which comprises the steps of comparison of data sets needing to be optimized, strategy feasibility evaluation and storage space performance judgment, and specifically comprises the following steps: firstly, obtaining the data sets needing to be optimized of the server storage space by comparing data access frequency with reference frequency; according to the method, the feasibility evaluation index of the data deletion strategy is judged, adjustment and optimization are performed according to the change of the feasibility evaluation index, and the data deletion strategy is recorded as the data deletion preset strategy, so that data deletion operation is performed on the data set to be optimized in the storage space of the server, and the burden of the storage space is reduced. The released storage space can be redistributed to other data, the resource utilization rate of the storage space is improved, and the storage performance of the server storage space after data deletion is judged, so that the optimization of the server storage space is fed back.

The invention relates to the technical field of semiconductors, in particular to a semiconductor device, a manufacturing method thereof and a storage system. The semiconductor device comprises a first semiconductor structure and a bonding pad lead-out structure; the first semiconductor structure comprises a semiconductor layer, a transistor, a conductive structure, an insulating structure, a contact structure and a connecting structure, and the semiconductor layer is provided with a first side and a second side which are opposite; the transistor is located on the first side of the semiconductor layer; the conductive structure is located on the first side of the semiconductor layer; the insulating structure penetrates through the semiconductor layer; the contact structure is located on one side of the conductive structure away from the insulating structure and extends to the conductive structure; the connecting structure penetrates through the insulating structure and extends to the conductive structure; the pad lead-out structure is located on the second side of the semiconductor layer. Through arranging the conductive structure, power supply from the back surface of the first semiconductor structure is realized, the process is simple, the wiring path is short, and the read-write speed of the chip is improved.

The invention discloses a matching method for automatic matcher equipment, which relates to the technical field of radio frequency impedance matching and is applied to radio frequency impedance matching equipment, and the radio frequency impedance matching equipment is used for connecting a radio frequency output device and a plasma load and controlling the output power of the radio frequency output device to be effectively transmitted to the plasma load. According to the matching method for the automatic matcher equipment, parameter scanning is carried out on two adjustable vacuum capacitors through a two-dimensional optimization scanning algorithm, and target matching parameters are found in advance and stored in a nonvolatile storage module; after the plasma generating device is started, the central processing unit does not need to re-execute full-range scanning, can directly call pre-stored parameters, and controls the capacitor driving mechanism to be quickly adjusted to a target state; even if the initial matching parameters are called in an extreme scene and secondary fine tuning is started, the problem of unstable power caused by scanning lag in an existing scheme is avoided, and the strict requirement of a high-precision process for ignition, namely stability, is met.

The invention provides a program burning method and structure. The method comprises the steps that a QSPI interface, an ISP interface and a configuration chip of a CPU / FPGA / DSP are connected in series through a QSPI interface signal; when the ISP signal cable is not used, the ISP interface is suspended, a signal in the QSPI interface is connected with the configuration chip, the power supply in the QSPI interface supplies power to the configuration chip through the conducted field effect transistor, the configuration chip is in a normal working state, and the functions of the CPU / FPGA / DSP and the configuration chip are completed; when the ISP signal cable is used, the programmer / programmer provides a QSPI signal and power supply for the configuration chip through the ISP signal cable, and program burning of the configuration chip can be completed by using the programmer / programmer without powering up a product. According to the invention, program burning can be conveniently completed without dismounting the configuration chip when the configuration information of the configuration chip is updated.

The application discloses an industrial process control data access method supporting a multi-user data exchange protocol and relates to the technical field of data access.The application sets a cache space, analyzes data information corresponding to each data in underlying data, obtains a data evaluation coefficient, and judges whether the data is suitable for being stored in the cache space, so that the data frequently accessed can be stored in the cache space, the number of access to the underlying data can be reduced, the data access speed is improved, whether expansion is needed is judged, the capacity of the cache space can be increased, more data can be stored in the cache, the situation that the cache hit rate is low can be reduced, the data access speed and response time are improved, the priority of each user data stream is set, limited resources can be more effectively allocated to important data streams, and the transmission rate and response time of the important data streams are improved.

The application provides a semiconductor device and a manufacturing method thereof. The semiconductor device comprises a substrate, an isolation region in the substrate and defining a plurality of active regions, a plurality of bit lines on the substrate, and a plurality of contact plugs between the bit lines, wherein each contact plug comprises a bottom in the active region of the substrate, and the side of the bottom adjacent to the active region comprises at least a first side and a second side in different planes. By forming a plurality of sides in different planes adjacent to the active region, the contact area with the active region is increased, the contact resistance is reduced, the contact performance of the semiconductor device is improved, and the read / write speed of the semiconductor device is improved.

The invention provides a test system and a test method for a memory chip. The test system comprises a host, a chip test seat, a first interface module, a second interface module and a bridging chip module, the chip testing seat is used for installing a chip to be tested. The first interface module and the second interface module are used for being connected with a host; the bridging chip module is used for acquiring a test data packet written by the host and performing protocol conversion on the test data packet between the data packet format of the chip to be tested and the data packet format of the first interface module or the second interface module; the bridge chip module is used for adjusting the read-write performance of the to-be-tested chip to different read-write speed levels so as to detect the read-write performance of the to-be-tested chip. According to the method, the integrity of the test data packet after being read and written by the storage chip is judged through the host, so that the read-write performance of the chip to be tested at the corresponding read-write speed is determined, and the problem that a traditional test platform cannot completely meet the read-write performance test requirement of the storage chip after iteration is solved.

This disclosure provides a data archiving method, an electronic device, and a readable storage medium. The method includes: acquiring monitoring data collected by at least one monitoring subsystem; storing the monitoring data into multiple data objects corresponding to the monitoring subsystem according to a preset rule; controlling a first thread corresponding to the monitoring subsystem to read the data objects into a corresponding data queue in a preset order; and controlling a second thread corresponding to the monitoring subsystem to write the data objects in the data queue into a database each time the first thread reads a data object into the data queue.

The invention relates to the technical field of vulcanizing machine group control, in particular to a cross-platform group control method and system for vulcanizing machines, and the method comprises the following steps: 1, creating N machine objects, N being a natural number; 2, setting machine configuration information; step 3, creating a user-defined class; 4, a database is connected, and data storage, access and management are achieved; 5, connecting the OPC-UA, loading machine attributes, and performing data monitoring and refreshing by the upper computer to realize data reading and data writing; step 6, creating an interface; and step 7, reading and writing the whole data, so that the purpose of controlling a plurality of vulcanizing machines by deploying only one set of program on one industrial personal computer is achieved, the cost is saved, and the production efficiency is improved.

The application belongs to the technical field of computers and relates to a page view processing method for a React application and related equipment.The method comprises the following steps: in response to a page view processing request of a React application, obtaining service-side view data according to a view ID in the page view processing request, and obtaining local cache view data corresponding to the view ID from an IndexedDB database connected to the React application; reading target field information of the local cache view data, and judging whether the local cache view data has updates according to the target field information; if there are updates, merging the service-side view data and the local cache view data and creating snapshot data, otherwise creating snapshot data according to the service-side view data; updating the snapshot data to a Redux data node and the local cache view data, updating the state of a component of the React application based on the updated Redux data node, and performing page view rendering based on the updated component state.The application scheme is fast in view processing response, easy to extend and high in data security.

The invention provides an automobile electronic control system data storage method and system, and relates to the field of data storage, the method comprises the following steps: pre-dividing data storage areas on a storage device, and setting a data area basic information block at the initial part of each data storage area; traversing the basic information blocks of all the data storage areas, and generating a data area basic information dictionary in a memory; when a data writing operation is carried out, calculating a target physical address of to-be-stored data on the storage device according to the starting time of the time slice to which the to-be-stored data belongs and the total offset address of the current effective data storage area; and executing data writing, and if writing succeeds, completing the operation. According to the technical scheme, the data storage reliability is improved, and the data storage reliability is further improved through a designed multi-storage-device data mirror image storage auxiliary mode.