45 results about "Synaptic function" patented technology

This invention is directed to methods for determining if a test compound can ameliorate tau protein induced reduction of long term potentiation in a neural structure. The invention is also directed to methods for determining if a test compound can re-establish or rescue synaptic function in a neural structure following damage by tau proteins. Also encompassed by disclosures in this invention are methods to determine if a test compound can increase synaptic function in a neural structure contacted with tau proteins and methods for determining if a test compound is capable of treating Alzheimer's disease or other tauopathies in a subject.

The invention relates to a self-driven friction nano-generation synaptic transistor. The synaptic transistor comprises a friction nano-generator and a synaptic transistor, and further comprises: a substrate; an electrode layer formed on the substrate; a shared intermediate layer formed on the electrode layer; a synaptic transistor active layer, a source electrode and a drain electrode which formedon the shared intermediate layer; and a positive friction layer and a negative friction layer which are formed on the shared intermediate layer. The shared intermediate layer serves as a dielectric layer of the synaptic transistor and an intermediate layer of the friction nano-generator, the output voltage of the friction nano-generator is increased, the synaptic function of the synaptic transistor can be realized, the electrode layer is used as an output electrode of the friction nano-generator and a gate electrode of thesynaptic transistor, is simple in structure, light and flexible, and rubs the positive friction layer or the negative friction layer, and the shared intermediate layer generates pulse voltage, generates excitatory post-synapse current between the source electrode and thedrain electrode without external power supply, and realizes a bionic synaptic transistor function through self-driving.

The invention relates to a memristor and an electronic synaptic function enhancing method therefor. The Memristor comprises a substrate, a first terminal electrode, a plasma-treated oxide medium and a second terminal electrode, wherein the first terminal electrode is arranged on the substrate, and the plasma-treated oxide medium is arranged on a right side of the first terminal electrode or above the first terminal electrode; if the oxide medium is arranged on the right side of the first terminal electrode, the second terminal electrode is arranged on a right side of the oxide medium; if the oxide medium is arranged above the first terminal electrode, the second terminal electrode is arranged above the oxide medium. According to the memristor and the electronic synaptic function enhancing method therefor, the oxide medium is treated via plasma, reproducibility and an adjusting scope of a synaptic weight change rate can be improved, and therefore synaptic performance can be improved.

The invention relates to preparation of a double-layer porous oxide structure based on an artificial nerve synaptic function. A device is composed of a top end electrode, an oxide layer and a bottom end electrode. The preparation method has the advantages that 1, a porous silicon oxide structure with a sponge-like structure is simulated; 2, an ionic/ion-doped porous oxide layer is grown on the surface of the porous silicon oxide to form a double-layer porous oxide structure; and 3, the contact interface of the double-layer porous structure presents a structure that small holes surround large holes. The structure not only shows excellent electrical properties, but also can simulate the basic function of the nerve synapse, and provides a research path for the exploration of a memristive mechanism and the construction of a novel synapse device. The memristor provided by the invention has excellent electrical properties. The preparation method is simple, the performance is excellent, the application in the fields of high-density storage calculation and artificial intelligence is wide, and a new path is provided for exploring a novel cranial nerve-like working mechanism.

The invention discloses a low-power consumption optical synapse device based on a vertical cavity semiconductor optical amplifier. The invention belongs to the technical field of optical information processing, and is mainly applied to the construction of a photon pulse neural network. The device as shown in the figure includes two vertical cavity surface emitting semiconductor lasers VCSEL1 and VCSEL2, a dimmable delay line VODL, two optical couplers OC1 and OC2, a three-port optical circulator Circulator, a vertical cavity semiconductor optical amplifier VCSOA, a Bias and TEC for providing bias current and temperature control for the vertical cavity semiconductor optical amplifier, and two band pass filters lambda1 and lambda2. Light pulses output by the VCSELs are injected into the VCSOA, which proves that the VCSOA has the function of realizing optical synapses. The device of the invention has low power consumption while ensuring the realization of the optical synapse function, theinput power requirement on input signals is low, and the tuning range of a time window is large.

The invention discloses an oxide-based electronic synapse device and an array thereof. The device comprises a source electrode, a drain electrode and a gate electrode, a channel layer formed between the source electrode and the drain electrode and made of a solid oxide material; and an electrolyte layer, which is formed between the channel layer and the gate electrode as a gate medium, and which is an ion-conducting and electronically insulating solid electrolyte material. The device provided by the invention can well simulate a biological synaptic function, and has the advantages of polymorphism adjustability, high linearity, symmetry and the like, and an array integrated on a large scale can provide a device basis for constructing an artificial neural network.

The invention relates to fusion peptide TAT-MAS9C for destroying interaction between Mas receptors and PSD95. The full-length fusion peptide TAT-MAS9C comprises 20 amino acids; the sequence of the fusion peptide TAT-MAS9C comprises two parts; the amino terminal of the fusion peptide comprises 11 amino acids YGRKKRRQRRR in a membrane spanning domain of HIV-1Tat protein and can be used for importing the fusion peptide into cytoplasm; the carboxyl terminal of the fusion peptide comprises 9 Mas carboxy-terminal amino acids NTVSIETVV and can be used for destroying the interaction between the Mas and the PSD95; the amino acid sequence of the fusion peptide is YGRKKRRQRRRNTVSIETVV. The fusion peptide provided by the invention is capable of destroying the interaction between the Mas and the PSD95 and ensuring the synaptic function of PSD95, and can be used for preferably researching the regulating effect of the PSD95 on the Mas function.

Provided herein are, inter alia, are media compositions useful for culturing neural cells. In particular, the compositions provided herein mimic important physiological conditions in the living brain and sustain neural activity. The media compositions provided herein improve the efficiency of human neuron maturation and promote synaptic function in long-term in vitro cultures.

The invention provides an optical synaptic device and method based on an amorphous silicon film. According to the device, optical signals with different energies are used as excitation sources, optical signals with different energies are used for simulating the action potential of a synaptic front end, photo-generated carriers are selectively excited in the amorphous silicon thin film, photocurrent change is caused by capturing and releasing photon-generated carriers by utilizing defect energy levels in the amorphous silicon thin film, the post-synaptic current is simulated by the photocurrentresponse of the device, identification of different colors, namely energy, is realized, therefore, the bionic synaptic function with color selective recognition capability is realized, the change ofphotocurrent response generated by capture and release of photon-generated carriers by defect energy levels represented by a suspension spline in the amorphous silicon thin film is ingeniously utilized, and the synapse function of the device is achieved. The device is advantaged in that the photoelectric synapse provided by the invention not only has the characteristics of simple device structureand preparation process, compatibility with a Si-CMOS process and the like, but further has color recognition capability, and can solve a problem that the working bandwidth of an electric excitation electric reading synapse device is limited.

The invention provides a photoelectric artificial synapse preparation method. The preparation method comprises the following steps: providing a substrate; manufacturing a pattern electrode with a channel functional region on the substrate; manufacturing an organic semiconductor photoresponse function layer covering the pattern electrode on the surface of the substrate; preparing a ferroelectric polarization regulation and control layer on the surface of the photoresponse functional layer; and annealing to obtain the artificial synapse. Implementation of the artificial synapse is based on ferroelectric polarization multi-stage regulation and photoelectric response of an organic photoelectric semiconductor. And a high-quality in-plane polarization ferroelectric film is obtained by using a dispensing method to construct a planar multilayer structure. Compared with other memristor artificial synapses depending on conductive filaments and ion doping, the artificial synapses has the advantages of low operation voltage, good retention characteristic, simple and controllable preparation process and the like. The method can simulate important synaptic functions, is fast in response to photostimulation and low in energy consumption, and can be used in the fields of neuromorphic calculation, image recognition, machine vision, convolutional neural networks and the like.

The invention provides a circuit used for realizing the synaptic function of peak frequency correlation plasticity. The circuit comprises a noise signal receiving end, an input signal receiving end, an integral circuit, a synaptic unit, and a control signal input end, wherein the noise signal receiving end is used for receiving a first noise signal; the input signal receiving end is used for receiving an input signal; the integral circuit is used for carrying out integral processing on the input signal; the synaptic unit includes a first transistor and a resistance-type device; the control signal input end is connected to the synaptic unit; the control signal input end receives a first control signal when the first noise signal is at a low level, and the first control signal is used for making the input signal enter into the integral circuit; when the integral voltage of the input signal exceeds a voltage threshold, a second control signal is received, and the second control signal isused for heightening the weight value of the synaptic unit; and when the first noise signal is at a high level, a third control signal is received, and the third control signal is used for turning down the weight value of the synaptic unit.

The invention discloses a multifunctional synaptic bionic device and a preparation method thereof. The multifunctional synaptic bionic device sequentially comprises a grid electrode, a silicon substrate layer and a silicon dioxide thin film layer from bottom to top, wherein a first middle electrode and a second middle electrode are arranged on the upper surface of the silicon dioxide thin film layer separately, and the two electrodes are connected through titanium dioxide nanowires; the upper surfaces of the first middle electrode and the second middle electrode are provided with a source electrode and a drain electrode respectively, wherein the source electrode and the drain electrode are used for covering the titanium dioxide nanowires on the first middle electrode and the second middleelectrode; and the layers are sequentially arranged during preparation. According to the synaptic bionic device disclosed by the invention, the single titanium dioxide nanowire is adopted as a resistance change unit, so that the structure is simple, the power consumption is low, and integration is easy; the titanium dioxide nanowires are in reliable contact with the electrodes, the performance ofthe device is stable, and various synaptic functions can be simulated; and meanwhile, the preparation method is simple, and the operability is high.

Molecules that selectively inhibit or stimulate the activity of isoforms of calpains are presented. Methods for screening and characterizing such molecules are also presented. Specific functions of calpain-1 calpain-2 in long term potentiation (LTP), learning and memory, neurodegeneration and diseases of synaptic dysfunction are characterized using novel calpain inhibitors, substrates and related methods. The compounds, compositions, and methods described herein are expected to be useful, for treating neurodegenerative diseases and other diseases of synaptic function, and for modulating cognition in patients in need thereof.

The invention discloses a method for constructing a multi-field coupling artificial synapse through manganese oxide electromagnetic regulation and control, which comprises the following steps of: (1) depositing metal, a resistive layer and perovskite manganese oxide on a substrate in sequence to form a component for simulating a synapse function; (2) taking the metal as a bottom electrode, taking a cylindrical array grown by the perovskite manganese oxide as a top electrode, or taking a layer of metal grown on the perovskite manganese oxide film as the top electrode; and (3) applying an external field to the component, and regulating and controlling migration and distribution of oxygen ions of the perovskite manganese oxide film. According to the method, a memristive heterojunction with excellent electromagnetic characteristics is utilized, external field regulation and control are carried out on a resistive unit array on the basis of an electro-resistance effect to obtain multiple resistance states induced by multiple fields, and migration of oxygen ions in resistive units is regulated and controlled through the external field to simulate the strength distribution and plasticity of a synapse and to construct an artificial synapse.

The ferroelectric-controlled perovskite artificial photosynapse device is characterized in that a lower electrode is sequentially spin-coated with a lead-free perovskite thin film and an organic ferroelectric polymer thin film to form a semiconductor active functional layer, and then an upper electrode is thermally evaporated on the functional layer; the preparation method of the ferroelectric controlled two-end artificial synapse device specifically comprises the following steps: preparing a spin-coating liquid, spin-coating the lead-free perovskite thin film and the organic ferroelectric polymer thin film, and evaporating the upper electrode. Compared with the prior art, the method has the advantages of picoampere-level operation current, zero power consumption, long memory time and the like, can simulate a typical biological synaptic function under the stimulation action of light with a specific wavelength, can be applied to construction of an artificial neural network system, and is simple and feasible in preparation method, low in cost, safe and environment-friendly.

The invention relates to the field of neural network chip architecture, in particular to a reconfigurable neural network computing chip. According to the invention, the intersection structure of the word lines and the bit lines forming the neural network is replaced by a structure C capable of switching between the neuron function and the synaptic function, and the function diversification is realized through flexible configuration by switching the neuron function and the synaptic function at different intersections; and the utilization rate of the calculation unit PE array can be maximized. And meanwhile, the architecture is suitable for application, the system scale can be expanded instead of a rigid architecture adopting the traditional chip design, and more flexible chip design is realized. And the function of the structure C can be adjusted, and configuration and connection are performed according to the requirements of the neural network to be mapped to form different shapes, so that the function of secondarily constructing a large neural network by taking a plurality of reconfigurable neural network computing chips as subunits is realized.