Reconfigurable neural network computing chip

A neural network and computing chip technology, applied in the field of neural network chip architecture, can solve the problems of low performance and low performance of neural network universality, and achieve the effects of flexible mapping, flexible size, and improved utilization of computing resources

Active Publication Date: 2022-03-25
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Problems solved by technology

[0005] In view of the above-mentioned problems or deficiencies, in order to solve the problems that the existing neural network technology cannot take into account universality and relatively low energy efficiency, the present invention proposes a reconfigurable neural network computing chip, by combining the word lines and The intersection structure (neuron or synapse) of the bit line is replaced by a structure that can switch between neuron or synapse functions. Through the switching of neuron and synapse functions at different intersections, various functions can be realized with flexible configuration. , and can maximize the utilization of the computing unit PE array

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[0022] The present invention will be described in detail below in conjunction with the accompanying drawings, so that those skilled in the art can better understand the present invention. It should be noted that in the following description, when detailed descriptions of known functions and designs may dilute the main content of the present invention, these descriptions will be omitted here.

[0023] Such as figure 2 As shown, it is a schematic structural diagram of a single reconfigurable neural network computing chip of the present invention. Structure C is used at the intersection of N word lines and M bit lines. As a feature of synapses, to achieve flexible transformation under different needs.

[0024] In the case of a single chip, the neural network computing chip of the present invention can choose a horizontal working mode or a vertical working mode. When the horizontal mode is selected, the input buffer unit inputs the input data from the word line, and then output...

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Abstract

The invention relates to the field of neural network chip architecture, in particular to a reconfigurable neural network computing chip. According to the invention, the intersection structure of the word lines and the bit lines forming the neural network is replaced by a structure C capable of switching between the neuron function and the synaptic function, and the function diversification is realized through flexible configuration by switching the neuron function and the synaptic function at different intersections; and the utilization rate of the calculation unit PE array can be maximized. And meanwhile, the architecture is suitable for application, the system scale can be expanded instead of a rigid architecture adopting the traditional chip design, and more flexible chip design is realized. And the function of the structure C can be adjusted, and configuration and connection are performed according to the requirements of the neural network to be mapped to form different shapes, so that the function of secondarily constructing a large neural network by taking a plurality of reconfigurable neural network computing chips as subunits is realized.

Description

technical field [0001] The invention relates to the field of neural network chip architecture, in particular to a reconfigurable neural network computing chip. Background technique [0002] The artificial neural network is a nonlinear and self-adaptive information processing system composed of a large number of interconnected processing units, and is composed of a large number of neurons, that is, nodes connected to each other. Each node represents a specific output function, called the activation function. Each connection between two nodes represents a weighted value for the signal passing through the connection, called weight, which is equivalent to the memory of the neural network. The output varies depending on how the network is connected, weight values ​​and activation functions. Neural network is a non-linear statistical data modeling tool, which is often used to model the complex relationship between input and output, or to explore the pattern of data, and finally ...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/063
CPCG06N3/063Y02D10/00
Inventor 刘洋罗念祖王雅迪王俊杰
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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