39results about How to "Eliminate spikes" patented technology

The invention discloses a common-mode voltage suppression method of a voltage source inverter, which belongs to the technical field of power electronics. In each control cycle of the present invention, an alternative voltage vector is selected according to the voltage vector used in the previous cycle and the sector where the current vector is located in this cycle, and then the objective function is optimized according to the alternative voltage vector, so as to obtain the optimal voltage for this cycle vector and apply it to the inverter. Since the present invention fully considers the influence of the dead zone on the common mode voltage when selecting the alternative voltage vector, the influence of the dead zone can be completely overcome. Therefore, the present invention can be applied to photovoltaic grid-connected inverters or motor drive controllers to reduce the influence of common-mode voltages.

The invention relates to a method for measuring the public measure value of region, wherein said method comprises: obtaining the effective data sending amount and relative power in the measure period, via the data amount relative to the data confirm signal and relative transmission power in the measure period, then writing said value into formula to obtain the region public measure vale; based on the data that lost caused by in maximum retransmission times, using the data amount that sent at the start as effective data amount, and using the sum of N times of transmission powers as relative power; based on the condition that not receiving data confirm in the measure period, using the last effective value as measure value. The invention can obtain better region public measure value, to execute the load control better. And the invention also discloses a relative device.

The invention provides an adaptive filter which effectively eliminates noise and peaks with 2kHz-1MHz frequency in an industrial power distribution system. According to the adaptive filter, harmonic power frequency voltage is independently used as reference voltage, and a harmonic component is traced along the reference voltage. Noise consists of a series of random peaks and has no alternating current and direct current difference, so that the noise can be filtered in the traditional RC (Resistance-Capacitance) or RCL (Resistance-Capacitance-Inductance) circuit and an active filtering network. Voltage reduction can ensure that a used large-value capacitor can effectively extend a filtering frequency range to 2kH2. The method is high in cost and large in space occupation.

The invention relates to an ambient light compensation circuit for an infrared receiving device, comprising a potential detection unit, a voltage integration unit and a voltage-current conversion unit connected in sequence, wherein the potential detection unit is used to receive a first voltage signal (VSAM) , and compare the first voltage signal (VSAM) with the reference voltage; the voltage integration unit includes a first switch (SW1) for controlling the charging of the capacitor and a second switch (SW2) for controlling the discharging of the capacitor, according to the output of the potential detection unit The signal controls the first switch (SW1) and the second switch (SW2), so as to charge or discharge the capacitor to output a second voltage signal (VX), and the voltage-current conversion unit is used to convert the second voltage signal ( VX) is converted to output compensation current. The invention can realize ambient light current compensation and realize stable gain.

The invention discloses a method for sampling analog signals, comprising: responding to sampling requests for high-frequency analog signals and low-frequency analog signals, simultaneously starting a high-frequency timer and a low-frequency timer to perform timing work; wherein, the high-frequency timer The timing of the timer is cleared from the first timing initial value to the high-frequency timing period and reset from zero; the timing of the low-frequency timer is cleared from the second timing initial value to the low-frequency timing period and restarted from zero Timing; the low-frequency timing period is an integer multiple of the high-frequency timing period, the difference between the first timing initial value and the second timing initial value is greater than zero and is not in multiples of the high-frequency timing period ; When the timing value is detected to be zero, the sampling module is triggered to sample the analog signal. Correspondingly, the invention also discloses an analog signal sampling device. By adopting the embodiments of the present invention, the accuracy of analog signal sampling is improved, and low-frequency sampling is prevented from affecting high-frequency sampling.