375 results about "Flying capacitor" patented technology

In accordance with some embodiments of the present disclosure, a multi-level power converter circuit includes a flying capacitor, a balancing capacitor to control a voltage across the flying capacitor, a plurality of converter switches, a control switch coupled between the flying capacitor and the balancing capacitor, and control circuitry to open and close the control switch based on states of at least two converter switches of the plurality of converter switches. In some embodiments, the multi-level power converter is a three-level buck converter, and the balancing capacitor maintains a voltage across the flying capacitor to be within a threshold range of half the input voltage of the buck converter. In some embodiments, a method for operating the multi-level power converter includes using control circuitry to operate the plurality of converter switches and the control switch to selectively couple the balancing capacitor to either side of the flying capacitor.

A reconfigurable flying capacitor multilevel input stage accepts a wide range of input voltages. The input stage divides and inverts a DC input voltage. Generally, output voltage regulation is achieved by adjusting the power switches' duty ratio in the input stage for non-resonant converters and by adjusting the switching frequency for resonant converters.

According to some embodiments, a multi-level power converter, includes an output terminal, a reference terminal, an inductor, a flying capacitor, a first switching stage including a first switch connected to the output terminal and connected to the flying capacitor at a first node, and a second switch connected to the flying capacitor at a second node and connected to the reference terminal, a second switching stage including a third switch connected to the first node and the inductor, and a fourth switch connected to the inductor and the second node, and a pre-charge unit connected to the flying capacitor and the output terminal and configured to pre-charge the flying capacitor based on a voltage at the output terminal during a start-up cycle of the multi-level power converter.

Systems and methods for supplying power (both active and reactive) at a medium voltage from a DCSTATCOM to an IT load without using a transformer are disclosed. The DCSTATCOM includes an energy storage device, a two-stage DC-DC converter, and a multi-level inverter, each of which are electrically coupled to a common negative bus. The DC-DC converter may include two stages in a bidirectional configuration. One stage of the DC-DC converter uses a flying capacitor topology. The voltages across the capacitors of the flying capacitor topology are balanced and switching losses are minimized by fixed duty cycle operation. The DC-DC converter generates a high DC voltage from a low or high voltage energy storage device such as batteries and / or ultra-capacitors. The multi-level, neutral point, diode-clamped inverter converts the high DC voltage into a medium AC voltage using a space vector pulse width modulation (SVPWM) technique.

A DC-DC converter for converting an input voltage at an input node, the converter comprising: first and second inductor nodes for connection of an inductor therebetween; first and second flying capacitor nodes for connection of a flying capacitor therebetween; a first switching network for selectively connecting the first flying capacitor node to each of the input node and the first inductor node; a second switching network for selectively connecting the second flying capacitor node to each of the input node and a reference voltage node; and reservoir circuitry, comprising: first and second reservoir capacitor nodes for connection of a reservoir capacitor therebetween; a third switching network for selectively connecting the first reservoir capacitor node to each of the first and second flying capacitor nodes; a fourth switching network for selectively connecting the second reservoir capacitor node to each of the second flying capacitor node and the reference voltage node.

A first converter includes first to fourth switching elements connected in series from a reference node toward a node fed with an input voltage, a flying capacitor, an intermediate capacitor, and a first inductor. The intermediate capacitor is provided between a connection node between the second and third switching elements and the reference node. The second converter includes a switching output stage connected to the connection node between the second and third switching elements, and a second inductor. A control circuit produces an output voltage lower than the input voltage by controlling the states of the switching elements and of the switching output stage.

Switched capacitor power converter circuitry configured to receive an input voltage and to output an output voltage, the switched capacitor power converter circuitry comprising: a switch network; a flying capacitor coupled to the switch network; and an output capacitor coupled to an output node of the switch network, wherein the switched capacitor power converter circuitry is operable in: a first mode in which the switch network operates at a fixed duty cycle; and a second mode in which the switch network operates at a variable duty cycle based on a predetermined flying capacitor charging threshold and a predetermined flying capacitor discharging threshold.

An interleaved flying capacitor multi-level converter includes a plurality of arms and a phase-shift PWM generation circuit. Each arm includes a flying capacitor multi-level circuit having an upper arm and a lower arm coupled at a middle node. The upper arm includes a plurality of serially coupled upper arm switches and the lower arm includes a plurality of serially coupled lower arm switches. One capacitor is correspondingly coupled between every two upper arm switches and every two lower arm switches. The phase-shift PWM generation circuit generates a plurality of switch control signals to respectively control the plurality of upper arm switches and the plurality of lower arm switches.

A charge pump control circuit, comprising an internal reference voltage generator configured to generate a programmable reference voltage ramp, and a control circuit coupled to the internal reference voltage generator. The control circuit configured to control current of a charge pump circuit driving a load by controlling a duty cycle of a transfer phase of the charge pump circuit during a gain-up stage according to a first comparison between the programmable reference voltage ramp and an output voltage across an output capacitor of the charge pump circuit, and a second comparison between a fly capacitor reference voltage and a fly capacitor voltage of a fly capacitor of the charge pump circuit.

The present disclosure describes a charge pump circuit, comprising a first switch, a second switch and a flying capacitor. The first switch receives driving voltage when the clock signal is at the first level, while the second switch receives driving voltage at the second level. The flying capacitor charges via the first switch and discharges via the second switch to generate the output voltage. When the power supply voltage is lower than the preset output voltage, the driving voltage for the first switch is lower than that for the second switch. The present disclosure adaptively regulates the current-carrying capabilities of the first and second switches in accordance with the magnitude of the power supply voltage to ensure that the voltage difference across the flying capacitor is less affected by changes in the power supply voltage, thereby enhancing circuit stability.

An apparatus such as a power converter includes: a first circuit path including first windings coupled in series, each of the first windings magnetically coupled to each other; a second circuit path including second windings coupled in series, each of the second windings magnetically coupled to each other; and switch circuitry operative to selectively switch between electrically connecting a flying capacitor in series with the first circuit path and electrically connecting the flying capacitor in series with the second circuit path. A controller controls the switch circuitry in the power converter to convert an input voltage into an output voltage.

A tracker module includes an integrated circuit, a first capacitor and a second capacitor arranged in or on a module laminate. The integrated circuit includes at least one switch in a switched-capacitor circuit and at least one switch in a supply modulator. The switched-capacitor circuit is configured to generate a plurality of discrete voltages. The supply modulator is configured to generate an output voltage by selectively switching among the plurality of discrete voltages based on a control signal. The first capacitor is a flying capacitor of the switched-capacitor circuit. The second capacitor is a smoothing capacitor of the switched-capacitor circuit. In a plan view of the module laminate, the first capacitor is arranged closer to the integrated circuit than the capacitor.

The invention relates to a method for operating a flyback converter (2) having an active-clamp circuit (4), a main switching branch (3) being connected to a primary-side coil (51) of a transformer (5) in series between a first supply potential (VH) and a second supply potential (VL), the active-clamp circuit (4) being connected to a central node (M) between the main switching branch (3) and the primary-side coil (51) and one of the supply potentials (VH, VL), the active-clamp circuit (4) having an active-clamp switching branch (42) in series with an active-clamp capacitance (41), the main switching branch (3) and the active-clamp switching branch (42) each having two or more series-connected semiconductor switches (31, 32, 43, 44), one or more flying capacitances (7) each being connected to an intermediate node (ZH, ZAC) between the series-connected semiconductor switches (31, 32) of the main switching branch (3) and to an intermediate node between the series-connected semiconductor switches (43, 44) of the active-clamp switching branch (42), wherein the semiconductor switches (31, 32, 43, 44) of the main switching branch (3) and the active-clamp switching branch (42) are each switched to open and close in chronological succession, wherein, in order to open or close the main switching branch (3) and the active-clamp switching branch (42), that semiconductor switch (31, 32, 43, 44) of the main switching branch (3) or active-clamp switching branch (42) in question that leads to a current path through a freewheeling diode of at least one of the semiconductor switches (31, 32, 43, 44) of the other, main switching branch (3) or active-clamp switching branch (42) is opened or closed first so that a voltage (UC) across the flying capacitance is changed in the direction of a predefined setpoint voltage (Usoll).

A buck converter circuit comprising a pre-charging switch, a first switching element, a second switching element, a third switching element, a fourth switching element, a flying capacitor, a voltage supply node, a first flying capacitor node, a second flying capacitor node, a switch node and a control system. The voltage supply node, the pre-charging switch and the first flying capacitor node are sequentially connected in series. The voltage supply node, the first switching element and the first flying capacitor node are sequentially connected in series. The first flying capacitor node, the flying capacitor, the second flying capacitor node and the fourth switching element are sequentially connected in series. The first flying capacitor node, the second switching element, the switch node, the third switching element and the second flying capacitor node are sequentially connected in series. The control system is configured for executing a pre-charging process and a cyclic converting process.

An apparatus comprises a push-pull regulation loop (PPRL), an input terminal, an output terminal, and a plurality of flying capacitor (FC) circuits. The plurality of FC circuits comprises a corresponding plurality of capacitors. The PPRL comprises a PMOS transistor, an NMOS transistor, and a control circuit. The input terminal and the output terminal are coupled to a node of the PPRL via a rail. FC circuits of the plurality of FC circuits are coupled to each other. At least a first FC circuit of the plurality of FC circuits is coupled to the rail. A remaining subset of the plurality of FC circuits is coupled to the first FC circuit. An FC circuit of the plurality of FC circuits further comprises at least a first transistor switch and a second transistor switch coupled to a corresponding capacitor of the plurality of capacitors.

An electronic apparatus may include a power factor correction (PFC) circuit and a control circuit for controlling the operation of the PFC circuit, wherein the PFC circuit may include one or more of: an inductor connected to one end of an input voltage unit; a switch unit comprising a first switch connected in series to the inductor, and a second switch connected in series to the first switch; a flying capacitor unit comprising a first diode and a flying capacitor connected in series to each other and connected in parallel to the first switch; and an output unit comprising a second diode and an output capacitor connected in series to each other and connected in parallel to the flying capacitor and the second switch, and the control circuit comprises a first control circuit which obtains an on-off control signal for the first switch on the basis of the output voltage of the output capacitor and transmits the signal to the first switch, and a second control circuit which obtains an on-off control signal for the second switch on the basis of the flying voltage of the flying capacitor and transmits the signal to the second switch.

Provided in the present invention is a driver circuit for driving an input power transistor in a charge pump. The input power transistor of the charge pump is an NMOS transistor, which reduces the conduction loss, a source electrode of the input power transistor receives an input voltage, and a drain electrode of the input power transistor is coupled to a first end of a flying capacitor; a gate electrode of a high-side source-follower NMOS transistor of the driver circuit receives an adjustable reference voltage, a drain electrode of the high-side source-follower NMOS transistor is coupled to an output end of the charge pump, and a source electrode of the high-side source-follower NMOS transistor is coupled to a drain electrode of a low-side source-follower NMOS transistor; a source electrode of the low-side source-follower NMOS transistor is coupled to a drain electrode of a pull-down NMOS transistor, and a gate electrode of the low-side source-follower NMOS transistor is coupled to a gate electrode of the pull-down NMOS transistor; and the gate electrode of the pull-down NMOS transistor also receives an input power transistor control signal by means of a driver, a source electrode of the pull-down NMOS transistor is coupled to the first end of the flying capacitor, and the drain electrode of the pull-down NMOS transistor is also coupled to a gate electrode of the input power transistor. The present invention changes the output voltage of the charge pump by means of adjusting the voltage value of the adjustable reference voltage; and the driver circuit of the present invention directly receives the input voltage, thereby reducing the area of the charge pump.

A method includes connecting an output of a switched capacitor converter to a battery, the switched capacitor converter comprising a first switch, a second switch, a third switch and an upper circuit connected in series, and a flying capacitor connected between a common node of the first switch and the second switch, and a common node of the third switch and the upper circuit, in a first short circuit testing step, determining whether the third switch is shorted by comparing a voltage on the common node of the third switch and the upper circuit with a first predetermined voltage reference, and in a second short circuit testing step, determining whether the first switch and the second switch are shorted by comparing a voltage on the common node of the first switch and the second switch with a second predetermined voltage reference and a third predetermined voltage reference, respectively.

The application discloses a kind of multi-phase hybrid DC-DC converters of inductance current automatic current sharing, including multiple phase units, including switching network, flying capacitor, energy storage inductor and sampling capacitor in each phase unit;Switching network is composed of NMOS pipe that is connected with each other;Flying capacitor is connected between the output end of first NMOS pipe and the input end of last NMOS pipe in switching network;Sampling capacitor is connected between the intermediate tap of switching network in each phase unit and the intermediate tap of switching network of next phase unit;One end of energy storage inductor is connected with switching network, and the other end is connected with the common output end of converter.The application is modularized by being designed to phase unit, so that DC-DC converter also supports arbitrary expansion phase, so as to realize the purpose of being expandable to arbitrary phase number and inductance current, flying capacitor voltage automatic balancing, with wide application prospect.

A tail regulated switched capacitor converter can include a plurality of switched capacitor stages each having a flying capacitor and a plurality of switching devices. The plurality of switching devices can include a first group of one or more switches that selectively couple the flying capacitor to one of an input or output voltage rail via a first current path and a second group of one or more switches that selectively couple the flying capacitor to a tail voltage rail via a second current path. The first and second groups of one or more switches can be switched complementarily to one another with a 50% duty cycle. The tail regulated switched capacitor converter can further include a regulated converter coupled to the tail voltage rail that provides voltage regulation of the output voltage rail while carrying half of a full output current of the tail regulated switched capacitor converter.

The utility model discloses a seven-level inverter topology, which relates to the technical field of multi-level structures and comprises an upper bridge arm and a lower bridge arm, the upper bridge arm and the lower bridge arm are mutually symmetrical except for the direction of a diode, and a plurality of switch tubes, direct current bus capacitors and flying capacitors in the upper bridge arm and the lower bridge arm are connected according to a specific rule. Working modes with seven different output voltages are realized by controlling the conduction state of the switch tube; the topology realizes voltage division through the DC bus capacitor, realizes intermediate level transition through the flying capacitor, combines an optimized circuit structure and a control strategy, has the advantages of simple circuit design, high efficiency, stable output voltage and the like, and is widely applicable to high-voltage and high-power inverter systems.

The application provides a control method based on a three-level cascade Buck-Boost converter and an energy storage system. Through a mode switching point threshold calculation method based on flying capacitor voltage and inductance current dynamic characteristics, when switching between different working modes of the Buck-Boost converter, real-time data such as input and output voltages, inductance equivalent parameters and control periods are combined to dynamically determine the inductance current switching point, smooth transition between different modes is realized, the inductance current mutation caused by mode switching is effectively inhibited, the impact on the direct current bus voltage is reduced, and the stability and dynamic response speed of the voltage stabilizing control are improved.

The invention discloses a double-negative one-state single-phase common-ground five-level inverter topology which comprises a photovoltaic cell PV, a double-negative one-state single-phase five-level inverter circuit, a single-phase output LC filter circuit and a single-phase load. The double-negative-one-state single-phase five-level inverter circuit comprises a direct-current side input filter capacitor Cdc, flying capacitors C1 and C2 and ten switching tubes S1 to S10, S2, S4, S5 and S9 are IGBTs (Insulated Gate Bipolar Translator) with fly-wheel diodes, and other switching tubes are IGBTs without fly-wheel diodes. According to the invention, complete suppression of the leakage current of the inverter can be realized; the amplitude of the AC-side output SPWM voltage is twice of the DC-side voltage, so that the utilization rate of the DC-side voltage is remarkably improved; the charge and discharge balance of the capacitor voltage is realized through the selection of the negative state, so that the waveform quality of the output voltage is improved; in each working mode, the number of switching tubes connected in series in a current conduction loop is small, and the loss of circuit switching devices is low.

A system may include an SCB2L comprising a plurality of switches, a first power inductor and a second power inductor electrically coupled to the plurality of switches, and a flying capacitor electrically coupled to the plurality of switches, wherein the plurality of switches are controllable in a periodic manner among a plurality of switch configurations in order to generate an output voltage from an input voltage received by the SCB2L. The plurality of switch configurations may include a first switch configuration in which electrical charge on the flying capacitor is increased and a second switch configuration in which electrical charge on the flying capacitor is decreased. The system may also include a control subsystem configured to selectively increase and decrease a difference in time between a first duration of the first switch configuration and a second duration of the second switch configuration within switching cycles of the SCB2L.

This application discloses a multi-inductor multi-output DC-DC voltage converter and its control method. The converter includes several basic unit modules and a charge redistribution module. The basic unit modules are connected in series and all are connected to the charge redistribution module. The method includes: based on the input voltage signal, and using the basic unit modules, sequentially and alternately magnetizing and demagnetizing a first inductor within a complete cycle to obtain the load-side output current and load-side output voltage; obtaining the first flying capacitor current and combining it with the load-side output current and load-side output voltage; and adjusting the inductor current based on the charge redistribution module to output the adjusted inductor current. The embodiments of this application enhance the ability to support higher input voltages and more output channels while reducing external components, thereby improving system conversion efficiency. This application can be widely applied to integrated circuit design technology.

The utility model relates to a kind of ladder form switch capacitor conversion circuit, conversion circuit includes ladder determination module, switch control module, output capacitor at least one flying capacitor;Current input end is connected with voltage output end in turn through at least two switch tubes, voltage output end is also grounded through output capacitor;One end of flying capacitor is connected between voltage input end and the common point of adjacent two switch tubes of voltage output end, its other end is grounded through a switch tube, and also be connected to the common point of output capacitor and voltage output end through another switch;When the ratio of input voltage and output voltage is non-integer, switch control module controls the charge-discharge process of flying capacitor, so that the voltage of last flying capacitor is equal to output voltage or input voltage.The present application realizes the efficient conversion of fixed integer ratio and / or non-integer ratio of input and output voltage by the switch capacitor control mode of multiple ladder, using the ladder voltage variation of flying capacitor.

The application discloses a four-branch voltage-continuing variable inverter for a switched reluctance motor and a control method thereof. The inverter is composed of a main circuit and a power supply circuit, and the two circuits are input and output to each other. The main circuit output is connected to other loads. The four-branch windings of each phase winding of the switched reluctance motor are independently connected to the main circuit. In operation, the two stages of excitation and power generation of the generator operation can be in parallel to strengthen excitation and in series to continuously increase voltage output. As a motor, high-voltage power supply can be provided and the remaining energy can be recovered. When operating as a generator, the inverter has a selectable middle-stage half-voltage continuous-flow link. The power supply circuit can adjust the output voltage through PWM operation of only one switch tube. In combination with each working stage of the main circuit, the output end of the power supply circuit is connected in series in all stages, so that the output voltage of the main circuit can be indirectly adjusted through the voltage of the power supply circuit. The whole inverter has low switching loss and high conversion efficiency, and is suitable for application in the field of small and medium power high-speed four-quadrant motor systems.

A 2-bit fast flash analog-to-digital converter circuit and related methods designed for use with multi-level converters in particular to achieve: high conversion speed, high resolution, small layout area, low power, and the ability to meet the requirements for properly balancing fly capacitor voltages. One embodiment includes a voltage input configured to be coupled to a multi-level converter fly capacitor; a comparator coupled to the voltage input and a first reference voltage input and having a first binary output indicating whether the input voltage is higher or lower than a voltage on the first reference voltage input; and a circuit coupled to the voltage input and to second and third reference voltage inputs, the circuit configured to provide a second binary output indicating whether the input voltage is inside or outside a voltage window defined by respective voltages on the second reference and third reference voltage inputs.

This disclosure relates to a multiphase hybrid converter. A multiphase hybrid DC-DC converter using switching capacitor technology is described. The multiphase hybrid converter can reduce the volt-seconds across the converter's inductors, thereby reducing the inductor size. Furthermore, the multiphase hybrid converter can utilize the inductor as a current source to charge and discharge the flying capacitor, which can reduce the size of the intermediate capacitor and increase the solution density. Since the charging and discharging operations are performed by the inductor, the multiphase hybrid converter can eliminate capacitor-to-capacitor charge transfer. Therefore, the multiphase hybrid converter does not require high capacitance to achieve efficient operation, which further increases the solution density.

A voltage converter system includes a negator coupled to a switched-capacitor converter (SCC). The negator circuit is coupled to an input terminal and generates a negative input voltage signal. The negator circuit includes a flying capacitor, a pair of first switches and a pair of second switches connected in a H-bridge configuration. The SCC is coupled to the input terminal and the negator circuit. The SCC includes a plurality of converter stages. Each stage of the plurality of converter stages includes a capacitor and an assembly of a first switch and a second switch. The system further includes a control unit, to activate or deactivate the pair of first switches, the pair of second switches, each of the first switches, and each of the second switches. A configuration of the negator circuit and the SCC results in a voltage conversion ratio between the output voltage signal and the input voltage signal.